Classifications

• • H—ELECTRICITY
  • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
  • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
  • H05K3/00—Apparatus or processes for manufacturing printed circuits
  • H05K3/22—Secondary treatment of printed circuits
  • H05K3/28—Applying non-metallic protective coatings
• • H—ELECTRICITY
  • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
  • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
  • H05K3/00—Apparatus or processes for manufacturing printed circuits
  • H05K3/0002—Apparatus or processes for manufacturing printed circuits for manufacturing artworks for printed circuits
• • H—ELECTRICITY
  • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
  • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
  • H05K3/00—Apparatus or processes for manufacturing printed circuits
  • H05K3/22—Secondary treatment of printed circuits
  • H05K3/24—Reinforcing the conductive pattern
  • H05K3/243—Reinforcing the conductive pattern characterised by selective plating, e.g. for finish plating of pads
• • H—ELECTRICITY
  • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
  • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
  • H05K3/00—Apparatus or processes for manufacturing printed circuits
  • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
  • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
  • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
  • H05K3/3457—Solder materials or compositions; Methods of application thereof
  • H05K3/3473—Plating of solder
• • H—ELECTRICITY
  • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
  • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
  • H05K3/00—Apparatus or processes for manufacturing printed circuits
  • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
  • H05K3/42—Plated through-holes or plated via connections
  • H05K3/425—Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern
  • H05K3/427—Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern initial plating of through-holes in metal-clad substrates
• • H—ELECTRICITY
  • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
  • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
  • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
  • H05K2201/09—Shape and layout
  • H05K2201/09818—Shape or layout details not covered by a single group of H05K2201/09009 - H05K2201/09809
  • H05K2201/099—Coating over pads, e.g. solder resist partly over pads
• • H—ELECTRICITY
  • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
  • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
  • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
  • H05K2203/04—Soldering or other types of metallurgic bonding
  • H05K2203/043—Reflowing of solder coated conductors, not during connection of components, e.g. reflowing solder paste
• • H—ELECTRICITY
  • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
  • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
  • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
  • H05K2203/05—Patterning and lithography; Masks; Details of resist
  • H05K2203/0548—Masks
  • H05K2203/056—Using an artwork, i.e. a photomask for exposing photosensitive layers
• • H—ELECTRICITY
  • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
  • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
  • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
  • H05K2203/05—Patterning and lithography; Masks; Details of resist
  • H05K2203/0562—Details of resist
  • H05K2203/0571—Dual purpose resist, e.g. etch resist used as solder resist, solder resist used as plating resist
• • H—ELECTRICITY
  • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
  • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
  • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
  • H05K2203/05—Patterning and lithography; Masks; Details of resist
  • H05K2203/0562—Details of resist
  • H05K2203/0588—Second resist used as pattern over first resist
• • H—ELECTRICITY
  • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
  • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
  • H05K3/00—Apparatus or processes for manufacturing printed circuits
  • H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
  • H05K3/06—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
  • H05K3/061—Etching masks
  • H05K3/064—Photoresists

Definitions

• the invention relates to a method for producing a printed circuit board with a first and second surface, with at least a plurality of connection contacts (pads) for soldering electronic components and a plurality of interconnects connecting the pads being applied to the first surface . Furthermore, the invention relates to a method for the production of masks for the exposure of photoresist layers, which can be used in the production of a printed circuit board according to the preceding method. Finally, the invention relates to a printed circuit board with pads arranged on at least one surface and conductor tracks made of a metal applied to an insulating substrate of the printed circuit board, with a solder layer applied at least to the pads, and with one on the printed circuit board except on the Pads of applied solder layer. Such a circuit board can be produced using the first-mentioned method. 2
• microelectronic circuits are predominantly made up of electrically insulating plates provided with structured conductor tracks.
• the printed circuit board generally forms the lower level of electronic structures in circuit levels.
• the size of the circuit boards can be up to several d 2, whereby the circuit board Anlagen.spi.elswei.se made of polymers, such as epoxy resin, and usually coated with a copper metallization.
• connection holes have to be punched in the printed circuit board and metallized throughout so that the electrical connections pass through the connection hole.
• the microelectronic circuits are constructed on the printed circuit boards by correspondingly soldering the individual microelectronic components.
• the components on one side of the circuit board are used their connections placed on contact points (pads) provided with a solder layer and soldered accordingly. This technology is referred to as SMD technology (Service Mount Devices).
• the components with their connections are inserted into connection bores in the circuit board and are soldered on a soldering side of the circuit board opposite the component side for connection to corresponding conductor tracks.
• connection bores for connecting the component side and solder side in the printed circuit board are produced by drilling or punching.
• a copper coating in the interior of the connection bores creates a conductive connection between the two sides of the printed circuit board.
• a solder layer in particular also as an etching protection, is applied galvanically to the entire circuit. The solder layer is also applied within the through holes.
• the exposed copper metallization is then removed by etching, and the structured circuit remains, which is formed by copper coated with the solder layer.
• solder mask is applied to the circuit by screen printing or a photo process, this lacquer not being arranged on the pads and the connecting bores. Finally, the electronic components on the pads or in the connection holes are soldered through the applied solder layer on the circuit board.
• a disadvantage of the above method is that by applying the solder layer on the conductor tracks when the electronic components are soldered, heat is transported along the conductor tracks and solder layer, as a result of which the solder layer takes on an uneven, wavy structure on the conductor tracks. Because of the waviness of the solder layer on the conductor tracks, this method cannot be used for more highly integrated circuits.
• a circuit design for printed conductors, pads and the like is produced by CAD methods.
• the circuit design is, for example, transferred to a photographic negative (or positv) as a mask via a photoplotter.
• the structuring of the metallization on the printed circuit board is then carried out by exposing a light-sensitive photoresist layer by means of the mask. After the photoresist layer has been partially removed, the desired structure is transferred to the metallization (copper layer).
• the entire circuit is structured using a mask. This is followed, as in the above-mentioned method, by drilling or punching connection bores, metal coating the connection bores on the inside, galvanically applying a solder layer as a protection against etching and removing the exposed metallization.
• the entire solder layer is now removed from the circuit, so that a circuit remains only formed from the metal layer applied to the circuit board. This is mechanically polished to prepare it for the application of a solder resist. This varnish is applied to the entire circuit except for the pads and the connection holes. The pads are then chemically polished and the so-called HAL (hot air leveling) process is used.
• HAL hot air leveling
• the printed circuit board is immersed in a bath with the liquid solder layer. At the When the printed circuit board is removed, the solder layer adheres mainly to the pads. Excess material of the solder layer is removed from the pads and from the rest of the circuit board by blowing with hot air.
• the solder layer is usually made of an alloy of lead and tin. The solder layer can be melted again, in particular to form a shiny surface. This is usually done by infrared radiation.
• the electronic components can then be soldered on in a conventional manner.
• solder layer applied to the entire circuit must be removed as a whole. This is done by a chemical process using acids. This, as well as the etched-off solder layer, has to be disposed of in a complex manner and, if necessary, recovered. Since the solder layer is also etched away from the pads, the solder layer must be applied to the pads again in an additional process step. In the H.A.L. process, the solder layer is applied hot, whereby the toxicity of a lead component in the solder layer must be observed and appropriate measures taken. In particular, it should be noted that some countries, such as the USA, for example, want to consider banning the use of liquid lead in production processes or at least want to impose strict requirements.
• Another disadvantage of the latter method is that when hot excess solder layer is blown off in the HAL method, small, hot droplets of the solder layer can remain on the solder-stop layer and can lead to a defect in the solder-stop layer there. This can lead to short circuits in the conductor tracks.
• Another disadvantage of the HAL method is that the layer thickness of the solder layer is uneven. When the circuit board is pulled out of the liquid solder layer and when excess material is subsequently blown off, the solder layer does not solidify with a uniform layer thickness, but is thrown up unevenly. As a result, poor contact can be made when the electronic components are soldered on, since a connecting line of the electronic component is arranged, for example, in an area of the solder layer where the thickness is too small.
• solder layer Even when the solder layer is melted to produce a shiny surface of the solder layer, its layer thickness is not improved with regard to its uniformity. Instead, due to its surface tension, the solder layer can contract on melting and solidify, for example, in a hemispherical manner. If the solder layer "shrunk" in this way is not hit exactly by a connecting line of the electronic component, a poor or possibly no conductive connection results.
• the invention is therefore based on the object of providing a simplified method for producing a printed circuit board, in which a solder layer of uniform layer thickness is applied only once to the contact points of the printed circuit board required for soldering.
• the pads are first structured using a first mask. If, after appropriate exposure to the first mask, the pads are freed from the associated photoresist layer, a solder layer is only applied to the pads with a predetermined layer thickness. The remaining part of the first photoresist layer can then be removed. Subsequent removal of the solder layer as in the HAL process is not necessary because this layer was only applied to the contact points (pads) of the circuit board required for soldering. Before removing the superfluous metallization of the circuit board, a second photoresist layer is applied using a second mask for structuring the conductor track.
• the second photoresist layer remains on the conductor tracks and at least partially on the pads, the transition region of pads and associated conductor track also being covered by the second photoresist layer. If the exposed metallization is now removed, the conductor tracks are protected by the second photoresist layer and the pads by the solder layer, so that the metallization is not removed in these areas. It should be noted that the pads are protected both by the solder layer and at least partially by the second photoresist layer.
• the method according to the invention cannot interrupt the connection of the connector and the conductor track, since the metallization is protected from being removed by the second photoresist layer and the solder layer. In the following, a solder resist can be applied to the circuit board outside the pads in the usual way.
• the pads are produced with connecting pieces when structured.
• the connecting pieces point essentially in the direction of the conductor tracks to be subsequently structured and serve to connect pads and conductor tracks.
• the second photoresist layer is applied in particular to the parts of the pads forming the connecting pieces, as a result of which an overlap of the solder layer and the second photoresist layer occurs.
• solder layer there is no need to remove the solder layer from the conductor tracks. This eliminates the corresponding chemical treatment and waste disposal or recovery of the chemical agents (acids) and the solder layer. This also does not apply to the method according to the invention reapplying the solder layer, in particular no toxic, liquid solder layer being required. Hot blowing off excess solder layer is just as little necessary in the method according to the invention. As a result, no defects in the solder mask due to hot droplets of the solder layer can occur. Since the solder layer is applied with a uniform layer thickness, soldering of the electronic components in the entire area of the pad is ensured.
• the method described in claim 1 can be used in particular for SMD, the electrical contacts of the electronic components being placed on the contact or connection surfaces (pads) of the printed circuit boards and then being soldered, for example by wave soldering.
• pads contact or connection surfaces
• the method according to the invention being used at least on the component side, in process step ii) according to claim 1, additional pads forming bore points with corresponding connecting pieces for producing connecting bores for connecting both sides of the printed circuit board be structured. After drilling or punching the connecting holes, these are provided with a metalization, at least in their interior.
• connection bores metallized in this way are treated further in the same way as the pads in claim 1, that is, a solder layer is applied with a uniform thickness within the connection bores and on their connecting pieces, a second photo-resist layer is applied, exposed and then closed ⁇ at least partially removed.
• a solder layer is applied with a uniform thickness within the connection bores and on their connecting pieces, a second photo-resist layer is applied, exposed and then closed ⁇ at least partially removed.
• the connecting bores are also used for inserting connecting wires of electronic components, then according to method step vi) from claim 1, no solder mask is applied in an analogous manner to the connecting bores.
• the solder resist can be applied in accordance with the previously known methods by screen printing or a photo process. In order to achieve a very uniform layer thickness of the solder layer in a simple manner, it is advantageous if the solder layer is applied galvanically. This type of application achieves a very flat surface of the solder layer with a controlled layer thickness.
• the corresponding masks are designed as negative or positive masks.
• a positive mask is used as the first mask and a negative mask as the second mask, the first photoresist layer outside the pads / bore points and associated connecting pieces and the second photoresist layer on the conductor tracks is exposed.
• the unexposed part of the first photoresist layer is removed before the solder layer is applied.
• the unexposed part is likewise removed from the second photoresist layer, the exposed part remaining above the conductor tracks to be structured.
• solder layer which essentially has a matt surface, a glossy surface.
• the layer thickness is not changed during the melting.
• the melting is carried out by appropriate infrared radiation.
• the solder resist can be applied both by a photo process and by screen printing or the like.
• the connection piece is structured with a width that is greater than that of the conductor track in step ii) in claim 1.
• the connecting piece In the case of wider conductor tracks, the connecting piece generally has the same width as the conductor track, it being essentially formed from an end piece of the conductor track connecting two pads, for example.
• conductor tracks which are not too fine there are no difficulties in overlapping the second photoresist and connector, so that after removal of the metalization, the conductor track is contacted below the second photoresist and connector over the entire width of the conductor track or of the connector.
• the second photoresist layer for structuring the conductor tracks only partially overlaps the connecting piece. If the metallization not covered by the second photoresist layer is removed in this case, the contact between the conductor track covered by the second photoresist and the connecting piece could only take place over part of the width of the conductor track or possibly not at all. However, if the connector is wider than the conductor track, there is good contact between the connector and the conductor track even when the second photoresist layer is slightly misaligned for structuring the conductor tracks.
• the circuit board is metallized by applying a copper layer and the solder layer is formed by a PbSn layer.
• an overlap is produced in the contact area of conductor tracks and pads / connection bores, in particular to avoid an interruption in the connection between pads / connection bores and conductor tracks when the unnecessary metallization of the circuit board is removed.
• the overlap takes place in the contact area covering solder layer and second photoresist layer.
• the solder layer prevents etching of the metallization in the area of the pads / connecting bores and the second photoresist layer prevents etching of the metallization in the area of the conductor tracks to be structured.
• the overlap can be produced in the area of a connecting piece of the pads or the connecting bore.
• a corresponding overlap can also be produced in that, for example, after structuring the pads and applying a corresponding solder layer, they are produced by vapor deposition, sputtering or the like so that they overlap the pads at least partially.
• a metallization applied to the printed circuit board can be removed in a conventional manner before the printed conductors are applied. In this case there is a direct overlap between the pad and the conductor track.
• a first and a second mask are used for successively coating a first and a corresponding second photoresist layer.
• the printed circuit board produced with the H.A.L. process is exposed through a mask as a whole.
• this method has the method steps according to claim 12.
• the first and second mask are produced in a simple manner from a first basic mask with an overall layout of the circuit and a second basic mask only with pads / bore points. The second basic mask is used in particular to remove the solder stop layer from the pads / bore points.
• the first auxiliary mask is produced from the second basic mask by enlarging pads and / or bore points by a first enlargement factor. It should be noted, that the distances from the centroids or center points of the pads and / or bore points are not increased, but only the cross section of these structures is increased. If the first basic mask is overlaid with the first auxiliary mask, the enlarged structures on the first auxiliary mask transfer a certain area of pads and / or bore points to the first mask. The area around the pads and / or bore points of the first basic mask is chosen so large that neighboring pads and / or bore points are not detected. However, part of the conductor track connected to the pads and / or bore points is also transferred to the first mask as a connector mentioned in claim 2. Consequently, the layout of the first mask shows the arrangement of all pads and / or drilling points together with end regions of the conductor tracks adjoining them as connecting pieces.
• a second auxiliary mask is produced from the second basic mask by enlarging the pads and / or bore points as in the first auxiliary mask.
• the magnification is carried out using a second magnification factor that is smaller than that of the first magnification factor.
• the second mask is produced by superimposing the second auxiliary mask and the first basic mask. This only has the conductor tracks from the first basic mask, since the second auxiliary mask in particular hides the pads and / or bore points from the first basic mask. Since the second magnification factor is smaller than the first magnification factor, a conductor track shown on the second mask, for example between two selected pads, is longer than the distance between the corresponding connecting pieces of the first mask.
• the connecting pieces produced by means of the first mask and the areas of a photoresist layer exposed by means of the second mask overlap to form the conductor tracks.
• this method according to the invention for producing the masks it is particularly advantageous that by enlarging the pads and / or bore points on the first or second auxiliary mask, the geometry of pads, bore points and conductor tracks or other components of the circuit is retained. This means that in the case of a circular pad, a circular environment of this pad is generated together with the pad on the first mask by means of the first auxiliary mask.
• pads and / or bore points of any shape In any case, the pads and / or bore points on all masks are geometrically similar to one another.
• first and second auxiliary masks are superimposed on the first basic mask in such a way that the centroids of pads and / or bore points on the auxiliary mask and basic mask lie one above the other. In this way, the one transferred to the first mask is transferred or the surroundings of pads and / or bore points hidden by the second mask are formed symmetrically around pads and / or bore points.
• the design and manufacture of basic masks, first and second masks and associated auxiliary masks is particularly simplified if this is done using a CAD method.
• the entire circuit can be produced in a simple manner on a computer as a design.
• the design is transferred in a known manner to a mask, the first and second auxiliary masks being easily produced by means of the computer using appropriate software in the CAD method from the basic masks formed in this way.
• the first and second auxiliary masks can be superimposed in an equally simple manner with the first basic mask for producing the first and second masks.
• connection piece can be produced in a simple manner by widening a conductor track end adjoining the pad or bore point.
• a so-called "teardrop” function which is implemented in CAD processes, can be used to form the connecting pieces.
• the connection piece present in the first mask is replaced by the "teardrop”. This forms an extension of the pad or bore point pointing in the direction of the conductor tracks, wherein it extends so far in the direction of the conductor track that the conductor track structure shown on the second mask at least partially overlaps the "teardrop".
• solder layer is applied to these in a contact area of pads and conductor tracks. This serves to protect the conductor track when etching off the metallization of the circuit board.
• the conductor tracks are also covered by a solder layer when etching off the metallization.
• the contact area is formed by a connector designed to connect the pad and the associated conductor track, on which the solder layer and on which the photoresist layer is applied.
• the overlap of the photoresist layer and the solder layer ensures the connection of the conductor track to the connector and thus to the pad when etching off the metallization. An interruption by removing the metallization between the pad or connection piece and the conductor track cannot take place.
• the connection piece is formed by an end piece of the conductor track. In this way, the connector and conductor track are designed with the same width. It can also be advantageous here, in particular in the case of fine conductor tracks, if the connecting piece has a greater width than the conductor track.
• the advantage is that the solder layer is largely melted only in its exposed area on the pad when electronic components are soldered on. Consequently, there is no melting of the solder layer up to the photoresist layer.
• connection bores for electrical connection from opposite sides of the printed circuit board, the connection bores being able to be connected to printed conductors on both sides, it is advantageous if a metal and the solder layer are applied to at least one inside of the connection bore and at least on On one side of the printed circuit board, a corresponding connection piece with applied solder layer and photoresist layer and solder stop layer protrudes from the connection bore.
• Cu or PbSN in particular can be used as the metal or material of the solder layer.
• the uniform layer thickness of the applied solder layer simplifies an optical control of the printed circuit board. This control takes place in that the light reflected by the solder layers is detected and evaluated to check the arrangement of at least the pads.
• Such an optical inspection of the circuit board is only possible with the known method using HAL 1 o
• the optical control is particularly reliable on matt surfaces of the solder layer. Such surfaces are naturally present in the method according to the invention for producing the printed circuit boards unless the solder layer is additionally melted, for example by infrared radiation. As stated above, such melting serves only to produce shiny surfaces of the solder layers, which are of no importance for the functionality of the solder layer or the printed circuit board.
• FIG. 5 shows a plan view of a section of a printed circuit board, FIG. 4 corresponding to a section along the line IV-IV from FIG. 5;
• FIG. 13 shows a further section of a circuit formed on a printed circuit board with a “teardrop”.
• FIG. 1 A longitudinal section through a printed circuit board is shown in FIG.
• One side of the printed circuit board for the application of electronic components is visible, the side opposite this side not being shown for the sake of simplicity.
• the method described below can be carried out in a corresponding manner on both sides of the circuit board.
• the circuit board is essentially formed from an insulating substrate 1.
• This substrate can be an epoxy resin optionally containing glass fibers, polyimide, PTFE, a metal core carrier with an electrophoretically applied and baked ceramic insulating layer or the like.
• a copper metallization 2 and a first photoresist layer 3 are applied to the surface of the substrate 1. Copper metallization 2 and first photoresist layer 3 essentially cover the entire surface of the substrate 1.
• connection areas (pads) 4 and connection bores 5 the first photoresist layer 3 is exposed through a corresponding first mask and the exposed areas this layer is removed, the removal being carried out in the usual way by means of appropriate chemical solvents, acids, plasma etching or the like.
• a solder layer made of PbSn is later applied galvanically.
• the connection hole 5 is punched or drilled, see Figure 2.
• a copper metallization 2 is applied within the bore, which is connected to the corresponding copper metallizations on the surfaces of the substrate 1 stands.
• the solder layer 6 is applied to the copper metallization 2 within the connection hole 3, wherein it additionally frames the hole on the surface of the substrate 1.
• the remaining first photoresist layer 3 is removed and a second photoresist layer 7 is applied to the entire surface of the printed circuit board, see FIG. 3.
• the second photoresist layer 7 can also be applied within the Connection hole 5 may be applied to the solder layer 6.
• the second photoresist layer 7 is exposed by means of a second mask and in particular removed from the solder layers 6 of pads 4 and connecting bores 5.
• the second photoresist layer 7 remains for structuring conductor tracks between the pads, between connecting holes 5 to be connected and between pads 4 to be connected and connecting holes 5, see FIG. 4.
• the copper metallization 2 is removed in all areas on the surface of the printed circuit board in which it not covered by the second photoresist layer 7 or the solder layer 6 is covered. Consequently, the copper metallization remains under the pads, within the connection bore 5 and, to form conductor tracks, under the remaining second photoresist layer 7.
• a layer 8 of solder mask is applied to the entire surface of the circuit board, the solder mask not the solder layer 6 covered in the area of the pads 4 and the connecting bore 5, see FIG. 4.
• FIG. 5 shows a plan view of a section of the printed circuit board produced according to FIGS. 1 to 4.
• FIG. 4 corresponds to a section along the line IV-IV, the layer 8 of solder mask being omitted in FIG. 5 for simplification.
• the pads 4 have an essentially square shape, wherein they are covered with the solder layer 6.
• a copper metallicization 2, which is covered by the remainder of the second photoresist layer 7, runs between the two pads shown on the substrate 1. This is also arranged below the solder layer 6 to form the pads and inside the connecting bore 5.
• the ends of the second photoresist layer 7 are formed at a distance from the pads 4. Below end pieces of the second photoresist layer 7, connecting pieces formed by the solder layer 6 extend in an overlap region 10. These protrude from the essentially square pads in the direction of the conductor tracks and, together with the second photoresist layer 7, cover the copper metallicization 2 which forms the conductor tracks, see FIG. 4.
• the distance between the two connecting pieces of the adjacent pads 4 which are to be pointed towards one another is less than the distance between the ends 9 of the second photoresist layer 7, so that it covers the solder layer 6 in the overlap region 10.
• a second photoresist layer 7 with a corresponding one is between the connection bore 5 and the one pad 4
• Overlap area 10 is applied to the connection pieces of pad 4 and connecting bore 5 formed by solder layer 6.
• connection hole 5 is surrounded in a ring on the substrate 1 by a solder layer 6, the connector projecting from this in the direction of the pad 4.
• FIGS. 6 to 11 show the production of the first and second mask for use in the method according to the invention for producing a printed circuit board.
• the circuit structure shown on the masks has only two pads 14 and 15 spaced apart from one another and a conductor track 18 running straight between them.
• the pads 14 and 15 are substantially circular.
• a first basic mask 17 with the simplified circuit arrangement is shown in FIG. 9.
• the first basic mask 17 is designed as a negative mask.
• each of the masks shown in FIGS. 6 to 11 has an index hole 16 at the same location.
• FIG. 6 shows a second basic mask 11, in which only the pads 14 and 15 shown in the first basic mask 17 are present.
• FIG. 7 shows a first auxiliary mask 13 in which the pads 14 and 15 of the second basic mask 11 are shown enlarged by a first magnification factor. It should be noted that the centroids of the pads 14 and 15 have the same distance in both masks 11 and 12.
• the first auxiliary mask 13 is a negative mask, only areas outside the pads 14 and 15 being exposed through these masks.
• FIG. 8 shows a second auxiliary mask 12 in which the pads 14 and 15 of the second basic mask 11 are enlarged by a second enlargement factor. The second enlargement factor is smaller than the first enlargement factor.
• the second auxiliary mask 12 is designed as a positive mask.
• the first mask 19 shown in FIG. 10 results.
• the first auxiliary mask 13 is arranged relative to the first basic mask 17 such that the Center of gravity of the pads 14 and 15, in this case the center points, one above the other, which are arranged.
• the first mask 19 in the vicinity of the pads 14 and 15 has connecting pieces 21 and 22, which are formed by the ends of the conductor track 18 from FIG. 9, which lie within the pads 14 and 15 of the first auxiliary mask 13.
• the second auxiliary mask 12 and the first basic mask 17 are arranged one above the other. Again, the centroids of the pads 14 and 15 of the second auxiliary mask 12 are arranged above or below the centroids of the pads 14 and 15 from the first basic mask 17.
• the pads 14 and 15 of these two masks have different radii.
• the second auxiliary mask is superimposed on the first basic mask 17, a conductor track connecting piece 24 is produced, the length 25 of which is greater than a distance 23, see FIG. 10, of the connecting pieces 21 and 22. Consequently, when the first mask 19 is overlaid with the second mask 20, there is an overlap between the conductor track connecting piece 24 and connecting pieces 21 and 22.
• the first mask 19 is used to expose the first photoresist layer using the method according to the invention.
• the unexposed part of the first photoresist layer is removed after exposure in order to apply the solder layer 6, see FIG. 3, to the pads 4, see FIG. 2.
• the second mask 20 is a negative mask. Therefore, in the method according to the invention for producing the printed circuit board, the unexposed part of the second photoresist layer is removed, which results in the arrangement of the second photoresist layer 7 according to FIG. 4. Due to the overlap of conductor track connector 24 according to FIG. 11 and the connecting pieces 21 and 22 according to FIG. 10, the overlap areas marked with "X" in FIG. 4 or the overlap areas marked with "10" in FIG. 5 result.
• the masks 19 and 20 shown in FIGS. 10 and 11 are simplified basic representations of the masks actually used in the method according to the invention.
• FIGS. 12 and 13 A more complex circuit structure is shown in FIGS. 12 and 13. This is produced in an analogous manner using corresponding first and second masks.
• FIG. 12 shows a section 26 of a circuit arranged on a circuit board.
• This comprises a plurality of pads 29, 30 and 31.
• the pads 29 have a circular cross section, the pads 30 have a rectangular cross section and the pads 31 have a substantially square cross section.
• Some of the circular pads 29 can, for example, be formed with a connection bore, so that a connection bore 32 results.
• coarser conductor tracks 28 are formed.
• the overlap of solder layer 6 and second photoresist layer 7 shown in FIGS. 4 and 5 takes place in each case in the contact area between conductor tracks 27, 28 and pads or connecting bore 29, 30, 31 and 32.
• FIG. 13 shows a further section 26 of a circuit shown on the circuit board.
• corresponding conductor tracks 27, 28 and pads or connecting bores 29, 30, 31 and 32 are formed.
• a so-called “teardrop” is arranged in their contact area, that is to say in the area where the overlap according to FIGS. 4 and 5 takes place, for connecting the fine conductor tracks 27 to the pads or connecting bores.
• This has a greater width than the fine conductor tracks, which facilitates a corresponding overlap of solder layer applied, for example, to pad 29 and teardrop 34 with a second photoresist layer applied to conductor track 27.
• the overlap of the solder layer and the second photoresist layer means that an interruption between pads / bore points and conductor tracks when the unnecessary metallization layer is removed from the circuit board is excluded.
• the superimposition is facilitated by arranging so-called "teardrops" with very thin conductor tracks. Small inaccuracies when structuring the conductor tracks are tolerated in this way.
• the method according to the invention a number of complex process steps of the known manufacturing method of printed circuit boards are no longer necessary, such as removing the solder layer from conductor tracks and pads, the HAL process and all associated chemical and mechanical treatments of the printed circuit board. Furthermore, the solder layer can be applied to the pad with a controlled layer thickness and with a flat surface. The additional liquid solder used in the HAL process Layer for reapplying the solder layer on the pads is no longer necessary, which means that the environmental pollution caused by lead vapors, corresponding etching solutions and the like is eliminated at the same time. Finally, the method according to the invention is considerably less expensive than the manufacturing method using the HAL method, since the expensive HAL devices are no longer necessary.

Landscapes

• Engineering & Computer Science (AREA)
• Manufacturing & Machinery (AREA)
• Microelectronics & Electronic Packaging (AREA)
• Electric Connection Of Electric Components To Printed Circuits (AREA)

Applications Claiming Priority (1)

Publications (1)

Family

ID=8165721

Family Applications (1)

Country Status (3)

Families Citing this family (1)

Family Cites Families (8)

• 1993
  • 1993-04-26 WO PCT/EP1993/001004 patent/WO1994026081A1/de not_active Application Discontinuation
  • 1993-04-26 EP EP93909840A patent/EP0696409A1/de not_active Ceased
  • 1993-05-19 TW TW082103943A patent/TW234234B/zh active

Non-Patent Citations (1)

Also Published As

Similar Documents

Legal Events