EP0682362A3 - Procédé de fabrication d'un dispositif semi-conducteur avec un transistor DMOS. - Google Patents
Procédé de fabrication d'un dispositif semi-conducteur avec un transistor DMOS. Download PDFInfo
- Publication number
- EP0682362A3 EP0682362A3 EP95107271A EP95107271A EP0682362A3 EP 0682362 A3 EP0682362 A3 EP 0682362A3 EP 95107271 A EP95107271 A EP 95107271A EP 95107271 A EP95107271 A EP 95107271A EP 0682362 A3 EP0682362 A3 EP 0682362A3
- Authority
- EP
- European Patent Office
- Prior art keywords
- manufacturing
- semiconductor device
- dmos transistor
- dmos
- transistor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/64—Double-diffused metal-oxide semiconductor [DMOS] FETs
- H10D30/65—Lateral DMOS [LDMOS] FETs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/01—Manufacture or treatment
- H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
- H10D30/028—Manufacture or treatment of FETs having insulated gates [IGFET] of double-diffused metal oxide semiconductor [DMOS] FETs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/64—Double-diffused metal-oxide semiconductor [DMOS] FETs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/0107—Integrating at least one component covered by H10D12/00 or H10D30/00 with at least one component covered by H10D8/00, H10D10/00 or H10D18/00, e.g. integrating IGFETs with BJTs
- H10D84/0109—Integrating at least one component covered by H10D12/00 or H10D30/00 with at least one component covered by H10D8/00, H10D10/00 or H10D18/00, e.g. integrating IGFETs with BJTs the at least one component covered by H10D12/00 or H10D30/00 being a MOS device
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/02—Manufacture or treatment characterised by using material-based technologies
- H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
- H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/13—Semiconductor regions connected to electrodes carrying current to be rectified, amplified or switched, e.g. source or drain regions
- H10D62/149—Source or drain regions of field-effect devices
- H10D62/151—Source or drain regions of field-effect devices of IGFETs
- H10D62/156—Drain regions of DMOS transistors
- H10D62/157—Impurity concentrations or distributions
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP09940994A JP3186421B2 (ja) | 1994-05-13 | 1994-05-13 | 半導体装置の製造方法 |
| JP99409/94 | 1994-05-13 | ||
| JP9940994 | 1994-05-13 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| EP0682362A2 EP0682362A2 (fr) | 1995-11-15 |
| EP0682362A3 true EP0682362A3 (fr) | 1996-11-27 |
| EP0682362B1 EP0682362B1 (fr) | 1999-08-04 |
Family
ID=14246690
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| EP95107271A Expired - Lifetime EP0682362B1 (fr) | 1994-05-13 | 1995-05-12 | Procédé de fabrication d'un dispositif semi-conducteur avec un transistor DMOS |
Country Status (3)
| Country | Link |
|---|---|
| EP (1) | EP0682362B1 (fr) |
| JP (1) | JP3186421B2 (fr) |
| DE (1) | DE69511160T2 (fr) |
Families Citing this family (17)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0880183A3 (fr) * | 1997-05-23 | 1999-07-28 | Texas Instruments Incorporated | Dispositif de puissance LDMOS |
| JP5183835B2 (ja) * | 2000-11-02 | 2013-04-17 | ローム株式会社 | 半導体装置およびその製造方法 |
| JP2002314065A (ja) * | 2001-04-13 | 2002-10-25 | Sanyo Electric Co Ltd | Ｍｏｓ半導体装置およびその製造方法 |
| JP2003060199A (ja) * | 2001-08-10 | 2003-02-28 | Sanyo Electric Co Ltd | 半導体装置とその製造方法 |
| US6747332B2 (en) * | 2002-04-01 | 2004-06-08 | Motorola, Inc. | Semiconductor component having high voltage MOSFET and method of manufacture |
| JP2005236142A (ja) * | 2004-02-20 | 2005-09-02 | Shindengen Electric Mfg Co Ltd | 横型短チャネルｄｍｏｓ及びその製造方法並びに半導体装置 |
| DE102004043284A1 (de) * | 2004-09-08 | 2006-03-23 | X-Fab Semiconductor Foundries Ag | DMOS-Transistor für hohe Drain- und Sourcespannungen |
| KR100734143B1 (ko) * | 2006-08-30 | 2007-06-29 | 동부일렉트로닉스 주식회사 | 디모스 트랜지스터 및 그 제조방법 |
| KR101405310B1 (ko) | 2007-09-28 | 2014-06-12 | 삼성전자 주식회사 | 반도체 집적 회로 장치 및 그 제조 방법 |
| JP5354951B2 (ja) * | 2008-05-13 | 2013-11-27 | ラピスセミコンダクタ株式会社 | 半導体装置及びその製造方法 |
| JP5359107B2 (ja) * | 2008-08-11 | 2013-12-04 | ミツミ電機株式会社 | 半導体装置及びその製造方法 |
| KR101175228B1 (ko) | 2009-12-04 | 2012-08-21 | 매그나칩 반도체 유한회사 | 반도체 장치 |
| KR101098447B1 (ko) | 2009-12-04 | 2011-12-26 | 매그나칩 반도체 유한회사 | 반도체 장치 |
| JP5542623B2 (ja) * | 2010-11-09 | 2014-07-09 | 株式会社東芝 | 半導体装置及びその製造方法 |
| JP2013187263A (ja) * | 2012-03-06 | 2013-09-19 | Canon Inc | 半導体装置、記録装置及びそれらの製造方法 |
| JP2016207830A (ja) * | 2015-04-22 | 2016-12-08 | トヨタ自動車株式会社 | 絶縁ゲート型スイッチング素子とその制御方法 |
| JP6075816B1 (ja) * | 2016-10-20 | 2017-02-08 | 株式会社ツインズ | 多目的運動器具 |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0484321A1 (fr) * | 1987-08-24 | 1992-05-06 | Hitachi, Ltd. | Méthode de fabrication d'un dispositif semi-conducteur à porte isolée |
| EP0653786A2 (fr) * | 1993-10-26 | 1995-05-17 | Fuji Electric Co. Ltd. | Procédé ou fabrication d'un dispositif semi-conducteur |
-
1994
- 1994-05-13 JP JP09940994A patent/JP3186421B2/ja not_active Expired - Fee Related
-
1995
- 1995-05-12 DE DE69511160T patent/DE69511160T2/de not_active Expired - Fee Related
- 1995-05-12 EP EP95107271A patent/EP0682362B1/fr not_active Expired - Lifetime
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0484321A1 (fr) * | 1987-08-24 | 1992-05-06 | Hitachi, Ltd. | Méthode de fabrication d'un dispositif semi-conducteur à porte isolée |
| EP0653786A2 (fr) * | 1993-10-26 | 1995-05-17 | Fuji Electric Co. Ltd. | Procédé ou fabrication d'un dispositif semi-conducteur |
Non-Patent Citations (1)
| Title |
|---|
| ROSSEL P: "M.O.S. TECHNOLOGIES FOR SMART POWER AND HIGH-VOLTAGE CIRCUITS", ONDE ELECTRIQUE, vol. 67, no. 6, 1 November 1987 (1987-11-01), pages 58 - 69, XP000111247 * |
Also Published As
| Publication number | Publication date |
|---|---|
| EP0682362A2 (fr) | 1995-11-15 |
| EP0682362B1 (fr) | 1999-08-04 |
| DE69511160D1 (de) | 1999-09-09 |
| JP3186421B2 (ja) | 2001-07-11 |
| DE69511160T2 (de) | 2000-01-27 |
| JPH07307401A (ja) | 1995-11-21 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| EP0653786A3 (fr) | Procédé ou fabrication d'un dispositif semi-conducteur. | |
| EP0682362A3 (fr) | Procédé de fabrication d'un dispositif semi-conducteur avec un transistor DMOS. | |
| EP0762510A3 (fr) | Procédé de fabrication d'un dispositif monolithique semi-conducteur avec des structures micro-usinées en surface | |
| FR2738079B1 (fr) | Dispositif a semiconducteurs, a tranchee, et procede de fabrication | |
| FR2713016B1 (fr) | Dispositif semiconducteur à haute intégration et procédé pour la fabrication de celui-ci. | |
| EP0703628A3 (fr) | Dispositif MOSFET avec mobilité augmentée et méthode de fabrication | |
| FR2719943B1 (fr) | Procédé de fabrication d'un dispositif d'affichage. | |
| EP0642167A3 (fr) | Dispositif semi-conducteur avec capacité et son procédé de fabrication. | |
| EP0687002A3 (fr) | Procédé de fabrication d'un dispositif semi-conducteur du type SOI | |
| EP1014453A4 (fr) | Dispositif a semiconducteur et procede de fabrication d'un tel dispositif | |
| FR2768836B1 (fr) | Dispositif d'identification et procede de fabrication du dispositif associe | |
| EP0609918A3 (fr) | Procédé de fabrication d'une électrode à protubérance d'un dispositif semi-conducteur. | |
| EP0673069A3 (fr) | Dispositif semi-conducteur à grille isolée et procédé de fabrication. | |
| EP0921563A4 (fr) | Dispositif a semi-conducteur comprenant un element mos et son procede de fabrication | |
| EP0693779A3 (fr) | Dispositif semi-conducteur du type à encapsulation par résine et procédé de fabrication | |
| FR2714525B1 (fr) | Procédé de fabrication d'un dispositif à semiconducteur comprenant des transistors à effet de champ métal-oxyde-semiconducteur. | |
| EP0593247A3 (fr) | Dispositif à mémoire semi-conducteur et procédé de fabrication associé. | |
| FR2720856B1 (fr) | Electrode de cablage pour dispositif à semi-conducteur et son procédé de fabrication. | |
| FR2689683B1 (fr) | Dispositif semiconducteur a transistors complementaires. | |
| EP0646952A3 (fr) | Dispositif à semi-conducteur bipolaire et son procédé de fabrication. | |
| EP0602995A3 (fr) | Procédé et appareillage pour la fabrication d'un dispositif MOS. | |
| FR2708142B1 (fr) | Procédé de fabrication d'un transistor en technologie silicium sur isolant. | |
| EP0696062A3 (fr) | Dispositif semi-conducteur CMOS et procédé de fabrication associé | |
| FR2778495B1 (fr) | Dispositif semiconducteur a structure mos et procede de fabrication d'un tel dispositif | |
| FR2779008B1 (fr) | Procede de fabrication d'un dispositif a semiconducteur |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PUAI | Public reference made under article 153(3) epc to a published international application that has entered the european phase |
Free format text: ORIGINAL CODE: 0009012 |
|
| AK | Designated contracting states |
Kind code of ref document: A2 Designated state(s): DE FR GB NL |
|
| PUAL | Search report despatched |
Free format text: ORIGINAL CODE: 0009013 |
|
| AK | Designated contracting states |
Kind code of ref document: A3 Designated state(s): DE FR GB NL |
|
| 17P | Request for examination filed |
Effective date: 19970522 |
|
| 17Q | First examination report despatched |
Effective date: 19970623 |
|
| GRAG | Despatch of communication of intention to grant |
Free format text: ORIGINAL CODE: EPIDOS AGRA |
|
| GRAG | Despatch of communication of intention to grant |
Free format text: ORIGINAL CODE: EPIDOS AGRA |
|
| GRAH | Despatch of communication of intention to grant a patent |
Free format text: ORIGINAL CODE: EPIDOS IGRA |
|
| GRAH | Despatch of communication of intention to grant a patent |
Free format text: ORIGINAL CODE: EPIDOS IGRA |
|
| GRAA | (expected) grant |
Free format text: ORIGINAL CODE: 0009210 |
|
| AK | Designated contracting states |
Kind code of ref document: B1 Designated state(s): DE FR GB NL |
|
| REF | Corresponds to: |
Ref document number: 69511160 Country of ref document: DE Date of ref document: 19990909 |
|
| ET | Fr: translation filed | ||
| PGFP | Annual fee paid to national office [announced via postgrant information from national office to epo] |
Ref country code: GB Payment date: 20000510 Year of fee payment: 6 Ref country code: FR Payment date: 20000510 Year of fee payment: 6 |
|
| PGFP | Annual fee paid to national office [announced via postgrant information from national office to epo] |
Ref country code: NL Payment date: 20000531 Year of fee payment: 6 |
|
| PLBE | No opposition filed within time limit |
Free format text: ORIGINAL CODE: 0009261 |
|
| STAA | Information on the status of an ep patent application or granted ep patent |
Free format text: STATUS: NO OPPOSITION FILED WITHIN TIME LIMIT |
|
| 26N | No opposition filed | ||
| PG25 | Lapsed in a contracting state [announced via postgrant information from national office to epo] |
Ref country code: GB Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES Effective date: 20010512 |
|
| PG25 | Lapsed in a contracting state [announced via postgrant information from national office to epo] |
Ref country code: NL Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES Effective date: 20011201 |
|
| GBPC | Gb: european patent ceased through non-payment of renewal fee |
Effective date: 20010512 |
|
| PG25 | Lapsed in a contracting state [announced via postgrant information from national office to epo] |
Ref country code: FR Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES Effective date: 20020131 |
|
| NLV4 | Nl: lapsed or anulled due to non-payment of the annual fee |
Effective date: 20011201 |
|
| PGFP | Annual fee paid to national office [announced via postgrant information from national office to epo] |
Ref country code: DE Payment date: 20090511 Year of fee payment: 15 |
|
| PG25 | Lapsed in a contracting state [announced via postgrant information from national office to epo] |
Ref country code: DE Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES Effective date: 20101201 |