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EP0635819B1 - Verfahren und Einrichtung zur Steuerung einer Mikrospitzenanzeigevorrichtung - Google Patents

Verfahren und Einrichtung zur Steuerung einer Mikrospitzenanzeigevorrichtung Download PDF

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Publication number
EP0635819B1
EP0635819B1 EP94401670A EP94401670A EP0635819B1 EP 0635819 B1 EP0635819 B1 EP 0635819B1 EP 94401670 A EP94401670 A EP 94401670A EP 94401670 A EP94401670 A EP 94401670A EP 0635819 B1 EP0635819 B1 EP 0635819B1
Authority
EP
European Patent Office
Prior art keywords
voltages
column
voltage
time
columns
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
EP94401670A
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English (en)
French (fr)
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EP0635819A1 (de
Inventor
Denis Sarrasin
Michel Garcia
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Pixtech SA
Commissariat a lEnergie Atomique et aux Energies Alternatives CEA
Original Assignee
Commissariat a lEnergie Atomique CEA
Pixtech SA
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Publication of EP0635819A1 publication Critical patent/EP0635819A1/de
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    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/2007Display of intermediate tones
    • G09G3/2011Display of intermediate tones by amplitude modulation
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/2007Display of intermediate tones
    • G09G3/2014Display of intermediate tones by modulation of the duration of a single pulse during which the logic level remains constant

Definitions

  • the present invention relates to a method and a device for control of a matrix display screen intended to display images having different gray levels, of the fluorescent microtip screen type.
  • the images can be in black and white or in color, the expression "grayscale” meaning in the latter case "halftone of color”.
  • Microtip fluorescent screens are known and notably described by R. Meyer in the article entitled “Microtips Fluorescent Display”(" Japan Display “86, page 512).
  • the first frame providing for example the low weights (0, 1, 2, 3, 4, 5, 6, 7) and the second the most significant (0, 8, 16, 24, 32, 40, 48, 56), which provides sixty four gray levels, as described in the article by K. Takahara, T. Yamaguchi, M. Oda, H. Yamaguchi and M. Okabe entitled "16-Level-Gray-Scale Driver Architecture and Full-Color Driving for TFT-LCD" (IDRC 91 Digest, pages 115 to 118). This method however limits the contrast of the screen.
  • Digital type circuits are precisely of interest to have a very low own consumption since they function as as many switches, without the need for bias current and with very short response times.
  • the object of the invention is to propose a method and a device for controlling a matrix display screen of the fluorescent screen type a microtips to solve the various problems defined above.
  • the invention relates to a method for controlling a fluorescent microtip screen composed of pixels arranged in L lines and M columns of images capable of comprising a discrete number of Q shades of gray, said method comprising each time a line is selected of the screen during a line selection time T L , the application simultaneously to the columns of the screen of voltages corresponding to the gray levels to be displayed at the image points corresponding to the intersection of said line and said columns, characterized in that that the different column voltage values that can be applied to the columns are chosen from a strictly increasing sequence of N + 1 values such that the line selection time is subdivided into S equal time intervals ⁇ t, each voltage value is applied an integer of times ⁇ t, (NxS) +1 representing the number Q of gray levels, with N ⁇ 2 and S ⁇ 2, and in that during a selection time line T L and as a function of the gray level to be displayed at an image point, the corresponding column voltage takes a first value Va during a certain number of time intervals ⁇ t, then if necessary during the remaining time intervals
  • an addressing mode is used which both the possibilities of time and voltage modulation offered by the response electro-optics of fluorescent microtip screens. Beyond the threshold emission, the luminance obtained is indeed proportional to (VxT), V being the applied cathode grid voltage and T the duration of the application of this voltage. Thanks to the present invention, the consumption advantages of digital circuits and analog addressing mode while allowing selection of a large number of gray levels.
  • the sequencer provides the index P of the addressing sequence within a line time, this index P being coded on (kh) bits.
  • This sequencer is advantageously a counter whose clock includes 2 (kh) pulses per line time, this counter being initialized at each line time.
  • the generator of N + 1 discrete voltages can be formed operational amplifiers mounted as follower amplifiers, with input voltages set by a resistive divider bridge (R1, R2, ........, RN). In the in the case of a linear distribution of the voltages, the resistors all have the same value.
  • the generator of N + 1 discrete voltages can also be built around one or more analog digital converters, themselves piloted by a controller responsible for calculating the values of the N + 1 voltages.
  • a monochrome or color palette circuit can also allow the discrete voltage generator to be managed according to the request for the user.
  • the invention relates to a method for controlling a screen.
  • fluorescent microdots composed of pixels arranged in L lines and M image columns likely to have a discreet number of shades of Grey.
  • the columns are controlled by signals intended to activate them. These column signals allow the selection of a voltage Vi chosen from N + 1 with N ⁇ 2 and 0 ⁇ i ⁇ N.
  • N + 1 voltages Vi are chosen such that their values form a strictly increasing sequence.
  • Line time is subdivided into S equal time intervals ⁇ t, S being an integer with S ⁇ 2.
  • the column signal During a line selection time T L and as a function of the gray level to be displayed, the column signal must take a first voltage value Va during a certain number of time intervals ⁇ t, then if necessary during the intervals of remaining time, at most a second voltage value Vb, this second value being consecutive to the first in the series of N voltages.
  • the shade of gray of rank 2 will be obtained by applying the voltage V1 for a time ⁇ t + ⁇ t, and to obtain the shade of gray of rank S it will have to be applied for S times the time ⁇ t.
  • the tint of rank gray (S + 1) will be obtained by applying a voltage V2 during a time ⁇ t and voltage V1 during the (S - 1) other time intervals.
  • Vi ix (V N / N)
  • the luminance / voltage response (line / column or grid / cathode V GC ) of a fluorescent microtip screen being of the type of that of FIG. 2, using equal time intervals and judiciously chosen voltages, we can match this response in successive ranges to the desired curve.
  • the voltage applied to a selected line brings the line / column voltage at the limit of the emission threshold (while the voltage row / column for an unselected row is always below this threshold). Also, the voltage applied to a column, during this selection time line, immediately causes a more or less significant emission (depending on the luminance / voltage curve). The emission therefore takes place only during the time of line selection.
  • the method described in the invention relies on this characteristic to propose a construction of the gray levels by box.
  • patent application EP-0 478 386 practice limits the discrete number of usable external voltages Vi.
  • Q (SxN) +1 gray levels, (from 0 to Q-1) by the simultaneous selection of 0, 1, 2, or (Q-1) boxes.
  • the method of the invention digitizes the time space of row / column voltage selection by cutting this time into S time intervals predefined equals so that switching between two voltages selected can be done at the start of any interval.
  • the switching between two neighboring voltages from a generator.
  • this voltage intermediate is obtained by using the charging time of said capacitor at through its control transistor by playing on the start time of the charge.
  • switching between the two rather, the selected voltages are found at the end of the line selection time.
  • Figures 3A and 3B are intended to help better understand the possibility of adjusting the differences between the N voltages.
  • FIG. 3A shows the distribution of the luminances L obtained in the case of deviations of equal voltages V.
  • FIG. 3B shows a linear distribution of the luminances L obtained by adjusting these voltages V.
  • the circuits 13 for controlling the columns of the screen are conventionally constituted by a shift register 16 of k inputs and kx M outputs, each output being associated with a storage flip-flop 17.
  • each control circuit of a column includes a part of the shift register and k flip-flops.
  • Each word K thus memorized in the k flip-flops of a control circuit of a column must be able to validate the control of a voltage chosen from N + 1.
  • the control circuit therefore comprises multiplexing means. The original part of the device concerns these means.
  • FIG. 5 illustrates the constitution of the multiplexing means specific to the invention.
  • These means include a circuit n bit binary decoder 22 (1 among 2 n ), a comparator 24, a combinational logic circuit 25 and N + 1 analog switches 21 whose outputs are all connected to the column output Sc of the channel considered and the analog inputs are connected to the generator 14.
  • the validation inputs of these switches are determined as described below:
  • the word H is used to determine the pair of voltages (Vi, Vi + 1) adapted to the gray level to be displayed and supplies the circuit 22 binary decoder n bits 1 among 2 n to produce the N signals H 0 to H N-1 which translate the coding of H.
  • This sequencer which supplies the index P of the addressing sequence within a line time, P being coded on (kh) bits.
  • This sequencer can for example be a counter 23 whose CPG clock comprises 2 (kh) pulses per line time, this counter 23 being initialized at each line time ("load" signal).
  • This counter 23 can be an external counter or a counter per circuit.
  • E be a coding bit
  • the generator 14 of N + 1 discrete voltages can be, for example, made up of N + 1 operational amplifiers 30 mounted as followers, with input voltages fixed by a resistive divider bridge R1, R2, ..., RN.
  • the extreme voltages V 0 and V N are obtained directly (without adaptation of impedance by an operational amplifier mounted in follower) from said terminals.
  • the resistors R1-RN will all have the same value, otherwise their ratio will be calculated according to the values V 0 to V N desired.
  • this generator of N + 1 discrete voltages can also be frame, as shown in Figure 7, around one or more converters analog digital 31, themselves controlled by a controller 32 responsible for calculate the values of the N + 1 voltages, and followed by amplifiers 33.

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)

Claims (10)

  1. Verfahren zur Steuerung eines Mikrospitzen-Bildschirms, gebildet durch Pixel, angeordnet zu Zeilen L und Spalten M von Bildern mit einer diskreten Anzahl Q von Grautönen, wobei dieses Verfahren bei jeder Ansteuerung einer Zeile des Bildschirms während einer Zeilenansteuerungszeit TL simultan das Anlegen von Spannungen an die Spalten des Bildschirms umfaßt, die dem in denjenigen Bildpunkten anzuzeigenden Graupegel entsprechen, die den Schnittpunkten der genannten Zeile und der genannten Spalten entsprechen,
    dadurch gekennzeichnet,
    daß die verschiedenen Spaltenspannungswerte, die an die Spalten gelegt werden können, in einer strikt ansteigenden Folge von N+1 Werten gewählt werden, so daß die Zeilenansteuerungszeit in S gleiche Intervalle der Zeit Δt unterteilt wird, wobei jeder Spannungswert eine Ganzzahl mal Δt mal angelegt wird und (NxS)+1 die Anzahl Q der Graupegel darstellt, mit N≥2 und S≥2, und dadurch, daß während einer Zeilenansteuerungszeit TL und in Abhängigkeit von dem in einem Bildpunkt anzuzeigenden Graupegel die entsprechende Spaltenspannung während einer bestimmten Anzahl von Zeitintervallen Δt einen ersten Wert Va annimmt und dann gegebenenfalls während den restlichen Zeitintervallen höchstens einen zweiten Wert Vb, wobei dieser zweite Wert in der Folge der N Spannungen dem ersten nachfolgt.
  2. Vorrichtung zur Steuerung der Spalten eines Mikrospitzen-Fluoreszenzschirms (15), die ermöglicht, Graupegel nach dem Verfahren des Anspruchs 1 anzuzeigen, umfassend:
    eine Digitaldatenquelle (10), die Wörter K liefert, in denen die anzuzeigende Information auf k Bits codiert sind;
    eine Bildschirm-Steuereinheit (11), die von der Datenquelle Synchronisationsignale erhält und die verschiedenen Signale zum Steuern der Steuerschaltungen (13) der Spalten des Bildschirms (15) verwaltet;
    einen Generator (14) von N+1 diskreten Spannungen;
    Steuerschaltungen (13) der Spalten des Bildschirms (15);
    wobei die Bildschirmspalten-Steuerschaltungen (13) ein Schieberegister (16) mit k Eingängen und k x M Ausgängen umfassen, jeder Ausgang einer Speicherkippschaltung (17) und Analogmultiplexingeinrichtungen zugeordnet ist, einerseits verbunden mit den k x M Kippschaltungen und mit dem Generator, und andererseits mit den M Spalten, und diese Einrichtungen ermöglichen, auf jede Spalte eine Spannung zu schalten, ausgewählt zwischen N +1 in Abhängigkeit von dem Wort K, gespeichert in den dieser Spalte zugeordneten k Kippschaltungen.
  3. Vorrichtung nach Anspruch 2, dadurch gekennzeichnet, daß jedes in den k Kippschaltungen einer Steuerschaltung einer Spalte gespeicherte Wort K in zwei Wörter H und B unterteilt wird, so daß das Wort H aus den h Bits hoher Wertigkeit von K gebildet wird, mit 2h=N+1, und das Wort B aus den restlichen (k-h) Bits niedriger Wertigkeit gebildet wird, wobei die Multiplexingeinrichtungen der Steuerschaltung einer Spalte umfassen:
    eine Binär-Decodierschaltung n Bits 1 aus 2n, verbunden mit den h Kippschaltungen der genannten Spalte, die im Speicher die h Bits hoher Wertigkeit haben, wobei diese Schaltung N Signale H0 bis HN-1 erzeugt, die die Codierung von H ausdrücken und die ermöglichen, das für die anzuzeigenden Graupegel geeignete Spaltenspannungspaar (Vi, Vi+1) zu wählen;
    einen Komparator, verbunden mit den (k-h) Bits niedriger Wertigkeit und einer Folgeschaltung, fähig den Index P der Adressierungssequenz innerhalb einer über (k-h) Bits codierten Zeilenzeit zu liefern;
    eine kombinatorische Logikschaltung, verbunden mit den Ausgängen der Decodierschaltung und des Komparators;
    N+1 Analog-Schalter, deren analoge Eingänge mit dem Generator und die Validations-Eingänge mit der kombinatorischen Logikschaltung verbunden sind und deren Ausgänge alle mit der entsprechenden Spalte verbunden sind.
  4. Vorrichtung nach Anspruch 3, dadurch gekennzeichnet, daß die Folgeschaltung ein Zähler (23) ist, dessen Takt 2(k-h) Impulse pro Zeilenzeit umfaßt, wobei dieser Zähler bei jeder Zeilenzeit initialisiert wird.
  5. Vorrichtung nach Anspruch 3, dadurch gekennzeichnet, daß der Komparator (24) den Vergleich zwischen den Signalen P und B durchführt und ein Codierungsbit E liefert, so daß: P < B ⇒ E = 1 P ≥ B ⇒ E = 0.
  6. Vorrichtung nach Anspruch 3, dadurch gekennzeichnet, daß die kombinatorische Logigschaltung (25) zwischen dem Codierungsbit E und den Signalen H0 bis HN-1 ermöglicht, die Signale F0 bis FN zu erhalten, die die N+1 Analog-Schalter steuern, so daß: F0 = E.H0 F1 = E.H0 + E.H1 Fi = E.Hi-1 + E.Hi FN-1 = E.HN-2 + E.HN-1 FN = E.HN-1 um in der Zeit die Spannungsänderung Vi bis Vi+1 zu positionieren.
  7. Vorrichtung nach Anspruch 2, dadurch gekennzeichnet, daß der Generator von N+1 diskreten Spannungen durch einen Operationsverstärker (30) gebildet wird, der als Nachführungsverstärker geschaltet ist, mit Eingangsspannungen, die durch eine resitive Teilerbrücke (R1, R2,......., RN) festgelegt werden.
  8. Vorrichtung nach Anspruch 7, dadurch gekennzeichnet, daß im Falle einer linearen Verteilung der Spannungen die Widerstände (R1, R2, ..., RN) der Teilerbrücke alle denselben Wert haben.
  9. Vorrichtung nach Anspruch 2, dadurch gekennzeichnet, daß der Generator von N + 1 diskreten Spannungen (14) um einen oder mehrere Digital-Analog-Wandler (31) herum aufgebaut ist, die ihrerseits durch eine Steuereinheit (32) gesteuert werden, die die Werte der N + 1 Spannungen berechnet.
  10. Vorrichtung nach Anspruch 2, dadurch gekennzeichnet, daß sie eine Monochrom- oder Farbpalettenschaltung umfaßt, die ermöglicht, den Generator der diskreten Spannungen entsprechend dem Bedarf des Benutzers zu steuern.
EP94401670A 1993-07-22 1994-07-20 Verfahren und Einrichtung zur Steuerung einer Mikrospitzenanzeigevorrichtung Expired - Lifetime EP0635819B1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR9309022A FR2708129B1 (fr) 1993-07-22 1993-07-22 Procédé et dispositif de commande d'un écran fluorescent à micropointes.
FR9309022 1993-07-22

Publications (2)

Publication Number Publication Date
EP0635819A1 EP0635819A1 (de) 1995-01-25
EP0635819B1 true EP0635819B1 (de) 1998-11-25

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US (1) US5555000A (de)
EP (1) EP0635819B1 (de)
JP (2) JP3969748B2 (de)
CA (1) CA2128357A1 (de)
DE (1) DE69414771T2 (de)
FR (1) FR2708129B1 (de)

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JPH05100635A (ja) * 1991-10-07 1993-04-23 Nec Corp アクテイブマトリクス型液晶デイスプレイの駆動用集積回路と駆動方法
JP2500417B2 (ja) * 1992-12-02 1996-05-29 日本電気株式会社 液晶駆動回路

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7710363B2 (en) 2004-12-28 2010-05-04 Commissariat A L'energie Atomique Control method for a matrix display screen

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DE69414771T2 (de) 1999-06-10
EP0635819A1 (de) 1995-01-25
DE69414771D1 (de) 1999-01-07
CA2128357A1 (en) 1995-01-23
JP3969748B2 (ja) 2007-09-05
JPH07181917A (ja) 1995-07-21
JP2007140552A (ja) 2007-06-07
FR2708129B1 (fr) 1995-09-01
US5555000A (en) 1996-09-10
FR2708129A1 (fr) 1995-01-27
JP3977412B2 (ja) 2007-09-19

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