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EP0627124A1 - Puce a transistors a effet de champ avec pont d'extraction de chaleur - Google Patents

Puce a transistors a effet de champ avec pont d'extraction de chaleur

Info

Publication number
EP0627124A1
EP0627124A1 EP94905947A EP94905947A EP0627124A1 EP 0627124 A1 EP0627124 A1 EP 0627124A1 EP 94905947 A EP94905947 A EP 94905947A EP 94905947 A EP94905947 A EP 94905947A EP 0627124 A1 EP0627124 A1 EP 0627124A1
Authority
EP
European Patent Office
Prior art keywords
bridge
chip
semiconductor chip
source
field effect
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
EP94905947A
Other languages
German (de)
English (en)
Inventor
John J. Wooldridge
Allen F. Podell
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Raytheon Co
Original Assignee
Hughes Aircraft Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hughes Aircraft Co filed Critical Hughes Aircraft Co
Publication of EP0627124A1 publication Critical patent/EP0627124A1/fr
Ceased legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/20—Electrodes characterised by their shapes, relative sizes or dispositions 
    • H10D64/23—Electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. sources, drains, anodes or cathodes
    • H10D64/251—Source or drain electrodes for field-effect devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/367—Cooling facilitated by shape of device
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
    • H01L23/5381—Crossover interconnections, e.g. bridge stepovers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Definitions

  • This invention is directed to a semiconductor having field effect transistors thereon with a bridge joining the sources of adjacent transistors being substantial with the bridge mounted against a heat- extracting surface so that heat from the transistor is extracted at the source.
  • Coplanar field effect transistors (FET) and particularly gallium arsenide semiconductor FETs are conventionally equipped with a plated air bridge which joins the sources of adjacent FETs.
  • the semiconductor chip is mounted on a support base, and heat is extracted from the FET junctions down through the semiconductor chip and the support base.
  • the semiconductor chip material is a poor heat conductor and, as a consequence, the transistors are heat-limited.
  • the air bridges from source to source are not structurally sufficient to remove significant heat and are used only to ground the sources. With the poor heat conductivity of the semicon ⁇ ductor chip material, especially gallium arsenide, the chip material is sometimes ground down, thinner than possible with slicing, in order to reduce the thermal path.
  • FIG. 1 is an isometric view of a semiconductor chip having a coplanar FET thereon mounted face down on a support base with the heat-extracting bridge of this invention engaged therebetween.
  • FIG. 2 is an enlarged section taken generally along line 2-2 of FIG. 1.
  • FIG. 3 is an view of the chip, as seen generally from the line 3-3 of FIG. 1, removed from the substrate and turned over.
  • FIGS. 1, 2 and 3 show a semiconductor chip 10.
  • the semiconductor chip material is of gallium arsenide, although the heat-extracting structure of this invention is also applicable to other semiconductor materials.
  • the active face of the semiconductor is downwardly directed.
  • the semiconductor chip is upwardly directed, having been turned over as compared to the structure shown in FIGS. 1 and 2.
  • the underside of the semiconductor chip 10, as seen in FIGS. 1 and 2 is the active side.
  • three FET semiconductor devices are shown with three drain connec ⁇ tions 12, 14 and 16. These drain connections are positioned over implanted areas of the semiconductor chip.
  • the semiconductor chip 10 is conventionally about 25 mils thick (0.025 inch), and the active doped areas are close to the lower surface.
  • the drain connections extend toward the edge of the chip 10 at which are located three corresponding pads 18, 20 and 22, respectively. These pads are for connection to external circuitry, as is described below.
  • a pair of gate connections is positioned one on each side of each drain connection.
  • Gate connections 24 and 26 are positioned adjacent drain connection 12; gate connections 28 and 30 are positioned adjacent drain connection 14; and gate connections 32 and 34 are positioned adjacent drain connection 16.
  • these drain connections are carried on the under surface of the semiconductor chip 10. They terminate in pads like the pads 18-22, but in this case, the pads are beyond the broken-away portion of the chip 10, as seen in FIG. 3.
  • Bridge 36 is metallic and may be made of any convenient platable or depositable metal. It has two principal functions. The first is to electrically connect the sources of the several field effect transis ⁇ tors. The second is to carry away heat from the sources. Accordingly, the bridge is preferably about 3 mils thick to prevent the electric field at the FET from penetrating into the mounting substrate material. Silver-plated layers to three mils are suitable. On the other hand, multiple plated layers such as titanium, tungsten, copper and lead-tin are suitable, as is a plating series of titanium, gold, and silver with PbSn or Pbln solder.
  • the bridge 36 has openings 38, 40 and 42 where the bridge passes over the gates and drains to prevent short circuit thereof.
  • the bridge 38 has a flat top 44 by which the chip and bridge are supported from base 46.
  • the base may be any convenient preferably dielectric support, such as ceramic.
  • the dielectric support may be in the ceramic class, such as alumina, beryllia, aluminum nitride or silicon carbide.
  • the substrate may be a thermally conducting organic dielect ⁇ ric material.
  • the top surface of the substrate carries printed wiring which connects to ' -the pads and bridge on the semiconductor chip.
  • printed wiring lines 48, 50 and 52 may carry on the near end thereof (see FIG. 1) underneath the semiconductor chip 10 pads which are respectively in contact with the pads 18, 20 and 22 so that drain connections are made thereto.
  • pads on the gate connection lines may contact pads on the base 46 to carry printed wiring connections to the gates out on the substrate where connections can be made.
  • the height of the bridge above the semiconductor chip and the height of the pads above the semiconductor chip, as seen in FIG. 3, are the same height so that all make contact with pads on the top of the base 46, as seen in FIG. 1. In this way, electrical connections and heat extraction connections are made simultaneously.
  • the chip does not have to be thinned to extract the heat because the heat is extracted from the face at which it is generated.
  • larger chip wafers in the conventional 25 mil thickness can be handled.
  • Heat extraction from the bridge 36 is easily achieved because the substrate 46 can be chosen to have high thermal conductivity, and can be configured to be close to a heat extraction point. By this construction, a higher power integrated circuit chip FET amplifier is achieved by more efficient geometry for the transfer of heat to a heat sink.

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Junction Field-Effect Transistors (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
  • Semiconductor Integrated Circuits (AREA)

Abstract

L'invention se rapporte à une puce de semiconducteur dans laquelle sont incorporés des transistors à effet de champ et qui comprend un pont de source essentiellement en métal reliant les sources de transistors à effet de champ adjacentes. Le pont de source est monté contre un support d'extraction de chaleur, qui sert à la fois à soutenir les transistors à effet de champ et à les refroidir.
EP94905947A 1992-12-22 1993-12-21 Puce a transistors a effet de champ avec pont d'extraction de chaleur Ceased EP0627124A1 (fr)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US99482292A 1992-12-22 1992-12-22
US994822 1992-12-22
PCT/US1993/012495 WO1994015361A1 (fr) 1992-12-22 1993-12-21 Puce a transistors a effet de champ avec pont d'extraction de chaleur

Publications (1)

Publication Number Publication Date
EP0627124A1 true EP0627124A1 (fr) 1994-12-07

Family

ID=25541099

Family Applications (1)

Application Number Title Priority Date Filing Date
EP94905947A Ceased EP0627124A1 (fr) 1992-12-22 1993-12-21 Puce a transistors a effet de champ avec pont d'extraction de chaleur

Country Status (6)

Country Link
EP (1) EP0627124A1 (fr)
JP (1) JPH07505016A (fr)
AU (1) AU668463B2 (fr)
CA (1) CA2117460A1 (fr)
IL (1) IL108151A0 (fr)
WO (1) WO1994015361A1 (fr)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2737342B1 (fr) * 1995-07-25 1997-08-22 Thomson Csf Composant semiconducteur avec dissipateur thermique integre

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0446125A1 (fr) * 1990-03-09 1991-09-11 Thomson-Csf Semiconducteurs Specifiques Composant semi-conducteur de puissance

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4183041A (en) * 1978-06-26 1980-01-08 Rca Corporation Self biasing of a field effect transistor mounted in a flip-chip carrier
CA1200326A (fr) * 1982-11-26 1986-02-04 Franco N. Sechi Transistor a effet de champ a deux grilles a grande puissance

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0446125A1 (fr) * 1990-03-09 1991-09-11 Thomson-Csf Semiconducteurs Specifiques Composant semi-conducteur de puissance

Also Published As

Publication number Publication date
IL108151A0 (en) 1994-04-12
CA2117460A1 (fr) 1994-07-07
AU5985694A (en) 1994-07-19
AU668463B2 (en) 1996-05-02
JPH07505016A (ja) 1995-06-01
WO1994015361A1 (fr) 1994-07-07

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