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EP0561964B1 - Optoelectronic device component package and method of making the same - Google Patents

Optoelectronic device component package and method of making the same Download PDF

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Publication number
EP0561964B1
EP0561964B1 EP92901711A EP92901711A EP0561964B1 EP 0561964 B1 EP0561964 B1 EP 0561964B1 EP 92901711 A EP92901711 A EP 92901711A EP 92901711 A EP92901711 A EP 92901711A EP 0561964 B1 EP0561964 B1 EP 0561964B1
Authority
EP
European Patent Office
Prior art keywords
pattern
electrical conductors
die
plane surface
bumps
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
EP92901711A
Other languages
German (de)
French (fr)
Other versions
EP0561964A1 (en
Inventor
Gary Arthur Hallenbeck
Wilbert Frank Janson, Jr.
William Bruce Jones
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Eastman Kodak Co
Original Assignee
Eastman Kodak Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Eastman Kodak Co filed Critical Eastman Kodak Co
Publication of EP0561964A1 publication Critical patent/EP0561964A1/en
Application granted granted Critical
Publication of EP0561964B1 publication Critical patent/EP0561964B1/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80—Constructional details
    • H10H20/85—Packages
    • H10H20/857—Interconnections, e.g. lead-frames, bond wires or solder balls
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F77/00—Constructional details of devices covered by this subclass
    • H10F77/40—Optical elements or arrangements
    • H10F77/407—Optical elements or arrangements indirectly associated with the devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F77/00—Constructional details of devices covered by this subclass
    • H10F77/50—Encapsulations or containers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80—Constructional details
    • H10H20/85—Packages
    • H10H20/852—Encapsulations
    • H10H20/853—Encapsulations characterised by their shape
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/818—Bonding techniques
    • H01L2224/81801—Soldering or alloying
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01013—Aluminum [Al]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01082—Lead [Pb]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/06—Polymers
    • H01L2924/078—Adhesive characteristics other than chemical
    • H01L2924/07802—Adhesive characteristics other than chemical not being an ohmic electrical conductor
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80—Constructional details
    • H10H20/85—Packages
    • H10H20/855—Optical field-shaping means, e.g. lenses

Definitions

  • the invention relates generally to optoelectronic devices and, more particularly, to optoelectronic device component packages and methods of making the same.
  • Optoelectronic devices typically comprise an optical system located in front of a photoelectric device.
  • the optical system can be a lens.
  • the photo-active device can be a light-emitting device or a light-detecting device.
  • the photoelectric device generally comprises a photoelectric die having a light-sensitive or light-emitting region thereon.
  • the photoelectric die includes die bond pads for electrically connecting thereto. Bond wires are used to connect the die bond pads to a lead frame.
  • the photoelectric die, bond wires, and lead frame are encased in a plastic or ceramic material.
  • the optoelectronic device package typically comprises a housing for supporting and locating the lens in front of the photoelectric die.
  • a disadvantage of the prior art optoelectronic devices is expense, the requirement of bond wires, and the difficulty of accurately locating the optical system in front of the photoelectric device.
  • Japanese Laid-Open Patent Publication No. 62-21282 shows a photoconductive detector.
  • the photoconductive detector includes a lens bonded to a semiconductor layer having opposing electrodes formed in contact with the layer.
  • the lens focuses upon a portion of the available light sensitive area of the detector.
  • One disadvantage of this detector is that it requires traditional bonding techniques, that is, it requires bond wires.
  • the photoconductive detector must be packaged for use. This adds additional manufacturing costs.
  • a light receiving element in another Japanese Laid-Open Patent Publication, No. 60-153184, a light receiving element is shown.
  • the light receiving element includes a photoelement chip fixed to a lower surface of an insulating glass. Electrodes are formed onto the lower surface of the glass.
  • a drawback to the light receiving element is that it requires traditional bonding techniques. That is, a bond wire is required to connect the photoelement chip to an electrode. Thus, in its manufacture, a bond wire must be located to an electrode for each device which adds cost to the manufacture of the device. Furthermore, external lead wires are used for electrically connecting the light receiving element to an external circuit which also increases the cost of using such a device.
  • a photo receiving electronic device is shown.
  • a photo receiving element is mounted by a flip chip technique onto a transparent substrate.
  • a drawback of the photo receiving electronic device is that it is not packaged in a ready-for-use form therefore increasing the cost of its use.
  • the transparent substrate of the device provides no significant lens effect, thus, in situations requiring a lens effect an external lens is required.
  • Patent Abstracts of Japan, Vol. 9, no. 147 (E-323), June 21, 1985 / JP-A-60027176 discloses a semiconductor image pick-up element which is connected to a transparent substrate by means of bumps.
  • the semiconductor image pick-up element is connected to the transparent substrate by means of first bumps which are attached to pads of a semiconductor substrate.
  • Second bumps connect the wirings of a case to the transparent substrate and are attached at the case side. On the side of the transparent substrate, the connections points between respective bumps are wired with metal strips.
  • the connection between the semiconductor image pick-up element and the transparent substrate is performed by compression bonding of the bumps.
  • U.S. 4,843,036 to Schmidt et al shows a method of encapsulating an electronic device on a substrate.
  • the electronic device is attached to the substrate and bond wires are used to connect bond pads of the electronic device to electrical conductors formed on the substrate.
  • An optically clear encapsulant is dispensed over the electronic device and the bond wires, encapsulating the device.
  • a lens-like element is produced.
  • the encapsulated device shown in Schmidt et al suffers from the disadvantage that bond wires are required. Use of bond wires increases the succeptability of the device for failure during its manufacture and also adds cost. Furthermore, the lens-like element produced may not be of sufficient quality for a particular application.
  • the principal object of the present invention is to provide an efficient and reliable optoelectronic device package.
  • Another object of the present invention is to provide a cost effective method of manufacturing an optoelectronic device package, without the use of traditional bonding techniques.
  • Another object of the present invention is to provide a cost effective optoelectronic device package.
  • the optoelectronic device package 10 comprises an optical element 12, a photoelectric die 14, and a printed circuit board 16.
  • An optoelectronic device component according to the invention comprises optical element 12 having die 14 attached thereto.
  • Optical element 12 is representative of a prime imaging system. Light entering a front surface 21 of element 12 converges onto plane surface 20 to form an image. For example, a desired field of view (or field coverage) may correspond to the lateral size of an area designated by A. In a like manner, light emanating from area A is collimated as it exits front surface 21.
  • optical element 12 includes refractive surface 21 and plane surface 20.
  • Refractive surface 21 may be aspherical.
  • Optical element 12 may be manufactured by injection molding techniques well known in the art.
  • the focal length of optical element 12 is designed to provide a desired image size, designated by A, such that appropriate coverage of optically active area 30 of die 14 is obtained.
  • plane surface 20 includes raised bumps 24 and 26. Raised bumps 24 and 26 are formed in plane surface 20 during the injection molding process of making element 12.
  • Electrical conductors 22 can be formed onto plane surface 20 via vacuum deposition techniques known in the art. Plane surface 20 is appropriately masked and conductive material is deposited thereon. Electrical conductors 22 are formed such that each conductor 22 overlays a first and a second bump, 24 and 26, respectively. An advantage of conductors 22 overlaying bumps 24 and 26 is the elimination of separate conductive bumps at electrical contact points. Such conductive bumps are formed via a process known as conductive bumping, to be explained subsequently. Simultaneously with the forming of conductors 22 is the forming of fiducial mark 23, using the conductive material. Fiducial mark 23 provides a positioning reference for positioning die 14 and circuit board 16 onto element 12.
  • Photoelectric dies are well known in the art.
  • Die 14 is representative of a photo detector die or a light emitting die.
  • photoelectric die 14 comprises an optically active portion 30 and die bond pads 32.
  • the optically active portion 30 and the die bond pads 32 are located on a same side of die 14.
  • Optically active portion 30 can be a light receiving portion for receiving light or it can be a light emitting portion for transmitting light.
  • optically active portion 30 can comprise numerous optically active portions.
  • Die 14 is attached to plane surface 20 of element 12 via an optically transparent non-conductive adhesive 28.
  • Die bond pads 32 electrically connect die 14 to conductors 22 at first bumps 24, wherein, conductors 22 at bumps 24 represent electrical contact points.
  • Adhesive 28 is non-conductive and comprises a curable adhesive having optical grade, high transmission properties. Adhesive 28 also has the properties of being a low viscosity fast curing adhesive. A variety of curing methods are available depending upon the adhesive used, for example, such methods may include but are not limited to thermal, radiation, or chemical catalyst curing.
  • Adhesive 28 may be radiatively curable, for example, commercially available adhesive product UV-311, from Emerson & Cumming. Adhesive 28 may be selectively screened onto plane surface 20 of element 12, whereby points of electrical connection or electrical contact points on the plane surface 20 are left uncovered by the adhesive.
  • printed circuit board 16 comprises a circuit board having a circuit pattern (not shown) and electrical conductors 34 thereon.
  • Circuit board 16 can be either a rigid circuit board or a flexible circuit board, wherein circuit board 16 is manufactured by techniques known in the art.
  • Circuit board 16 further includes an aperture 36 for receiving die 14.
  • Circuit board 16 is attached to the plane surface 20 of optical element 12 via adhesive 28, wherein die 14 is received within aperture 36.
  • Electrical conductors 34 electrically connect board 16 to conductors 22 second bumps 26, wherein, conductors 22 at bumps 26 represent electrical contact points, also.
  • optoelectronic device package 10 includes a protective means 38.
  • Protective means 38 protects a back surface of die 14, a portion of plane surface 20, and a portion of circuit board 16.
  • Protective means 38 comprises a protective material attached to die 14, plane surface 20, and board 16.
  • Protective means 38 is preferrably opaque but may also be transparent.
  • the protective material is non-conductive and comprises a low viscosity curable material.
  • a variety of curing methods are available depending upon the adhesive used, for example, such methods may include but are not limited to thermal, radiation, or chemical catalyst curing.
  • Protective means 38 may be, for example, commercially available encapsulant material Dexter Hysol product EO 1061.
  • Protective means 38 can also be a physical cap attached to circuit board 16, overlaying die 14, a portion of plane surface 20, and a portion of board 16.
  • a top plan view of optoelectronic device package 10 is shown in Fig. 5.
  • plane surface 20 comprises a flat surface having no bumps therein.
  • Electrical conductors 23 are formed on the plane surface 20.
  • Each electrical conductor 23 has first and second conductive bumps, 25 and 27, respectively, formed thereon.
  • Conductive bumps 25 and 27 are formed by a process known in the art as conductive bumping, wherein a bump of conductive material is formed upon a conductor or a conductive contact point.
  • Die bond pads 32 electrically connect to electrical conductors 23 via first conductive bumps 25.
  • electrical conductors 34 of circuit board 16 electrically connect to electrical conductors 23 via second conductive bumps 27.
  • optoelectronic device package 10 is similar to that shown in Fig. 4 with the following differences.
  • Plane surface 20 comprises a flat surface having no bumps therein. Electrical conductors 23 are formed on the plane surface 20. Die bond pads 32 have conductive bumps 33 formed thereon. Electrical conductors 34 of circuit board 16 have conductive bumps 35 formed thereon. Die bond pads 32 electrically connect to electrical conductors 23 via conductive bumps 33. Likewise, electrical conductors 34 of circuit board 16 electrically connect to electrical conductors 23 via conductive bumps 35.
  • optoelectronic device package 10 is manufactured preferably by an adhesive bonding technique. While the invention is described with respect to adhesive bonding techniques, the optoelectronic device component package may be manufactured using flip chip techniques or Tape Automated Bonding. Both flip chip techniques and Tape Automated Bonding are well known in the art and are therefore not discussed herein.
  • Electrical conductors 22 are formed onto plane surface 20 of optical element 12, plane surface 20 having bumps 24 and 26 therein (Fig. 1). In the preferred embodiment, each conductor 22 overlays first and second bumps, 24 and 26, respectively.
  • Optically transparent adhesive 28 is selectively screened onto plane surface 20 of element 12, leaving points of electrical connection uncovered.
  • Die 14 is selectively placed onto plane surface 20 by standard pick and place methods for a die placement operation that is well known in the art. That is, die 14 is optically aligned to the optical element 12 using fiducial mark 23 (Fig. 2) and then placed onto plane surface 20.
  • Circuit board 16 is similarly aligned and placed onto plane surface 20, wherein a corner edge of aperture 36 is optically aligned with fiducial mark 23.
  • the adhesive 28 is then cured by suitable radiation as recommended by the adhesive manufacturer.
  • the optical element 12, die 14, circuit board 16, and adhesive 28 are subjected to ultra-violet radiation and/or elevated temperture to cure adhesive 28. Curing of adhesive 28 causes optical element 12, die 14, and circuit board 16 to be drawn closer together, thus forcing electrical contact between corresponding electrical contact points.
  • a controlled amount of curable material 38 is dispensed in a viscous state over the die 14, a portion of the plane surface 20, and a portion of circuit board 16.
  • the curable material becomes a protective opaque encapsulant when cured.
  • the alternate embodiment, as shown in Fig. 6, is manufactured by the same method as the preferred embodiment shown in Fig. 1, except for the following.
  • plane surface 20 of element 12 contains no bumps therein.
  • conductive bumps 25 and 27 are formed on plane surface 20, via conductive bumping.
  • Conductive bumps 25 and 27 electrically connect with die bond pads 32 and electrical conductors 34, respectively.
  • the optoelectronic device package shown in Fig. 7 is manufactured by the same method as the preferred embodiment shown in Fig. 1, except for the following.
  • Electrical conductors 23 are formed onto plane surface 20 of optical element 12.
  • Die bond pads 32 of die 14 include conductive bumps 33 for electrically connecting to conductors 23 of element 12, conductive bumps 33 being formed onto die bond pads 32 by conductive bumping.
  • Electrical conductors 34 of circuit board 16 include conductive bumps 37 for electrically connecting to conductors 23 of element 12, conductive bumps 37 being formed onto conductors 34 by conductive bumping also.

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Light Receiving Elements (AREA)
  • Led Device Packages (AREA)

Abstract

An optoelectronic device component package comprises an optical element having a plano surface with a pattern of electrical conductors thereon, a photoelectric die having an optically active portion and die bond pads, and a printed circuit board having a pattern of electrical conductors thereon and further having an aperture for receiving the die. The die is attached to the plano surface of the optical element such that the die bond pads are electrically connected to corresponding electrical conductors of the optical element. The circuit board is attached to the plano surface of the optical element and the electrical conductors of the circuit board are electrically connected to corresponding conductors of the optical element. A protective means affixed to the die, the plano surface of the optical element, and a portion of the circuit board protects the device package. The die can be (1) an emitter or detector die for camera autofocus applications; or (2) a photometer die for exposure control applications.

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention
The invention relates generally to optoelectronic devices and, more particularly, to optoelectronic device component packages and methods of making the same.
2. Description of the Related Art
Optoelectronic devices typically comprise an optical system located in front of a photoelectric device. The optical system can be a lens. The photo-active device can be a light-emitting device or a light-detecting device. The photoelectric device generally comprises a photoelectric die having a light-sensitive or light-emitting region thereon. The photoelectric die includes die bond pads for electrically connecting thereto. Bond wires are used to connect the die bond pads to a lead frame. The photoelectric die, bond wires, and lead frame are encased in a plastic or ceramic material. The optoelectronic device package typically comprises a housing for supporting and locating the lens in front of the photoelectric die.
A disadvantage of the prior art optoelectronic devices is expense, the requirement of bond wires, and the difficulty of accurately locating the optical system in front of the photoelectric device.
For instance, Japanese Laid-Open Patent Publication No. 62-21282 shows a photoconductive detector. The photoconductive detector includes a lens bonded to a semiconductor layer having opposing electrodes formed in contact with the layer. The lens focuses upon a portion of the available light sensitive area of the detector. One disadvantage of this detector is that it requires traditional bonding techniques, that is, it requires bond wires. In addition, the photoconductive detector must be packaged for use. This adds additional manufacturing costs.
In another Japanese Laid-Open Patent Publication, No. 60-153184, a light receiving element is shown. The light receiving element includes a photoelement chip fixed to a lower surface of an insulating glass. Electrodes are formed onto the lower surface of the glass. A drawback to the light receiving element is that it requires traditional bonding techniques. That is, a bond wire is required to connect the photoelement chip to an electrode. Thus, in its manufacture, a bond wire must be located to an electrode for each device which adds cost to the manufacture of the device. Furthermore, external lead wires are used for electrically connecting the light receiving element to an external circuit which also increases the cost of using such a device.
In yet another Japanese Laid-Open Patent Publication, No. 59-198770, a photo receiving electronic device is shown. In the device, a photo receiving element is mounted by a flip chip technique onto a transparent substrate. A drawback of the photo receiving electronic device is that it is not packaged in a ready-for-use form therefore increasing the cost of its use. Furthermore, the transparent substrate of the device provides no significant lens effect, thus, in situations requiring a lens effect an external lens is required.
Patent Abstracts of Japan, Vol. 9, no. 147 (E-323), June 21, 1985 / JP-A-60027176 discloses a semiconductor image pick-up element which is connected to a transparent substrate by means of bumps. The semiconductor image pick-up element is connected to the transparent substrate by means of first bumps which are attached to pads of a semiconductor substrate. Second bumps connect the wirings of a case to the transparent substrate and are attached at the case side. On the side of the transparent substrate, the connections points between respective bumps are wired with metal strips. The connection between the semiconductor image pick-up element and the transparent substrate is performed by compression bonding of the bumps.
U.S. 4,843,036 to Schmidt et al shows a method of encapsulating an electronic device on a substrate. The electronic device is attached to the substrate and bond wires are used to connect bond pads of the electronic device to electrical conductors formed on the substrate. An optically clear encapsulant is dispensed over the electronic device and the bond wires, encapsulating the device. Upon curing the encapsulant, a lens-like element is produced. The encapsulated device shown in Schmidt et al suffers from the disadvantage that bond wires are required. Use of bond wires increases the succeptability of the device for failure during its manufacture and also adds cost. Furthermore, the lens-like element produced may not be of sufficient quality for a particular application.
It would thus be desireable to provide an optoelectronic device component package, and methods of making the same, wherein the device package is efficient and reliable. It would be further desireable if the device package could be cost effective in its manufacture and its use.
OBJECTS OF THE INVENTION
The principal object of the present invention is to provide an efficient and reliable optoelectronic device package.
Another object of the present invention is to provide a cost effective method of manufacturing an optoelectronic device package, without the use of traditional bonding techniques.
Another object of the present invention is to provide a cost effective optoelectronic device package.
Still another object of the present the following description in conjunction with the drawing figures, in which like reference numerals are carried forward, and in which:
  • FIG. 1 is a cross-sectional view of an optoelectronic device package in accordance with a preferred embodiment of the invention;
  • FIG. 2 is a top perspective view of an optical element used in the optoelectronic device package of the present invention.
  • FIG. 3 depicts a front surface view of a photoelectric die used in the optoelectronic device package of the present invention.
  • FIG. 4 is a cross-sectional view of an optoelectronic device package in accordance with an alternate embodiment of the invention;
  • FIG. 5 is a top plan view of the optoelectronic device package in accordance with the present invention;
  • FIG. 6 is a cross-sectional view of an optoelectronic device package in accordance with an alternate embodiment of the invention; and
  • FIG. 7 is a cross-sectional view of an optoelectronic device package in accordance with an alternate embodiment of the invention.
    • DESCRIPTION OF THE PREFERRED EMBODIMENT
    Referring now to Fig. 1, a cross-sectional view of an optoelectronic device package 10 according to the present invention is shown. In this embodiment, the optoelectronic device package 10 comprises an optical element 12, a photoelectric die 14, and a printed circuit board 16. An optoelectronic device component according to the invention comprises optical element 12 having die 14 attached thereto. Optical element 12 is representative of a prime imaging system. Light entering a front surface 21 of element 12 converges onto plane surface 20 to form an image. For example, a desired field of view (or field coverage) may correspond to the lateral size of an area designated by A. In a like manner, light emanating from area A is collimated as it exits front surface 21.
    Referring now to Fig. 1 and Fig. 2, optical element 12 includes refractive surface 21 and plane surface 20. Refractive surface 21 may be aspherical. Optical element 12 may be manufactured by injection molding techniques well known in the art. The focal length of optical element 12 is designed to provide a desired image size, designated by A, such that appropriate coverage of optically active area 30 of die 14 is obtained. In a preferred embodiment, plane surface 20 includes raised bumps 24 and 26. Raised bumps 24 and 26 are formed in plane surface 20 during the injection molding process of making element 12.
    Electrical conductors 22 can be formed onto plane surface 20 via vacuum deposition techniques known in the art. Plane surface 20 is appropriately masked and conductive material is deposited thereon. Electrical conductors 22 are formed such that each conductor 22 overlays a first and a second bump, 24 and 26, respectively. An advantage of conductors 22 overlaying bumps 24 and 26 is the elimination of separate conductive bumps at electrical contact points. Such conductive bumps are formed via a process known as conductive bumping, to be explained subsequently.
    Simultaneously with the forming of conductors 22 is the forming of fiducial mark 23, using the conductive material. Fiducial mark 23 provides a positioning reference for positioning die 14 and circuit board 16 onto element 12.
    Photoelectric dies are well known in the art. Die 14 is representative of a photo detector die or a light emitting die. Making reference now to Fig. 1 and Fig. 3, photoelectric die 14 comprises an optically active portion 30 and die bond pads 32. The optically active portion 30 and the die bond pads 32 are located on a same side of die 14. Optically active portion 30 can be a light receiving portion for receiving light or it can be a light emitting portion for transmitting light. Furthermore, optically active portion 30 can comprise numerous optically active portions.
    Die 14 is attached to plane surface 20 of element 12 via an optically transparent non-conductive adhesive 28. Die bond pads 32 electrically connect die 14 to conductors 22 at first bumps 24, wherein, conductors 22 at bumps 24 represent electrical contact points. Adhesive 28 is non-conductive and comprises a curable adhesive having optical grade, high transmission properties. Adhesive 28 also has the properties of being a low viscosity fast curing adhesive. A variety of curing methods are available depending upon the adhesive used, for example, such methods may include but are not limited to thermal, radiation, or chemical catalyst curing. Adhesive 28 may be radiatively curable, for example, commercially available adhesive product UV-311, from Emerson & Cumming. Adhesive 28 may be selectively screened onto plane surface 20 of element 12, whereby points of electrical connection or electrical contact points on the plane surface 20 are left uncovered by the adhesive.
    Turning again to Fig. 1, printed circuit board 16 comprises a circuit board having a circuit pattern (not shown) and electrical conductors 34 thereon. Circuit board 16 can be either a rigid circuit board or a flexible circuit board, wherein circuit board 16 is manufactured by techniques known in the art. Circuit board 16 further includes an aperture 36 for receiving die 14. Circuit board 16 is attached to the plane surface 20 of optical element 12 via adhesive 28, wherein die 14 is received within aperture 36. Electrical conductors 34 electrically connect board 16 to conductors 22 second bumps 26, wherein, conductors 22 at bumps 26 represent electrical contact points, also.
    Referring now to Fig. 4, optoelectronic device package 10 includes a protective means 38. Protective means 38 protects a back surface of die 14, a portion of plane surface 20, and a portion of circuit board 16. Protective means 38 comprises a protective material attached to die 14, plane surface 20, and board 16. Protective means 38 is preferrably opaque but may also be transparent. The protective material is non-conductive and comprises a low viscosity curable material. A variety of curing methods are available depending upon the adhesive used, for example, such methods may include but are not limited to thermal, radiation, or chemical catalyst curing. Protective means 38 may be, for example, commercially available encapsulant material Dexter Hysol product EO 1061. Protective means 38 can also be a physical cap attached to circuit board 16, overlaying die 14, a portion of plane surface 20, and a portion of board 16. A top plan view of optoelectronic device package 10 is shown in Fig. 5.
    In an alternate embodiment shown in Fig. 6, optoelectronic device package 10 is similar to that shown in Fig. 4 with the following differences. Plane surface 20 comprises a flat surface having no bumps therein. Electrical conductors 23 are formed on the plane surface 20. Each electrical conductor 23 has first and second conductive bumps, 25 and 27, respectively, formed thereon. Conductive bumps 25 and 27 are formed by a process known in the art as conductive bumping, wherein a bump of conductive material is formed upon a conductor or a conductive contact point. Die bond pads 32 electrically connect to electrical conductors 23 via first conductive bumps 25. Likewise, electrical conductors 34 of circuit board 16 electrically connect to electrical conductors 23 via second conductive bumps 27.
    In yet another embodiment, shown in Fig. 7, optoelectronic device package 10 is similar to that shown in Fig. 4 with the following differences. Plane surface 20 comprises a flat surface having no bumps therein. Electrical conductors 23 are formed on the plane surface 20. Die bond pads 32 have conductive bumps 33 formed thereon. Electrical conductors 34 of circuit board 16 have conductive bumps 35 formed thereon. Die bond pads 32 electrically connect to electrical conductors 23 via conductive bumps 33. Likewise, electrical conductors 34 of circuit board 16 electrically connect to electrical conductors 23 via conductive bumps 35.
    In accordance with the invention, optoelectronic device package 10 is manufactured preferably by an adhesive bonding technique. While the invention is described with respect to adhesive bonding techniques, the optoelectronic device component package may be manufactured using flip chip techniques or Tape Automated Bonding. Both flip chip techniques and Tape Automated Bonding are well known in the art and are therefore not discussed herein.
    Electrical conductors 22 are formed onto plane surface 20 of optical element 12, plane surface 20 having bumps 24 and 26 therein (Fig. 1). In the preferred embodiment, each conductor 22 overlays first and second bumps, 24 and 26, respectively. Optically transparent adhesive 28 is selectively screened onto plane surface 20 of element 12, leaving points of electrical connection uncovered. Die 14 is selectively placed onto plane surface 20 by standard pick and place methods for a die placement operation that is well known in the art. That is, die 14 is optically aligned to the optical element 12 using fiducial mark 23 (Fig. 2) and then placed onto plane surface 20. Circuit board 16 is similarly aligned and placed onto plane surface 20, wherein a corner edge of aperture 36 is optically aligned with fiducial mark 23. The adhesive 28 is then cured by suitable radiation as recommended by the adhesive manufacturer. For instance, the optical element 12, die 14, circuit board 16, and adhesive 28 are subjected to ultra-violet radiation and/or elevated temperture to cure adhesive 28. Curing of adhesive 28 causes optical element 12, die 14, and circuit board 16 to be drawn closer together, thus forcing electrical contact between corresponding electrical contact points.
    In the alternate embodiment of Fig. 4, subsequent to curing adhesive 28, a controlled amount of curable material 38 is dispensed in a viscous state over the die 14, a portion of the plane surface 20, and a portion of circuit board 16. The curable material becomes a protective opaque encapsulant when cured. After dispensing material 38, element 12, die 14, circuit board 16, adhesive 28, and material 38 are subjected to elevated temperature to cure material 38.
    The alternate embodiment, as shown in Fig. 6, is manufactured by the same method as the preferred embodiment shown in Fig. 1, except for the following. In Fig. 6, plane surface 20 of element 12 contains no bumps therein. Onto each conductor 23, formed on plane surface 20, are formed conductive bumps 25 and 27 via conductive bumping. Conductive bumps 25 and 27 electrically connect with die bond pads 32 and electrical conductors 34, respectively.
    Similarly, the optoelectronic device package shown in Fig. 7 is manufactured by the same method as the preferred embodiment shown in Fig. 1, except for the following. Electrical conductors 23 are formed onto plane surface 20 of optical element 12. Die bond pads 32 of die 14 include conductive bumps 33 for electrically connecting to conductors 23 of element 12, conductive bumps 33 being formed onto die bond pads 32 by conductive bumping.
    Electrical conductors 34 of circuit board 16 include conductive bumps 37 for electrically connecting to conductors 23 of element 12, conductive bumps 37 being formed onto conductors 34 by conductive bumping also.
    There is thus provided an optoelectronic device component, package, and methods of making the same, which provide substantial advantages over the prior art, that is, a low cost, reliable, and efficient optoelectronic device component and package.

    Claims (9)

    1. An optoelectronic device component including an optical element (12) having a plane surface (20), said plane surface having a first pattern of electrical conductors (22) thereon; a photoelectric die (14) having an optically active portion (30) and a second pattern of electrical conductors (32) on a front side thereof, said front side being attached to said plane surface (20) and said second pattern of electrical conductors (32) being in electrical contact with corresponding electrical conductors of said first pattern (22) on said plane surface (20), is characterized by:
      a printed circuit board (16) including a third pattern of electrical conductors (34) thereon and an aperture (36) for receiving said die (14), said circuit board (16) being attached to said plane surface (20) of said optical element (12), so that said first pattern of electrical conductors (22) on said plane surface (20) is placed in electrical contact with corresponding electrical conductors of said third pattern (34) on said circuit board (16).
    2. The optoelectronic device component according to Claim 1, wherein said plane surface includes raised bumps (24, 26) formed in said plane surface during making of said optical element; and said first pattern of electrical conductors has portions overlying first bumps (24) and second bumps (26), at locations allowing electrical contact with said second and third patterns of electrical conductors respectively.
    3. The optoelectronic device component according to Claim 1, wherein said electrical conductors of said first pattern include a first conductive bump (25) and a second conductive bump (27), said electrical conductors of said second pattern being in electrical contact with said first conductive bump, and said electrical conductors of said third pattern being in electrical contact with said second conductive bump.
    4. The optoelectronic device component according to Claim 1, wherein said electrical conductors of said second pattern include conductive bumps (33), said electrical conductors of said first pattern being in electrical contact with said conductive bumps (33); and said electrical conductors of said third pattern include conductive bumps (35), said electrical conductors of said first pattern also being in electrical contact with said conductive bumps (35) of said third pattern.
    5. The optoelectronic device component according to Claim 1, wherein said front side of said die and said printed circuit board are attached to said plane surface by an optically clear, non-conductive adhesive.
    6. A method of manufacturing an optoelectronic device component according to Claim 1, comprising steps of:
      forming a pattern of electrical conductors onto a plane surface of an optical element;
      depositing an optically clear non-conductive curable adhesive in a viscous state onto a desired area of the plane surface;
      aligning a photoelectric die (14), said die having an optically active portion (30) and a second pattern of electrical conductors (32) on a front side thereof, over said adhesive such that said active portion faces said plane surface and said second pattern of electrical conductors is aligned with corresponding electrical conductors of said first pattern on said plane surface;
      placing said die into said adhesive; and
      curing said adhesive to bond said die to said optical element and to electrically connect said second pattern of electrical conductors with said corresponding electrical conductors of said first pattern.
    7. The method according to Claim 6, wherein said plane surface has bumps therein formed in said plane surface during making of said optical element, portions of said first pattern overlying first bumps (24) and second bumps (26), said aligning step placing said bumps in alignment with said second pattern of electrical conductors.
    8. The method according to Claim 6, wherein said adhesive comprises a radiation-curable material and said curing step comprises exposing said adhesive to suitable radiation.
    9. The method according to Claim 8, wherein said adhesive comprises an ultraviolet radiation-curable material.
    EP92901711A 1990-12-12 1991-12-03 Optoelectronic device component package and method of making the same Expired - Lifetime EP0561964B1 (en)

    Applications Claiming Priority (3)

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    US626663 1990-12-12
    US07/626,663 US5149958A (en) 1990-12-12 1990-12-12 Optoelectronic device component package
    PCT/US1991/008883 WO1992010856A1 (en) 1990-12-12 1991-12-03 Optoelectronic device component package and method of making the same

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    EP0561964A1 EP0561964A1 (en) 1993-09-29
    EP0561964B1 true EP0561964B1 (en) 1998-06-03

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    EP (1) EP0561964B1 (en)
    JP (1) JPH06503683A (en)
    DE (1) DE69129547T2 (en)
    WO (1) WO1992010856A1 (en)

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    Also Published As

    Publication number Publication date
    JPH06503683A (en) 1994-04-21
    WO1992010856A1 (en) 1992-06-25
    DE69129547T2 (en) 1999-01-28
    USRE35069E (en) 1995-10-24
    EP0561964A1 (en) 1993-09-29
    DE69129547D1 (en) 1998-07-09
    US5149958A (en) 1992-09-22

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