EP0549381B1 - Current mirror with low reproduction error - Google Patents

Description

The present invention relates to a current mirror with bipolar transistors, operating with good precision even if the transistors are at very low gain.

We know that bipolar transistors have characteristics that change with the conditions of use, or even during manufacture. In particular, the gain in current decreases when the temperature decreases, or under the effect of light or particulate radiation. The loss of gain leads to an intrinsic error of copying in the current mirrors.

A current mirror is an assembly, as shown in FIG. 1, which makes it possible to force through a second branch a current I₀ which is, apart from errors, identical to the current I₁ which flows through a first branch. The first branch comprises a current source 1, a transistors 2, the collector of which is joined to the base, and a resistance 3 for feedback. The second branch comprises a transistor 5 and a resistance 6 against feedback. The bases of the two transistors 2 and 5 are combined, so that the current I₁ which flows in the first branch controls the current I₀ forced through a load of use 7 in the second branch.

β étant le gain des transistors, le même pour les deux transistors puisqu'ils sont supposés identiques et dans les mêmes conditions de polarisation. L'erreur relative de recopie est égale à -2/(β+2) et, dans la plupart des applications, avec des transistors dont le gain est de beaucoup supérieur à 1, cette erreur n'est pas la cause principale d'imprécision observée et elle reste masquée par la tension d'offset de la paire de transistors ou le désappariement des résistances de contre-réaction 3 et 6. Mais dès que le gain des transistors décroît, pour des raisons quelconques, l'erreur due au gain faible (β<1) devient prédominante. En effet, on voit que le gain β intervient au premier degré et au dénominateur de l'équation, de sorte que, lorsque le gain tend vers zéro, l'erreur tend vers - 100 %.This type of current mirror, simple, suffers from an intrinsic feedback error, which depends on the gain of the transistors. Indeed, for a unity gain mirror, whose transistors 2 and 5 are paired in V _BE (base-emitter voltage) and the feedback resistors 3 and 6 are paired, the error on the gain of the mirror is expressed through the equation: $$\text{I₀ = I₁ [1 - 2 / (β + 2)]}$$

β being the gain of the transistors, the same for the two transistors since they are assumed to be identical and under the same polarization conditions. The relative recopy error is equal to -2 / (β + 2) and, in most applications, with transistors whose gain is much greater than 1, this error is not the main cause of imprecision observed and it remains masked by the offset voltage of the pair of transistors or the mismatch of the feedback resistors 3 and 6. But as soon as the gain of the transistors decreases, for whatever reasons, the error due to the low gain (β <1) becomes predominant. Indeed, we see that the gain β occurs in the first degree and in the denominator of the equation, so that, when the gain tends towards zero, the error tends towards - 100%.

Current applications of electronics, however, require mirror feedback precision greater than 10% which can be achieved with transistors having undergone stresses, and whose gain is low, for example between 1 and 10.

A first known solution is presented by the Wilson mirror, represented in FIG. 2. It is the equivalent of a conventional mirror, in which an amplifier transistor 8 is counter-reacted by the mirror constituted by the transistors 2 and 5. On this figure as in the following figures the load 7 is no longer shown, since it does not intervene in the understanding of the invention.

Assuming that the three transistors have the same gain β, the gain error of the Wilson mirror is expressed by a quadratic relation: $$\text{I₀ = I₁ [1 - 2 / (β² + 2β +2)]}$$

A second known solution resides in the buffered mirror, shown in FIG. 3. In this arrangement, the transistors of the master and copy branches, respectively 2 and 5, have their base currents not taken directly from the source I₁ as in the case of FIG. 1 but through an amplifier transistor 9 whose base is connected to the source I₁ and the emitter at the two bases of the transistors 2 and 5, the collector of this transistor 9 is supplied by a return voltage V _R. The error is given by: $$\text{I₀≃I₁ [1-2 / (β² + β + 2)]}$$

For transistor gains much greater than 1, the error introduced by these buffered Wilson mirrors is of the form -2 / β² and provides a very significant improvement in the simple mirror: for β = 100, the error goes from - 2% to - 0.02%, which becomes negligible. But the effect of the quadratic law decreases when the gain of the transistors becomes close to or less than 1: for example, the Wilson mirror has an error of the order of - 8% for a gain of the transistors β = 4.

The study of current gains in current mirror amplifiers was done by J. S Radovsky in an article published in RCA Technical Notes, No. 949, December 31, 1973, pages 1 to 7.

Some amplifiers may have a structure which is close to that of a current mirror, but which in fact is not. For example, patent US-A-4 237 414 relates to a current source with high output impedance, comprising a Darlington and a Wilson mirror, but the assembly is such that the Darlington, not feedbacked, does nothing but increase the impedance of the output branch of the Wilson mirror. Or the patent US-A-3 843 933 in which an amplifier comprises two balanced Darlingtons, but in which there is no mirror.

The invention provides a solution to the problem of low gain by proposing an arrangement such that the equation of the feedback current I₀ includes a term which is canceled out in the numerator, so that the error is canceled out for a low value of gain of transistors. According to the invention, a current mirror with low feedback error is characterized in that its output (Ic) is constituted by the collectors joined together of two transistors mounted in current amplifier of type "Darlington", its input (I₁) is constituted by the base of the same amplifier, this amplifier being polarized thanks to a feedback of current type -parallel operated between its transmitter and its base by a buffered type mirror fitted with feedback resistors.

More specifically, the invention relates to a current mirror with low feedback error comprising an input branch and an output branch, as well as a "buffered" type current mirror itself constituted by a first branch. master and by a second feedback branch, this current mirror with low feedback error being characterized in that it comprises in its output branch a first Darlington type current amplifier whose collector constitutes the output of the mirror, and the base of which is joined to the input branch, this amplifier being counter-reacted in parallel-current mode by the buffered type current mirror whose master branch, connected in series with the output branch of the current mirror with low feedback error, is joined to the Darlington transmitter, and whose feedback branch, connected in series with the input branch of the current mirror with low feedback error, is assembled at the base Darlington.

• figures 1,2 et 3 : schémas de miroirs de courant selon l'art connu, précédemment exposés,
• figure 4 : schéma d'un miroir de courant selon l'invention
• figure 5 : schéma d'une version du miroir précédent, dans le cas d'une technologie haute tension,
• figure 6 : courbes d'erreur sur le gain, comparées entre l'art connu et l'invention.

The invention will be better understood from the following description of an example of application, in conjunction with the appended figures, which represent:

• Figures 1,2 and 3: diagrams of current mirrors according to known art, previously exposed,
• Figure 4: diagram of a current mirror according to the invention
• FIG. 5: diagram of a version of the previous mirror, in the case of a high voltage technology,
• Figure 6: error curves on the gain, compared between the known art and the invention.

To simplify, the invention will be described by relying on NPN transistors, which in no way limits the scope of the invention.

• une première branche maitresse insérée en série dans la branche de sortie du miroir de l'invention, et qui comprend un transistor 2 et une résistance de contre-réaction 3.
• une deuxième branche de recopie insérée en série dans la branche d'entrée du miroir de l'invention et qui comprend un transistor 5 et une résistance de contre réaction 6.

FIG. 4 represents a current mirror with low gain transistors according to the invention. This mirror according to the invention comprises inter alia the elements of a buffered mirror according to the known art, in which:

• a first master branch inserted in series in the output branch of the mirror of the invention, and which comprises a transistor 2 and a feedback resistance 3.
• a second feedback branch inserted in series in the input branch of the mirror of the invention and which comprises a transistor 5 and a feedback resistance 6.

The bases of the two transistors 2 and 5 are combined and a transistor 4 supplied with a return voltage V _R is mounted as an amplifier between the collector and the base of 2.

• un transistor 10 dont le collecteur est réuni à la source de tension VCC et dont l'émetteur est réuni au collecteur de 2
• un transistor 11 dont le collecteur est réuni à la source de tension VCC et dont la base est commandée par la branche d'entrée du miroir selon l'invention (source I₁).

The invention consists in using this buffered mirror to counter-react in current-parallel mode a Darlington type current amplifier whose output (or collector) constitutes the output of the mirror according to the invention, and the entrance (the base) constitutes the entrance to the mirror according to the invention. This "Darlington" includes:

• a transistor 10 whose collector is joined to the voltage source VCC and whose emitter is joined to the collector of 2
• a transistor 11 whose collector is joined to the voltage source VCC and whose base is controlled by the input branch of the mirror according to the invention (source I₁).

As in conventional mirrors, emitter feedback resistors 3 and 6 allow to overcome the offset error of the transistors up to their matching if the degeneration - i.e. the product of the value of the feedback resistance by the current flowing through it - worth a few kT / q ≃ 26 mV at 300 ° K, with k = Boltzmann constant, T = absolute temperature, q = electron charge.

In the case of a fast technology, in which the gain strongly depends on the voltage V _CE, it is advantageous to complete the mirror according to the invention by two transistors 12 and 13, mounted symmetrically with the Darlington 10 + 11, the bases of the transistors 13 on the input branch and 11 on the output branch being interconnected and connected to the collectors of transistors 12 and 13. Transistors 12 and 13 have a role of balancing the voltages V _CE of transistors 2 and 5 of the buffered mirror , in order to eliminate the error due to the Early effect of the transistors. Still in this case of low voltage, the return voltage V _R of the collector of transistor 9 is chosen so as to match the V _CE , so that V _CE9 ≃ V _CE11 .

In the case of a high voltage technology, that is to say a few hundred volts, the Early effect is more negligible than in the case of a fast technology, the balancing of the voltages V _CE of the buffered mirror can be eliminated, and by way consequently the transistors 12 and 13 are eliminated, as shown in FIG. 5, which is the simplification of FIG. 4.

The advantage of the current mirror structure according to the invention lies in the existence of a root of the numerator, which cancels the error, in the function of the error due to the gain, a function which is written: $$\text{I₀ ≃ I₁ [1 + (2β - 2) / (β⁴ + 3β³ + 4β² + 2β +2)]}$$

In this equation, we have assumed that all the transistors of the mirror have the same gain, which justifies the sign ≃.

In current mirrors according to the known art, the error is of constant sign, always negative, and it increases in absolute value when the gain β of the transistors decreases: it is between - 40% and - 70% when β = 1 , as shown by curve 14 in FIG. 6. In this figure, the gain β at low values (0-14) is given on the abscissa, the corresponding error ε = (I₀ - I₁) / I₁ is given on the ordinate, and curve 14 relates to a Wilson structure.

On the contrary, in the mirror according to the invention, the error is canceled for (2β -2) = 0, that is to say β = 1, and it changes sign depending on whether the gain is greater or less than 1. A typical curve is represented at 15 in FIG. 6, which makes it possible to compare it with the curve 14 of a Wilson mirror. The positive error bump observed for gains slightly greater than 1 is only worth + 2 to + 3% and it remains negligible in this zone for which a conventional mirror is affected by an error of the order of - 40%. For β = 1, the error is strictly zero (2β- 2 = 0) and for β <1 the observed error remains less significant than that reached with a known mirror.

In FIG. 6 has been drawn a dotted line at the level of a gain error of the mirror equal to -10%, which is an example of a practically acceptable error. This line shows that the mirror according to the invention tolerates transistors whose gain is approximately 0.75, ie 5 times lower than the gain 3.5 of the transistors necessary for a Wilson mirror, with the same loss of -10%. .

Furthermore, the interest of the transfer function, which comprises an area in which β <1, is affected neither by problems of gain matching of the transistors used nor by problems of matching the counter resistances reaction 3 and 6.

et la courbe inférieure 17 correspond à - 2 %. Les variations de la courbe d'erreur autour de sa position nominale sont très acceptables.For example, in FIG. 6, the curves 15, 16, 17 illustrate the influence (minimum, typical, maximum) of a mismatch of the feedback resistances of ± 2% when the degeneracy voltage is set to a value approximately 250 mV. The upper curve 16 corresponds to a mismatch $$\frac{\text{Δ (R₁ / R₂)}}{\text{R₁ / R₂}}\text{= + 2\%}$$

and the lower curve 17 corresponds to -2%. Variations in the error curve around its nominal position are very acceptable.

In addition to the advantage of being able to work with very low transistor gains, the current mirror according to the invention has the advantage of having a very high output impedance at low frequency. Compared to the Wilson mirror, known to have a high output impedance, the improvement typically involves a factor of 100.

The invention is specified by the following claims.

Claims (5)

1. Current mirror with low tracking error, including an input branch (I₁) and an output branch (I₀), as well as a current mirror of "buffered" type, itself consisting of a first master branch (2, 3, 4) and of a second tracking branch (5, 6), this current mirror with low tracking error being characterized in that, in its output branch (I₀), it includes a first Darlington-type current amplifier (10+11), the collector of which constitutes the output of the mirror, and the base of which is joined to the input branch (I₁), this Darlington-type current amplifier (10+11) being in current-shunt negative-feed-back mode via the buffered-type current mirror, the master branch (2, 3) of which, connected in series with the output branch (I₀) of the current mirror with low tracking error, is joined to the emitter of the Darlington pair (10), the tracking branch (5, 6) of which, connected in series with the input branch (I₁) of the current mirror with low tracking error is joined to the base of the Darlington pair (11).
2. Current mirror according to Claim 1, characterized in that a second Darlington-type current amplifier (12+13), the base and the collector of which are short-circuited, is mounted on the input branch symmetrically with the first Darlington pair (10+11), so as to balance out the V_CE collector-emitter voltages of the transistors (2, 5) of the " buffered" mirror.
3. Current mirror according to either of Claims 1 and 2, characterized in that it is produced with low-gain (β) bipolar transistors.
4. Current mirror according to either of Claims 1 and 2, characterized in that the error in tracking the input branch (I₁) by the output branch (I₀) depends little on the gain (β) of the transistors for low gains (β < 2) and is zero for a gain of the transistors β = 1.
5. Current mirror according to either of Claims 1 and 2, characterized in that the error in tracking the input branch (I₁) by the output branch (I₀) depends little on the matching of the feedback resistors (3, 6) and on the matching of the gain (β) of the transistors (2, 4, 5, 10, 11).

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