EP0523385A2 - Method for fabricating long array orifice plates - Google Patents
Method for fabricating long array orifice plates Download PDFInfo
- Publication number
- EP0523385A2 EP0523385A2 EP92110207A EP92110207A EP0523385A2 EP 0523385 A2 EP0523385 A2 EP 0523385A2 EP 92110207 A EP92110207 A EP 92110207A EP 92110207 A EP92110207 A EP 92110207A EP 0523385 A2 EP0523385 A2 EP 0523385A2
- Authority
- EP
- European Patent Office
- Prior art keywords
- plating substrate
- robber
- pattern
- electrically conductive
- plating
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
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Classifications
-
- C—CHEMISTRY; METALLURGY
- C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
- C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
- C25D1/00—Electroforming
- C25D1/08—Perforated or foraminous objects, e.g. sieves
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B41—PRINTING; LINING MACHINES; TYPEWRITERS; STAMPS
- B41J—TYPEWRITERS; SELECTIVE PRINTING MECHANISMS, i.e. MECHANISMS PRINTING OTHERWISE THAN FROM A FORME; CORRECTION OF TYPOGRAPHICAL ERRORS
- B41J2/00—Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed
- B41J2/005—Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed characterised by bringing liquid or particles selectively into contact with a printing material
- B41J2/01—Ink jet
- B41J2/135—Nozzles
- B41J2/16—Production of nozzles
- B41J2/162—Manufacturing of the nozzle plates
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B41—PRINTING; LINING MACHINES; TYPEWRITERS; STAMPS
- B41J—TYPEWRITERS; SELECTIVE PRINTING MECHANISMS, i.e. MECHANISMS PRINTING OTHERWISE THAN FROM A FORME; CORRECTION OF TYPOGRAPHICAL ERRORS
- B41J2/00—Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed
- B41J2/005—Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed characterised by bringing liquid or particles selectively into contact with a printing material
- B41J2/01—Ink jet
- B41J2/135—Nozzles
- B41J2/16—Production of nozzles
- B41J2/1621—Manufacturing processes
- B41J2/1625—Manufacturing processes electroforming
Definitions
- the present invention relates to continuous ink jet printing and, more particularly, to improved methods for fabricating relatively long, high resolution, orifice plates for use in ink jet printing.
- ink is circulated under pressure to project from a plurality of orifices formed in a linear array along an orifice plate.
- the projected ink jets are stimulated to break off adjacent charge electrodes; and, in the usual, binary printing approach, charged drops are field-deflected to a catcher, with non-charged drops continuing to the print medium.
- the short orifice plates have been used in moving print heads which traverse lines of the print media successfully moved therepast.
- the long and intermediate length orifice plates have been used with stationary print heads, but suffer the problems of lower resolution.
- One significant purpose of the present invention is to provide an improved method for electroforming relatively longer orifice plates, with high resolution orifice arrays and precise orifice size uniformity.
- the invention provides important advantages by allowing wider swaths of print media to be printed in high resolution with a single stationary print head.
- the present invention constitutes a method for electroforming linear orifice plates comprising the steps of:
- FIG. 1 shows an electroplating system 20 which can be immersed in an electroplating bath and electrically energized to effect orifice plate formation in accord with the present invention.
- the system 20 comprises a plastic frame 21 having windows 22, 23, which allow flow of electroplating solution into plating relation with substrate units 10 held in a plating fixture 26.
- Fixture 26 is insertable into support notches 27 of frame 21 and includes plastic shield elements 28 that fasten to the edges of the fixture 26 to hold the substrate units 10 in proper position in the electroplating system.
- Titanium anode baskets 29 are mounted on each end of the frame 21 with their major surfaces parallel to major surfaces of the plating substrate units 10. This is to provide a plating field generally normal to the major surfaces of the substrate units.
- the practice of the present invention in general, involves coating an electrically conductive plate substrate 1 with a photoresist layer 2 of precise thickness.
- the composite element shown in FIG. 2A, is exposed through masks and photolithographically processed to form a plurality of linear array peg patterns 1a, with separator ridges 1b therebetween.
- the peg patterns are non-conductive electrically, and have precisely uniform peg height and diameter.
- the non-conducting plating pattern can be formed of photoresist as described in U.S. Patent Nos. 4,184,925 or anodized 4,971,665.
- high resolution peg arrays are arrays having, for example, 240 or more pegs/inch to facilitate formation of orifice plates having correspondingly high resolution orifice arrays.
- symmetrically balanced plating substrate shapes such as circular or square are advantageous (see substrate 2 in FIG. 5). While symmetric substrates are desirable for spin coating, they are not optimal in the plating system. That is, because the orifice plates which will be electroformed on the substrates are long and narrow, the symmetric substrate members cause non-optimum field distributions. This in turn causes non-uniformity of plating thickness and non-uniform diameter orifices.
- FIGS. 5 and 6 show one configuration for enabling plating upon a symmetric (square) substrate, while maintaining uniform field distribution.
- blank, electrically conductive panels 3 and 4 known in the electroplating art as robber panels, are placed adjacent those edges of the plating substrate 2 that are perpendicular to the length dimension of the arrays of photoresist peg patterns formed on the plating substrate.
- the robber panels have a thickness about equal to that of the plating substrate and have a width to be coextensive with the width of the plating substrate between shields 28.
- the length of the panels 3 and 4 is sufficient to render the plating field operating across the plating substrate of uniform magnitude.
- the pattern bearing surface of plating substrate 2 is electrically coupled, along the sides adjacent each robber panel 3 and 4, to the coplanar surfaces of the adjacent robber panel sides.
- a thin strip of electrically conductive material 9 is secured in electrical contact with the top surfaces of the plating substrate and adjacent robber panel is useful for this purpose.
- a particularly preferred material is a strip of electrically conductive copper-silicon adhesive tape, e.g. 1/4 inch wide ScotchTM 9756-3 electrical tape.
- Other strip joining materials e.g. thin metal strip and solder, will be apparent to those skilled in the art.
- a plating substrate/robber panel unit 10 such as shown in FIGS. 5 and 6 is placed in fixture 26 as shown and described with respect to FIG. 1.
- the plating substrate of the unit has a symmetrical shape (e.g. is substantially square) and has a plurality of high resolution linear array peg patterns formed thereon by spin coating and mask exposure photolithographic steps as described with respect to FIGS. 2A and 2B.
- Fixture 26 is then placed in the electroplating system 20 shown in FIG. 1 and the system 20 is placed into a bath containing, e.g., a bright nickel plating solution.
- the system 20 is then electrically energized, in a manner known in the art, for a time period that accomplishes plating of nickel onto the plating substrate to a thickness 13 (see FIG. 4) equal to the height of pegs 1a and to an additional thickness 11 which extends over the top of the pegs 1a and defines the precise diameter of the individual orifices.
- the plating unit 10 is then removed from the plating system and the individual orifice plates 15, having high resolution orifices 14 of uniform diameter are provided in lengths longer than previously achievable.
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- Engineering & Computer Science (AREA)
- Chemical & Material Sciences (AREA)
- Manufacturing & Machinery (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Electrochemistry (AREA)
- Materials Engineering (AREA)
- Metallurgy (AREA)
- Organic Chemistry (AREA)
- Particle Formation And Scattering Control In Inkjet Printers (AREA)
- Electroplating Methods And Accessories (AREA)
Abstract
Description
- The present invention relates to continuous ink jet printing and, more particularly, to improved methods for fabricating relatively long, high resolution, orifice plates for use in ink jet printing.
- In continuous ink jet printing of the multiple jet type, ink is circulated under pressure to project from a plurality of orifices formed in a linear array along an orifice plate. The projected ink jets are stimulated to break off adjacent charge electrodes; and, in the usual, binary printing approach, charged drops are field-deflected to a catcher, with non-charged drops continuing to the print medium.
- Commercial systems employing the continuous binary ink jet approach have been successfully employed using longer (e.g. page width) orifice plates of lower resolution (e.g. 120 orifices per inch) and shorter (e.g. line height) orifice plates having high resolution (e.g. 300 orifices/inch). Intermediate length orifice arrays having intermediate resolution have also been used successfully.
- The short orifice plates have been used in moving print heads which traverse lines of the print media successfully moved therepast. The long and intermediate length orifice plates have been used with stationary print heads, but suffer the problems of lower resolution. To provide the ability to address wider swaths of the print media, with stationary print heads at higher resolution, with stationary print heads it has been suggested to stagger long, low resolution orifice plates in interleaved positions along the print media path. This requires great precision in alignment and in media-movement/drop address synchronization to yield acceptable quality, and has not commercially been feasible.
- Thus, there has been a continuing need for ways to provide relatively longer, high resolution orifice plates, to enable reliable stationary-print-head address of large widths of moving print. A large number of techniques have been utilized for orifice plate fabrication; however, the most successful for forming high resolution orifice plates with precisely uniform size orifices has been the electroform method described in U.S. Patent No. 4,184,925. In this approach, precisely sized photoresist pegs are formed on an electroplating substrate and the orifice plate is electroplated up to the top of the pegs and slightly thereover to achieve a precise diameter that is regulated by the plating time period. This fabrication method has been achieved successfully with shorter length orifice plates; however, precise orifice size uniformity has not heretofore been achieved with longer length arrays.
- One significant purpose of the present invention is to provide an improved method for electroforming relatively longer orifice plates, with high resolution orifice arrays and precise orifice size uniformity. The invention provides important advantages by allowing wider swaths of print media to be printed in high resolution with a single stationary print head.
- In one aspect, the present invention constitutes a method for electroforming linear orifice plates comprising the steps of:
- (a) forming a linear array pattern of electrically insulative, uniform diameter and height pegs, corresponding to a desired orifice array pattern, on an electrically conductive plating substrate;
- (b) placing electrically conductive robber panels adjacent the edges of the plating substrate that are perpendicular to the linear array pattern;
- (c) coupling the pattern bearing surface of the plating substrate to coplanar surfaces of adjacent robber panels with a thin strip of electrically conductive material;
- (d) placing the coupled plating substrate/robber panel unit in an electroplating system; and
- (e) operating that system to form an orifice plate having a thickness slightly greater than the peg pattern height and a linear array of precisely uniform diameter orifices.
- The subsequent description of preferred embodiments refers to the accompanying drawings wherein:
- FIG. 1 is a perspective view of one electroplating system useful in practicing the present invention;
- FIGS. 2A and 2B are schematic perspective views showing successive stages of formation of a plating substrate for use in the present invention;
- FIG. 3 is a schematic perspective of one orifice plate formed according to the present invention;
- FIG. 4 is a cross-section of the FIG. 3 plate;
- FIG. 5 is a perspective view of an electroplating substrate/robber panel unit according to the present invention; and
- FIG. 6 is an enlarged portion of the FIG. 5 unit showing a preferred technique for electrically coupling the robber panels and electroplating substrate.
- FIG. 1 shows an
electroplating system 20 which can be immersed in an electroplating bath and electrically energized to effect orifice plate formation in accord with the present invention. Thesystem 20 comprises aplastic frame 21 havingwindows substrate units 10 held in aplating fixture 26. Fixture 26 is insertable intosupport notches 27 offrame 21 and includesplastic shield elements 28 that fasten to the edges of thefixture 26 to hold thesubstrate units 10 in proper position in the electroplating system.Titanium anode baskets 29 are mounted on each end of theframe 21 with their major surfaces parallel to major surfaces of theplating substrate units 10. This is to provide a plating field generally normal to the major surfaces of the substrate units. - Referring to FIGS. 2A and 2B, the practice of the present invention, in general, involves coating an electrically conductive plate substrate 1 with a
photoresist layer 2 of precise thickness. The composite element (shown in FIG. 2A, is exposed through masks and photolithographically processed to form a plurality of linear array peg patterns 1a, with separator ridges 1b therebetween. The peg patterns are non-conductive electrically, and have precisely uniform peg height and diameter. The non-conducting plating pattern can be formed of photoresist as described in U.S. Patent Nos. 4,184,925 or anodized 4,971,665. However, as will be understood from subsequent discussion, the practice of the present invention is particularly useful in the methods where the orifice plate patterns comprise high resolution pegs, formed photolithography by use of spin coating and mask alignment technique. In the foregoing context, "high resolution" peg arrays are arrays having, for example, 240 or more pegs/inch to facilitate formation of orifice plates having correspondingly high resolution orifice arrays. - To obtain precise size uniformity for such high resolution arrays it is desirable to have precise photoresist layer thickness. This requires spin coating the substrate at speeds greater than 1000 rpm. In order to utilize such spin coating procedures, symmetrically balanced plating substrate shapes such as circular or square are advantageous (see
substrate 2 in FIG. 5). While symmetric substrates are desirable for spin coating, they are not optimal in the plating system. That is, because the orifice plates which will be electroformed on the substrates are long and narrow, the symmetric substrate members cause non-optimum field distributions. This in turn causes non-uniformity of plating thickness and non-uniform diameter orifices. - FIGS. 5 and 6 show one configuration for enabling plating upon a symmetric (square) substrate, while maintaining uniform field distribution. Thus, blank, electrically
conductive panels plating substrate 2 that are perpendicular to the length dimension of the arrays of photoresist peg patterns formed on the plating substrate. The robber panels have a thickness about equal to that of the plating substrate and have a width to be coextensive with the width of the plating substrate betweenshields 28. The length of thepanels - In accord with the present invention the pattern bearing surface of
plating substrate 2 is electrically coupled, along the sides adjacent eachrobber panel conductive material 9 is secured in electrical contact with the top surfaces of the plating substrate and adjacent robber panel is useful for this purpose. A particularly preferred material is a strip of electrically conductive copper-silicon adhesive tape, e.g. 1/4 inch wide Scotch™ 9756-3 electrical tape. Other strip joining materials, e.g. thin metal strip and solder, will be apparent to those skilled in the art. - In practice of one preferred mode of the present invention, a plating substrate/
robber panel unit 10 such as shown in FIGS. 5 and 6 is placed infixture 26 as shown and described with respect to FIG. 1. The plating substrate of the unit has a symmetrical shape (e.g. is substantially square) and has a plurality of high resolution linear array peg patterns formed thereon by spin coating and mask exposure photolithographic steps as described with respect to FIGS. 2A and 2B.Fixture 26 is then placed in theelectroplating system 20 shown in FIG. 1 and thesystem 20 is placed into a bath containing, e.g., a bright nickel plating solution. Thesystem 20 is then electrically energized, in a manner known in the art, for a time period that accomplishes plating of nickel onto the plating substrate to a thickness 13 (see FIG. 4) equal to the height of pegs 1a and to an additional thickness 11 which extends over the top of the pegs 1a and defines the precise diameter of the individual orifices. Theplating unit 10 is then removed from the plating system and theindividual orifice plates 15, havinghigh resolution orifices 14 of uniform diameter are provided in lengths longer than previously achievable. - For example use of the above described procedures, featuring robber panels coupled to a spin coated, symmetrical shaped plating substrate, enabled fabrication of a relatively long orifice plate having a thickness variation of no greater than about .01 mil. As a result, orifice plates having orifice arrays of about 4.25 inches with a resolution of 240 orifices per inch can be controlled to have an orifice size variation of ± .03 mil.
- The invention has been described in detail with particular reference to certain preferred embodiments thereof, but it will be understood that variations and modifications can be effected within the spirit and scope of the invention.
Claims (5)
- A method for electroforming linear orifice plates comprising the steps of:(a) forming a nonconductive linear peg pattern, corresponding to the desired orifice pattern on an electrically conductive plating substrate;(b) placing electrically conductive robber panels adjacent the linear-pattern-end edges of the plating substrate;(c) coupling the plating surface of the plating substrate to the top surfaces of adjacent robber panels with a thin strip of electrically conductive material; and(d) placing the so-coupled plating substrate/robber panel unit in an electroplating system and operating that system for a predetermined period to form an orifice plate having a linear array of precisely uniform diameter orifices.
- The invention defined in claim 1 wherein said plating substrate is symmetrically balanced.
- The invention defined in claim 2 wherein said peg pattern forming step includes spin coating photoresist material onto said substrate and photolithographically exposing and removing non-peg portions of the photoresist material.
- The invention defined in claim 1 wherein said plating substrate substantially square and has a plurality of high resolution linear patterns of precisely uniform size pegs thereon.
- A method for electroforming linear orifice plates comprising the steps of:(a) forming a linear array pattern of electrically insulative, uniform diameter and height pegs, corresponding to a desired orifice array pattern, on an electrically conductive plating substrate;(b) placing electrically conductive robber panels adjacent said edges of the plating substrate that are perpendicular to said linear array pattern;(c) coupling the pattern bearing surface of said plating substrate to coplanar surfaces of adjacent robber panels with a thin strip of electrically conductive material;(d) placing the coupled plating substrate/robber panel unit in an electroplating system; and(e) operating that system to form an orifice plate having a thickness slightly greater than said peg pattern height and a linear array of precisely uniform diameter orifices.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US07/732,281 US5149419A (en) | 1991-07-18 | 1991-07-18 | Method for fabricating long array orifice plates |
US732281 | 1991-07-18 |
Publications (3)
Publication Number | Publication Date |
---|---|
EP0523385A2 true EP0523385A2 (en) | 1993-01-20 |
EP0523385A3 EP0523385A3 (en) | 1993-05-12 |
EP0523385B1 EP0523385B1 (en) | 1996-01-17 |
Family
ID=24942923
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
EP92110207A Expired - Lifetime EP0523385B1 (en) | 1991-07-18 | 1992-06-17 | Method for fabricating long array orifice plates |
Country Status (4)
Country | Link |
---|---|
US (1) | US5149419A (en) |
EP (1) | EP0523385B1 (en) |
JP (1) | JP3113077B2 (en) |
DE (1) | DE69207663T2 (en) |
Families Citing this family (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5469199A (en) * | 1990-08-16 | 1995-11-21 | Hewlett-Packard Company | Wide inkjet printhead |
US5311252A (en) * | 1992-05-29 | 1994-05-10 | Eastman Kodak Company | Method of proximity imaging photolithographic structures for ink jet printers |
WO1995025341A1 (en) * | 1994-03-15 | 1995-09-21 | Irvine Sensors Corporation | 3d stack of ic chips having leads reached by vias through passivation covering access plane |
DE69508705T2 (en) * | 1994-10-28 | 1999-07-29 | Scitex Digital Printing, Inc., Dayton, Ohio | Pin-free thin film for a permanent shape for a nozzle opening plate |
US5901425A (en) | 1996-08-27 | 1999-05-11 | Topaz Technologies Inc. | Inkjet print head apparatus |
US5788829A (en) * | 1996-10-16 | 1998-08-04 | Mitsubishi Semiconductor America, Inc. | Method and apparatus for controlling plating thickness of a workpiece |
US6174425B1 (en) * | 1997-05-14 | 2001-01-16 | Motorola, Inc. | Process for depositing a layer of material over a substrate |
US6231743B1 (en) | 2000-01-03 | 2001-05-15 | Motorola, Inc. | Method for forming a semiconductor device |
US6586112B1 (en) * | 2000-08-01 | 2003-07-01 | Hewlett-Packard Company | Mandrel and orifice plates electroformed using the same |
JP4074592B2 (en) * | 2004-02-03 | 2008-04-09 | 株式会社山本鍍金試験器 | Electrode cartridge and plating internal stress measurement system |
US20070125654A1 (en) * | 2005-12-02 | 2007-06-07 | Buckley Paul W | Electroform, methods of making electroforms, and products made from electroforms |
US20070125655A1 (en) * | 2005-12-02 | 2007-06-07 | Buckley Paul W | Electroform, methods of making electroforms, and products made from electroforms |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3694325A (en) * | 1971-06-21 | 1972-09-26 | Gen Motors Corp | Process for uniformly electroforming intricate three-dimensional substrates |
US4184925A (en) * | 1977-12-19 | 1980-01-22 | The Mead Corporation | Solid metal orifice plate for a jet drop recorder |
EP0007447A1 (en) * | 1978-07-24 | 1980-02-06 | Siemens Aktiengesellschaft | Method of making microperforated surfaces and application of said method |
EP0317300A2 (en) * | 1987-11-17 | 1989-05-24 | Hewlett-Packard Company | Nozzle plate for an ink jet printer |
US4971665A (en) * | 1989-12-18 | 1990-11-20 | Eastman Kodak Company | Method of fabricating orifice plates with reusable mandrel |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US2675348A (en) * | 1950-09-16 | 1954-04-13 | Greenspan Lawrence | Apparatus for metal plating |
US4067782A (en) * | 1977-05-09 | 1978-01-10 | Xerox Corporation | Method of forming an electroforming mandrel |
US4246076A (en) * | 1979-12-06 | 1981-01-20 | Xerox Corporation | Method for producing nozzles for ink jet printers |
US4374707A (en) * | 1981-03-19 | 1983-02-22 | Xerox Corporation | Orifice plate for ink jet printing machines |
US4855020A (en) * | 1985-12-06 | 1989-08-08 | Microsurface Technology Corp. | Apparatus and method for the electrolytic plating of layers onto computer memory hard discs |
-
1991
- 1991-07-18 US US07/732,281 patent/US5149419A/en not_active Expired - Lifetime
-
1992
- 1992-06-17 DE DE69207663T patent/DE69207663T2/en not_active Expired - Fee Related
- 1992-06-17 EP EP92110207A patent/EP0523385B1/en not_active Expired - Lifetime
- 1992-07-17 JP JP04190667A patent/JP3113077B2/en not_active Expired - Fee Related
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3694325A (en) * | 1971-06-21 | 1972-09-26 | Gen Motors Corp | Process for uniformly electroforming intricate three-dimensional substrates |
US4184925A (en) * | 1977-12-19 | 1980-01-22 | The Mead Corporation | Solid metal orifice plate for a jet drop recorder |
EP0007447A1 (en) * | 1978-07-24 | 1980-02-06 | Siemens Aktiengesellschaft | Method of making microperforated surfaces and application of said method |
EP0317300A2 (en) * | 1987-11-17 | 1989-05-24 | Hewlett-Packard Company | Nozzle plate for an ink jet printer |
US4971665A (en) * | 1989-12-18 | 1990-11-20 | Eastman Kodak Company | Method of fabricating orifice plates with reusable mandrel |
Also Published As
Publication number | Publication date |
---|---|
JP3113077B2 (en) | 2000-11-27 |
JPH05193145A (en) | 1993-08-03 |
DE69207663T2 (en) | 1996-05-30 |
US5149419A (en) | 1992-09-22 |
EP0523385B1 (en) | 1996-01-17 |
DE69207663D1 (en) | 1996-02-29 |
EP0523385A3 (en) | 1993-05-12 |
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