EP0484360A1

EP0484360A1 - Electrical switching circuit.

Info

Publication number: EP0484360A1
Application number: EP90910728A
Authority: EP
Inventors: Heinz Rinderle; Rolf Boehme; Guenter Gleim; Elke Roesch
Original assignee: Telefunken Electronic GmbH; Deutsche Thomson Brandt GmbH
Current assignee: Telefunken Electronic GmbH; Deutsche Thomson Brandt GmbH
Priority date: 1989-07-27
Filing date: 1990-07-04
Publication date: 1992-05-13
Anticipated expiration: 2010-07-04
Also published as: HK106397A; US5245218A; EP0484360B1; AU6073890A; KR0135629B1; HU218058B; HU9200206D0; HUT60046A; FI920357A0; KR920704210A; JP2871850B2; CN1043272C; WO1991002301A1; DD295441A5; ATE116750T1; MY107257A; TR25653A; CN1049065A; DE59008203D1; DE3924804A1

Abstract

A system for regulating the transfer impedance of a plurality of current-to-voltage converters to a substantially equal value includes a reference voltage source and a reference impedance for providing a reference current. A reference current-to-voltage converter is responsive to the reference current and provides an output voltage. A comparator is responsive to the reference voltage and the output voltage and provides a control signal to the reference current-to-voltage converter and to all the other current-to-voltage converters to maintain the transfer impedance of all the current-to-voltage converters constant.

Description

PATENT APPLICATION

Electrical circuit

The invention relates to an electrical circuit with a plurality of current-voltage converters, the parameters of which depend in approximately the same way on external factors.

The transmission resistance of a current-voltage converter, hereinafter referred to as IU converter for short, depends on the temperature and other influencing variables. On the one hand, the temperature dependency in integrated circuits is particularly pronounced because of the strong changes in diffused or implanted resistors. On the other hand, it is often necessary to ensure a high stability of the transmission resistance of an IU converter. This applies, for example, to the integrated circuits of a CD player for vehicles which have to be capable of working and very stable in a temperature range from -20 to +70 Celsius. It is therefore an object of the invention to suppress a drift in the transmission resistance in an electrical circuit with a plurality of IU converters.

The invention solves this problem in that one of the IU converters is provided as a reference IU converter, in that its transmission resistance is compared with the value of a reference resistor and in that a comparison criterion is used for setting the transmission resistance of all IU converters is derived.

The invention will now be explained on the basis of exemplary embodiments. In the accompanying drawing:

Figure 1 shows a first embodiment of the invention;

Figure 2 shows a simple way of generating the reference current;

3 shows the generation of the reference current by means of synchronous Stro sources;

Figure 4 shows the symmetry of the reference voltage;

FIG. 5a shows the electricity generation for the balancing;

FIG. 5b shows the power generation with reversal of direction for the metering;

Figure 6 shows the breakdown of the IU converter into an input stage, a control stage and an output stage;

Figure 7 shows an IU converter with discretely controlled transmission resistance. According to FIG. 1, an integrated circuit contains several, but at least two, IU converters Wr, W1, ..., Wn. Each IU converter has a current-sensitive, preferably low-input, a live output and a control input. One of the IU converters is provided as a reference IU converter Wr. A reference current Iref is generated in a reference current source Iq by means of a reference voltage source Uref and a reference resistor Rref and is supplied to the input of the reference IU converter Wr. The first input of a comparator V1 is connected to the output of the reference IU converter Wr and the second input is connected to the reference voltage source Uref. The control inputs of all IU converters Wr, Wl, ..., Wn are connected to the output of the comparator V1.

The reference current Iref = K1 * Uref / Rref is generated in the reference current I Leq, where K1 is a constant factor. The reference IU converter Wr forms the output voltage Ur = Iref * Rr from the incoming reference current Iref, where Rr is the transmission resistance of the reference IU converter Wr. The comparator V1 forms at least approximately the output signal Sa = V * (Ur - K2 * Uref), K2 being a constant factor and V being the gain. In a stable system, Ur - K2 * Uref = 0 with a sufficiently large gain. With the relationships mentioned above, this results in Rr = Rref * K2 / K1. As a result of the control signal Sa of the reference IU wall Ler Wr assuming the transmission resistance Rr = Rref * K2 / K1, all further IU converters W1 to Wn are provided that they have the same properties as the reference IU converter Wr have set the same transmission resistance R1 = R2 = ... Rn = Rr. The prerequisite for the uniformity of all IU converters with regard to the dependence of individual parameters on external influencing variables can be fulfilled relatively well within an integrated circuit by means of the same structure, close proximity and low temperature gradients. The stability of the reference voltage Uref is not important, since it does not go into the adjustment condition. FIG. 2 shows how the reference current Iref can be generated in a simple manner. The reference resistance Rref lies between the reference voltage source Uref and the input of the reference IU converter Wr. With this arrangement, the potential at the input of the reference IU converter Wr must be equal to the potential of the ground terminal. If the reference resistor Rref is connected externally, two connections are required on the integrated circuit.

The arrangement shown in FIG. 3 is more advantageous. A differential amplifier Vd controls two current sources Iq1 and Iq2, which are shown here in the form of two transistors T1 and T2 with emitter resistors R1 and R2. The output of the differential amplifier Vd is connected to the bases of the transistors T1 and T2. The emitter resistors R1 and R2 lead to a common supply voltage source Ub1. The collector of the first transistor T1, which corresponds to the output of the first current source Iq1, is connected to the reference resistor Rref and the first input terminal of the differential amplifier Vd. The Kollek¬ gate of the _second transistor T2, which corresponds to the output of the second current source Iq2, the reference IU converter Wr is connected to the input.

For a sufficiently high amplification of the differential amplifier Vd, the voltage drop across the reference resistor Rref must be equal to the reference voltage Urefi. The current required for this is supplied by the first current source Iq1. The current Iref to the input of the reference IU wall Lers Wr is supplied by the second current source Iq2. The current sources Iq1 and Iq2 can be dimensioned in such a way that their currents are identical to one another or that what is indicated by emp Chen IU converters is advantageous, the current Iref is a fraction K1 of the current through the reference resistor Rref.

By using an external reference resistor, stabilization can be significantly better than with a chip-based resistance can be achieved. In addition, there is the possibility of compensating for sample variations in the signal sources feeding the IU converter by adapting the reference resistance.

In a bipolar integrated circuit, symmetrical signals are preferred. The reference IU converter Wr supplies the output signal Ur to two connection terminals with opposite polarity, the instantaneous voltage of both output terminals being dependent on the temperature or other influencing factors. A comparison of the symmetrical output signal Ur of the reference IU converter Wr with the asymmetrical reference voltage Uref must therefore be carried out. According to FIG. 4, this can be done by a differential stage comprising two transistors T3 and T4, which is fed by a current source Iv, the current source Iv being dependent on the reference voltage Uref. An emitter resistor R3 is connected upstream of one of the two transistors. The bases of the transistors T3 and T4 are connected to the output terminals of the reference IU converter Wr. The collectors of the transistors T3 and T4 are connected to a current mirror Ssp. A signal Uv is taken from the output A of the current mirror Ssp, which e.g. is converted into a control signal Sr by an output amplifier. The function of this part of the comparator V1 results from the fact that, in the case of a mirror ifactor one of the current mirror Ssp and, in the balanced state, the rain Isch Lei fe, the same currents Iv / 2 flow through the two branches with the transistors T1 and T2 and that the voltage Ur must therefore be equal to the voltage drop Ur3 across the resistor R3.

The current Iv is shown in FIG. 5 - ^"formed by the reference voltage Uref In figure-5a i st ^~~ n ^~ Di ^~ ei fferenzverstärker V2 vorge see, whose first input is connected to the one pole of the voltage source Uref Referenzspan-, whose second input is connected to the one terminal of a reference resistor Rref2 and the output thereof is connected to the base of a current source transistor T5, and the emitter of the current source transistor T5 is connected to the second input of the D fference amplifier V2 connected. The other pole of the reference voltage source Uref and the other connection of the reference resistor Rref2 are at ground or at a reference point.

With a sufficiently high gain of the differential amplifier V2, the voltage drop across the reference resistor Rref2 becomes equal to the reference voltage Uref. The current that can be drawn from the collector of the current source transistor T5 then corresponds to the current through the reference resistance Rref2, except for the low base current. In the case of higher requirements, the current source transistor T5 can be replaced by a Darlington circuit comprising two transistors. Is e.g. R3 = 2 * Rref2, because of the halving of the current Iv, the voltage drop across R3 becomes equal to the reference voltage Uref. Depending on the resistance ratio, the auxiliary voltage Ur3 = Ur can be chosen arbitrarily. A change in the same direction of the resistors Rref2 and R3 leaves the voltage Ur unchanged, because only the resistance ratio R3 / Rref2 is important. A very low temperature dependency of the integrated circuit can thereby be achieved.

The circuit from FIG. 5b differs from the circuit from FIG. 5a in the arrangement of the current source transistor T5, the collector of which is connected here to the second input of the differential amplifier V2, while the emitter represents the current source Len output Ai. While in FIG. 5a the second input of the differential amplifier V2 is of the inverting type, in FIG. 5b it must not be inverting. FIG. 5b also shows how a current source can be formed in the opposite direction. For this purpose, a resistor R5 is connected between the output Ai _and a _Versorgungssj3annungsquelle Ub2 ge ^ cha ltet._ The Ba¬ s ^e ls of a further transistor T6 is connected to the output of Diffe¬ ence amplifier V2. A resistor R6 lies between the supply voltage source Ub2 and the emitter of the transistor T6. The output current Iv in the opposite direction is taken from the collector of transistor T6, which is referred to as output Aj. The task of stabilizing several IU converters while maintaining different transmission resistances can also be carried out with the means according to the invention. For this purpose, according to FIG. 6 it is provided to use a differential stage with bipolar transistors T7 and T8 within the IU converter, which acts as a controllable organ. The i-th IU converter is composed of an input stage Wai, a differential stage Wbi and an output stage Wci. The input stage Wai converts the input current Ii into a voltage Uai. The differential stage Wbi lying between the input stage Wai and the output stage Wci is made up of bipolar transistors T7 and T8, the bases of which are connected to the output of the input stage Wai, the emitters of which are connected to a current source Ibi and the collectors of which are connected to the inputs of the Output stage Wci are connected. The output stage Wci forms the output voltage Ui from the Ko L detector currents of the differential stage Wbi.

The mode of operation is based on the fact that the steepness of the differential stage and thus its amplification is proportional to the current of the current source Ibi. In order to ensure that the i-th converter Wi has K times the transmission resistance compared to the reference IU converter Wr, the current Ibi must assume the K times the value of the current Ibr of the reference IU converter Wr. The technical means for this are known and therefore need not be described here. The possibility of making the factor K variable and thus controllable is included.

One possibility of making the transmission resistance discretely controllable and thus programmable is shown in FIG. 7. Several differential stages made of bipolar transistors T71 ,. T81; T72, T82; T73, T83; ... are connected on the input side to the Wai input section and on the output side to the Wci output section. They are fed by current sources Ib1, Ib2, Ib3 ... which can be switched on and off by controllable switches S1, S2, S3 ... If for the transistors T71, T81; T72, T82; T73, T83; ... the differential stages emitter resistors R71, R81; R72, R82; R73, R83; ... are provided, the linearity and other properties are improved.

The steepness of the middle part Wbi results from the sum of the steepness of the differential stages switched on. As a result, the slope can be changed in stages by means of the controllable switches K1, K2, K3,. It is particularly advantageous to select the currents Ib1, Ib2, Ib3, ... in accordance with a sequence of potencies to the base 2. If emitter resistors are provided, their values must be assigned inversely. In addition, it is recommended that the areas of the transistors T71, T81; T72, T82; ... also staggered in the ratio of the currents, because this enables maximum accuracy and stability to be achieved.

Claims

E§ £ SD £ äDSE £ Ü £ l2§

Electrical circuit with a plurality of current voltage converters ⁽ Wr, W1, ..., Wn), the parameters of which depend in approximately the same way on external influencing variables, since ¬ characterized in that one of the current voltage converters is provided as a reference current voltage converter ⁽ Wr ⁾ , that Transmission resistance is compared with a reference resistance (Rref) and that from the comparison a criterion for setting the transmission resistance of all current voltage transformers (Wr, W1, ..., Wn) is derived.

Electrical circuit according to Claim 1, characterized in that the first input of a first current source (Iq) is connected to ground via the reference resistor (Rref ⁾ , that a reference voltage is present at the second input of the first current source (Iq) and at the first input of a comparator ⁽ VD) (Uref) is that the output of the first current source (Iq) is connected to the input of the reference current voltage wall Lers (Wr), that the output of the reference current voltage converter (Wr) is connected to the second input of the comparator (VD) and that the output of the comparator (VD is connected to the control inputs of all current-voltage converters (Wr, W1, ..., Wn).

The electrical circuit of claim 1, dadurchgekennz ^'eichnet that one pole is a Refe¬ ence voltage source (Uref) and to the first input ei¬ nes comparator (VD and the Referenzw resistor (Rref) to the input of the reference current-voltage converter (Wr) connected that the output of the reference current voltage converter ⁽ Wr ⁾ with the second input of the comparison _

- -

Chers (VD is connected and that the output of the comparator (VD is connected to the control inputs of all current voltage converters (Wr, W1, ...,. Wn ⁾ .

Electrical circuit according to Claim 2, characterized in that the first input of a first differential amplifier (Vd) is connected to ground via the reference resistor (Rref), that the reference voltage (Uref ⁾ is at the second input of the first differential amplifier (Vd), that the output of the first differential amplifier (Vd ⁾ controls a second and a third current source ⁽ Iq1, Iq2 ⁾ and that one of the two current sources supplies the current for the reference current-voltage converter (Wr).

Electrical circuit according to Claim 4, characterized in that the first input of the first differential amplifier (Vd) is connected to ground via the reference resistor (Rref>), that the reference voltage (Uref) is at the second input of the first differential amplifier (Vd), that the output of the first differential amplifier (Vd) is connected to the base of a first and second transistor (T1, T2) such that the emitter of the first and second transistor (T1, T2) connects a resistor (R1, R2) via e a first supply voltage (UbD is that the collector of the first transistor (T1 ^{) is} connected to the first input of the first differential amplifier (Vd ⁾ and that the collector of the second transistor (T2 ^{) is} connected to the input of the reference current voltage converter ⁽ Wr) connected is.

Electrical circuit according to claim 4 or 5, since ¬ characterized in that the currents of the current sources (Iq1, Iq2 ⁾ or the first and second transistor (T1, T2) are chosen to be the same size. 7. Electrical circuit according to claim 4 or 5, since ¬ characterized in that the current ⁽ Iref ⁾ at the input of the reference current voltage converter (Wr) is chosen smaller than the current flowing through the reference resistor (Rref) ß current.

8. Electrical circuit according to claim 1, 2, 3, 4, 5, 6 or 7, d a d u r c h g e k e n n z e i c h n e t that the comparator (VD contains a third current source (Iv) which is controlled by the supplied reference voltage (Uref).

9. Electrical circuit according to claim 8, characterized in that the comparator (VD contains an asymmetrical differential stage with a third and fourth transistor (T3, T4),. That the bases of the third and fourth transistor (T3, T4) the second input of the Ver ¬ gleichers ⁽¹⁾ form, that the emitter of the (T4 T3) are connected to the third current source (Iv) third and vier¬ th transistor, wherein the emitter of the third or fourth transistor ^(T3) upstream of a resistor (R3) , and that the collectors of the third and fourth transistor (T3, T4) are connected to the input (E) and the output (A) of a current mirror Ls (Ssp).

10. Electrical circuit according to claim 8, characterized in that the third current source (Iv ^{) is constructed} such that the one pole of the reference voltage source (Uref) is connected to the non-inverting input of a second differential amplifier (V2) ^ that the inverting input of the second differential amplifier (V2) is connected to the emitter of a fifth transistor (T5) and via a fourth resistor (Rref2) to the other pole of the reference voltage source (Uref), which is grounded, that the base of the fifth transistor (T5) connected to the output of the second differential amplifier (V2) - "1, 2 -

is bound and that the collector of the fifth transistor (T5) represents the output of the third current source (Iv).

11. Electrical circuit according to claim 8, characterized in that the third current source (Iv) st such that the reference voltage source (Uref) is connected to the inverting input of a second differential amplifier (V2) that the ni chti nverti e- end Input of the second differential amplifier ⁽ V2 ^{) is} connected to the collector of a fifth transistor (T5 ⁾ and via a fourth resistor (Rref2) to the other pole of the reference voltage source (Uref ⁾ that the base of the fifth transistor (T5 ) is connected to the output of the second differential amplifier (V2) and that the emitter of the fifth transistor (T5) represents the output (Ai) of the third current source (Iv).

12. Electrical circuit according to claim 8, characterized in that the third current source (Iv) is constructed such that the one pole of the reference voltage source (Uref) is connected to the inverting input of a second differential amplifier (V2), the non-inverting input of which the collector of a fifth transistor (T5) and a fourth resistor (Rref2) is connected to the other pole of the reference voltage source (Uref) such that the output of the second differential amplifier (V2) is connected to the base of the fifth transistor (T5) and a sixth transistor (T6) is connected that the emitter of the fifth transistor (T5) via a fifth resistor (R5) and the emitter of the sixth transistor (T6) via a sixth resistor ^" CR6) ^~ to a second supply voltage source (Ub2 ^{) is} connected and that the collector of the sixth transistor (T6 ^{) represents} the output (Aj) of the third current source ⁽ Iv). 13. Electrical circuit according to one or more of the preceding claims, characterized in that each current-voltage converter (Wr, W1, ..., Wn ⁾ consists of an input stage (Wai), an output stage ⁽ Wci ⁾ and one between the input stage (Wai) and output stage (Wci) lying control stage (Wbi) is constructed.

14. Electrical circuit according to claim 13, characterized in that the first output of the input stage ⁽ Wai ^{) is} connected to the base of a seventh transistor ⁽ T7 ⁾ , the collector of which is connected to the first input of the output stage (Wci) that the second output of the input stage (Wai) is connected to the base of an eighth transistor (T8), the collector of which is connected to the second input of the output stage (Wci), that the interconnected emitter of the seventh and eighth transistors (T7, T8) one pole of a controllable current source ⁽ Ibi) is connected and that the seventh and eighth transistors (T7, T8) and the controllable current source ⁽ Ibi ^{) form} the control stage (Wbi).

15. Electrical circuit according to claim 14, characterized in that a plurality of control stages ⁽ Wbi ⁾ are connected in parallel to each other, that for each transistor (T71, T72, ... T81, T82, ...) an emitter resistor (R71, R72, ..., R81, R82, ...) is provided and that each controllable current source (Ibi, Ib2, ...) by means of a controllable switch (S1, S2, ...) to the emitter resistors (R71 , R72, ..., R81, R82, ...) can be switched on.

16. Electrical circuit according to claim 15, characterized in that the currents of the controllable current sources (Ib1, Ib2, ...) are selected according to a Poteπzzeile ur base 2. 17. Electrical circuit according to claim 15 or 16, since ¬ characterized in that the areas of the transistors (T71, T72, ..., T81, T82, ...) in the ratio of the currents of the current sources (Ib1, Ib2,. .. ⁾ are staggered.