EP0424264B1 - Stromquelle mit niedrigem Temperaturkoeffizient - Google Patents
Stromquelle mit niedrigem Temperaturkoeffizient Download PDFInfo
- Publication number
- EP0424264B1 EP0424264B1 EP90402933A EP90402933A EP0424264B1 EP 0424264 B1 EP0424264 B1 EP 0424264B1 EP 90402933 A EP90402933 A EP 90402933A EP 90402933 A EP90402933 A EP 90402933A EP 0424264 B1 EP0424264 B1 EP 0424264B1
- Authority
- EP
- European Patent Office
- Prior art keywords
- transistor
- current source
- transistors
- current
- gate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Images
Classifications
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F3/00—Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
- G05F3/02—Regulating voltage or current
- G05F3/08—Regulating voltage or current wherein the variable is DC
- G05F3/10—Regulating voltage or current wherein the variable is DC using uncontrolled devices with non-linear characteristics
- G05F3/16—Regulating voltage or current wherein the variable is DC using uncontrolled devices with non-linear characteristics being semiconductor devices
- G05F3/20—Regulating voltage or current wherein the variable is DC using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
- G05F3/24—Regulating voltage or current wherein the variable is DC using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations wherein the transistors are of the field-effect type only
- G05F3/242—Regulating voltage or current wherein the variable is DC using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations wherein the transistors are of the field-effect type only with compensation for device parameters, e.g. channel width modulation, threshold voltage, processing, or external variations, e.g. temperature, loading, supply voltage
- G05F3/247—Regulating voltage or current wherein the variable is DC using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations wherein the transistors are of the field-effect type only with compensation for device parameters, e.g. channel width modulation, threshold voltage, processing, or external variations, e.g. temperature, loading, supply voltage producing a voltage or current as a predetermined function of the supply voltage
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F3/00—Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
- G05F3/02—Regulating voltage or current
- G05F3/08—Regulating voltage or current wherein the variable is DC
- G05F3/10—Regulating voltage or current wherein the variable is DC using uncontrolled devices with non-linear characteristics
- G05F3/16—Regulating voltage or current wherein the variable is DC using uncontrolled devices with non-linear characteristics being semiconductor devices
- G05F3/20—Regulating voltage or current wherein the variable is DC using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
- G05F3/24—Regulating voltage or current wherein the variable is DC using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations wherein the transistors are of the field-effect type only
- G05F3/242—Regulating voltage or current wherein the variable is DC using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations wherein the transistors are of the field-effect type only with compensation for device parameters, e.g. channel width modulation, threshold voltage, processing, or external variations, e.g. temperature, loading, supply voltage
- G05F3/245—Regulating voltage or current wherein the variable is DC using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations wherein the transistors are of the field-effect type only with compensation for device parameters, e.g. channel width modulation, threshold voltage, processing, or external variations, e.g. temperature, loading, supply voltage producing a voltage or current as a predetermined function of the temperature
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S323/00—Electricity: power supply or regulation systems
- Y10S323/907—Temperature compensation of semiconductor
Definitions
- the invention relates to integrated circuits, and more particularly to the manner of producing in these circuits a constant constant current source as a function of the temperature and of the supply voltage of the integrated circuit.
- the reference voltage source can be of the type known as the "bandgap" reference source.
- the English name “bandgap” designates the energy interval between the valence bands and the conduction bands of a semiconductor; these sources use the known dependence between this interval and the temperature, to carry out compensations which make the reference voltage as stable as possible as a function of the temperature. See for example K.E. Kuijk in IEEE Journal of Solid-State Circuits vol SC-8 N ° 3 June 1973 "A precision Reference Voltage Source”.
- a "bandgap" voltage source generally comprises two diodes traversed by different currents (or the same currents, but then the diodes must necessarily have different junction surfaces) and a loopback differential amplifier amplifying the voltage difference across the diodes and supplying current to the diodes.
- a reference voltage source "bandgap” is shown in Figure 1. We will return later on the detailed description of this circuit.
- Reference sources are also known which are known under the name of "Wilson mirrors” source (see for example GB-A-2 070 820). Such a source is shown in FIG. 2. It is based on mutual compensations for variations in the characteristics of several transistors which reciprocally copy their currents.
- a Wilson current source comprises two branches parallel to two transistors each and the transistors are mounted so that each of the branches copies the current from the other, two transistors (each belonging to a respective branch) being different in size or in threshold voltage.
- a reference current source produced from the addition of two currents, one from a first transistor whose gate is controlled by a reference voltage source "bandgap" , the other one a second transistor, the gate of which is controlled by a "Wilson mirror” reference voltage source.
- the invention is based on the observation that it is possible to produce both a current controlled by a "bandgap" reference source and having a certain variation curve as a function of temperature, and a current controlled by a reference source with "Wilson mirror” and having another variation curve as a function of temperature.
- a current controlled by a "bandgap” reference source and having a certain variation curve as a function of temperature and a current controlled by a reference source with "Wilson mirror” and having another variation curve as a function of temperature.
- the "bandgap” source comprises an operational amplifier looped by resistors and to the input of which are connected diodes, an output field effect transistor having its gate biased by the output of the operational amplifier ;
- the "Wilson mirror” source conventionally comprises four transistors and one output transistor.
- the output transistors, each driven by a different voltage source, are connected with their connected sources and their connected drains, that is to say that they are in parallel but controlled by different potentials.
- the nominal current in the transistor controlled by the "bandgap" source is greater than the current in the other transistor, in a ratio of between 1.5 and 3.5, preferably around 2.5.
- the source of the bandgap type is improved in the following manner: the operational amplifier of the voltage source "bandgap" comprises two differential branches supplied by a transistor constituting a current generator, and it is proposed that this current generator is produced from a field effect transistor whose gate is biased by a bias circuit receiving the reference voltage produced at the output of the bandgap reference source itself.
- the bias circuit preferably comprises a set of two transistors in series, one of which, connected to a power source Vcc, receives the reference voltage, and the other of which, connected by its source to ground, has its grid connected to its drain and provides on its drain a bias voltage for the current source of the operational amplifier.
- the "bandgap" voltage source comprises an operational amplifier AO having a first input E1, a second E2, and an output S.
- the input E1 is connected through a resistor R1 in series with a diode D1 to an electrical ground.
- the input E2 is connected through a diode D2 to ground.
- a loop resistance R2 connects the output S to the input E1;
- a resistor R3 connects the output S to the input E2.
- the output of the amplifier delivers a reference voltage Vref1 stable in temperature and stable as a function of the supply Vcc of the integrated circuit incorporating this reference source. With current technologies used to make CMOS circuits on silicon, the reference voltage obtained automatically at the amplifier output is for example 1.255 volts.
- Vbe2 varies with temperature (around -2.2 mV / ° C).
- R1, R2, R3 and S1 / S2 we will choose the values R1, R2, R3 and S1 / S2 so that the term Vf.R2 / R1 varies exactly in opposite directions (from +2.2 mv / ° C for example) in the desired temperature range.
- this voltage source to drive the gate of a field effect transistor having its source grounded, we will get in this output transistor a current that varies depending on the temperature.
- the variation is complex: it results from the fact that the threshold voltage of the output transistor varies with the temperature, this variation being moreover partially compensated by the fact that the mobility of the carriers varies with the temperature.
- FIG. 2 represents a reference voltage or current source with "Wilson mirrors". It comprises two branches in parallel between two supply terminals which are for example the ground and a positive voltage terminal Vcc.
- the first branch includes a first P-channel MOS transistor T1 in series with a second N-channel transistor T2.
- the second branch comprises a third transistor, with P channel, T3 in series with a fourth transistor, with N channel T4.
- the first and the fourth transistors are mounted in resistance, with their drain connected to their gate.
- the third and second transistors copy the currents in the first and fourth transistors respectively.
- a current copying arrangement is an arrangement in which the transistor which copies the current of another has its gate and its source connected respectively to the gate and to the source of this other transistor.
- the current is copied with a proportionality factor which is the ratio between the geometries of the transistors.
- the stable reference voltage Vref2 generated by this arrangement is taken at the junction point of the drains of the transistors of a branch, here at the junction point of the transistors T3 and T4.
- the transistors T2 and T4 have different threshold voltages, which is obtained by different doping of their channels.
- the circuit according to the invention is shown in Figure 3. It comprises two transistors Q1 and Q2 mounted in parallel, that is to say with their sources connected together to ground and their drains connected together. Their gates are controlled separately, one by the voltage Vref1 coming from a reference voltage source like that of FIG. 1, the other by the reference voltage Vref2 coming from a reference voltage source like that of Figure 2.
- the transistors Q1 and Q2 are N channel transistors, to produce a current source I drained to ground. But they could also be P channel transistors whose drains are connected to Vcc, to produce a current source I drained from the supply voltage Vcc.
- the output current I of the current source thus described is in both cases taken from the combined drains of the two transistors Q1 and Q2. It is the sum of the current I1 in the transistor Q1 and the current I2 in the transistor Q2.
- the two transistors Q1 and Q2 are in principle not the same size. Their respective sizes depend first of all on the differences in value of the reference voltages. Vref1 and Vref2; these values themselves depend on the values of resistances and junction surfaces or of geometries of transistors; it then depends on the way in which the currents in each of the transistors Q21 and Q2 vary with the temperature.
- the components of the circuit supplying Vref1 are first chosen.
- the reference voltage obtained Vref1 is the sum of an elbow voltage Vbe2 of the diode D2 and a voltage which is the well-known "bandgap" voltage (represented in general by the algebraic form kT / q where k and q are physical constants and T the absolute temperature), this voltage being multiplied by a multiplicative factor K.
- the multiplicative factor K is equal to R2 / R1 multiplied by the natural logarithm of the following expression: R2.S1 / R3.S2 where S1 and S2 are the junction surfaces of diodes D1 and D2; R1, R2, R3 are the values of the resistances.
- Vref2 By calculating this voltage by conventional voltage and current equations taking into account the fact that the current in a MOS transistor is proportional to the square of the difference between its gate-source voltage and its threshold voltage. The technology gives the threshold voltage of the different transistors. The current is also proportional to the mobility of the carriers, to the capacity of the gate, and to the geometry of the transistor (W / L ratio between width and length of channel).
- the amplifier will in fact be produced in practice by simple mounting with a few transistors, such as that which is represented in FIG. 4.
- the operational amplifier comprises an assembly with two differential branches (Q3, Q4, T′3, T′4) supplied by a constant current source (transistor T5 whose gate is polarized by a bias voltage Vbias), and finally an output stage T6, T7.
- this current source which feeds the differential branches is produced from a field effect transistor whose gate is biased by a bias circuit receiving the reference voltage produced at the output of the source. reference bandgap itself.
- FIG. 5 represents the reference source "bandgap" modified according to the invention.
- the circuit of FIG. 5 comprises an operational amplifier AO similar to that of FIG. 4 except as regards the current source which supplies its two differential branches.
- the amplifier AO is also connected in a circuit identical in this example to that of FIG. 1: a non-inverting input E1 of the amplifier is connected by a resistor R1 and a diode D1 to ground. An inverting input E2 is connected by a diode D2 to ground. The non-inverting input is connected to the output of the amplifier by a loop resistance R2; the inverting input is connected to the output by a loop resistance R3.
- the output of the circuit is the output S of the operational amplifier and it is on this output that a stable reference voltage Vref is supplied as a function of the temperature and the supply voltage Vcc of the circuit.
- the operational amplifier comprises two differential branches supplied by a common current source, and an output stage.
- the current source comprises the N-channel transistor T5, and a bias circuit of this transistor T5.
- the first differential branch connected between the drain of transistor T5 and the general supply voltage Vcc of the circuit, comprises a set of two transistors in series Q3 and Q4.
- Q3 is a P channel transistor connected by its source to Vcc and having its drain connected to its gate.
- Q4 is an N-channel transistor having its source connected to the current source T5.
- the second differential branch connected in parallel with the first, comprises a set of two transistors in series T′3 and T′4.
- T′3 is a P channel transistor connected by its source to Vcc.
- T′4 is an N channel transistor having its source connected to T5.
- the entry E1 is constituted by the grid of T′4; the input E2 is constituted by the grid of Q4.
- the output stage comprises in series between Vcc and the ground a P channel transistor T6 and an N channel transistor T7.
- T6 has its grid connected to the junction of the drains of T′3 and T′4; it also has its gate connected by a capacitor C to its drain (for conventional reasons of stabilization).
- T7 has its drain connected to that of T6 and its gate receives a bias voltage which is preferably the same as the bias voltage used for the gate of T5.
- the output S of the amplifier AO is the common drain of the transistors T6 and T7 of the output stage.
- the current source supplying the differential branches of the amplifier is biased by a bias circuit which uses the output voltage Vref of the amplifier.
- the bias circuit comprises two N-channel transistors T8 and T9 in series between the supply voltage Vcc and ground.
- T8 has its drain connected to Vcc, its source connected to the drain of T9, and its gate connected to the output S of the operational amplifier.
- T9 has its source connected to ground and its grid connected to its drain.
- the bias voltage Vbias applied to the gate of the transistor T5 is taken from the junction point of the transistors T8 and T9.
- the transistor T8 is preferably a transistor whose channel length L is much greater than its width ("long transistor"), for example in a ratio 100 to 3, so that it necessarily remains in saturation (small variation of its drain current even for a large variation in its drain-source voltage).
- Transistor T9 is, on the contrary, a "short" transistor having a much greater width-to-length ratio (for example of the order of unity), with a channel width of the same order as that of T8.
- the performance of the voltage source according to the invention can be summarized below, in a practical example: the table below represents the variation in reference voltage as a function of temperature and of the supply voltage Vcc for the assembly according to the invention as described above (table with double input).
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Electromagnetism (AREA)
- General Physics & Mathematics (AREA)
- Radar, Positioning & Navigation (AREA)
- Automation & Control Theory (AREA)
- Control Of Electrical Variables (AREA)
- Amplifiers (AREA)
Claims (11)
- Referenzstromquelle, ausgeführt ausgehend von der Addition zweier Ströme, der eine (I1) ausgegeben von einem ersten Transistor (Q1), der andere (I2) ausgegeben von einem zweiten Transistor (Q2), dadurch gekennzeichnet, daß die Gate-Elektrode des ersten Transistors (Q1) durch eine Referenzspannungsquelle (Vref1) "Bandgap" gesteuert ist und die Gate-Elektrode des zweiten Transistors (Q2) durch eine Referenzspannungsquelle (Vref2) "Wilson-Spiegel" gesteuert ist.
- Stromquelle nach Anspruch 1, dadurch gekennzeichnet, daß die "Bandgap"-Referenzquelle einen Operationsverstärker (A0) umfaßt, der einen invertierenden Eingang und einen nichtinvertierenden Eingang aufweist, mit zwei mit diesen Eingängen verbundenen Dioden (D1 und D2) und Schleif- (R2, R3) und Eingangswiderständen (R1) für den Verstärker.
- Stromquelle nach Anspruch 2, dadurch gekennzeichnet, daß die Dioden einerseits mit elektrischer Masse und andererseits jeweils mit einem entsprechenden Eingang des Verstärkers verbunden sind, wobei ein Eingangswiderstand (R1) zwischen wenigstens der einen der Dioden (D1) und dem entsprechenden Eingang zu dieser Diode geschaltet ist und wobei ein entsprechender Schleifwiderstand (R2, R3) zwischen einem Ausgang des Verstärkers und jedem der Eingänge vorgesehen ist.
- Stromquelle nach einem der Ansprüche 1 bis 3, dadurch gekennzeichnet, daß die "Wilson-Spiegel"-Quelle zwei Zweige parallel zwischen zwei Versorgungsanschlüssen aufweist, wobei der erste Zweig einen ersten P-Kanal-Transistor (T1) in Reihe mit einem zweiten N-Kanal-Transistor (T2) umfaßt, wobei der zweite Zweig einen dritten P-Kanal-Transistor (T3) in Reihe mit einem vierten N-Kanal-Transistor (T4) umfaßt, wobei der zweite und der dritte Transistor geschaltet sind derart, daß jeweils die Ströme des vierten und des ersten wieder kopiert werden.
- Stromquelle nach einem der Ansprüche 1 bis 4, dadurch gekennzeichnet, daß die beiden Transistoren, deren Gate-Elektroden durch die Referenzquellen gesteuert werden, in Beziehung mit den durch die Referenzquellen ausgegebenen Spannungswerten gewählte Geometrien aufweisen, um die Änderung des Gesamtstroms der Quelle abhängig von der Temperatur auf ein Minimum herabzusetzen.
- Stromquelle nach Anspruch 5, dadurch gekennzeichnet, daß der Strom in dem durch die "bandgap"-Quelle gesteuerten Transistor einen Nennwert ungefähr 2,5 mal größer als der Nennwert des Stroms in dem durch die andere Stromquelle gesteuerten Transistor aufweist.
- Stromquelle nach einem der vorhergehenden Ansprüche, in dem die "Bandgap"-Spannungsquelle einen Operationsverstärker (A0), Dioden (D1, D2) und durch den Ausgang des Verstärkers stromversorgte Widerstände (R1, R2, R3) umfaßt, wobei der Operationsverstärker (2) durch eine Stromquelle (T5) versorgte Differenzzweige (Q3, Q4; T′3, T′4) umfaßt, wobei diese Stromquelle einen Transistor und einen Polarisationskreis dieses Transistors aufweist, dadurch gekennzeichnet, daß der Polarisationskreis zur Erzeugung einer Polarisationsspannung der Gate-Elektrode des Transistors (T5) der Stromquelle die vom Ausgang des Operations-verstärkers ausgegebene stabile Referenzspannung verwendet.
- Stromquelle nach Anspruch 7, dadurch gekennzeichnet, daß der Polarisationskreis zwei Transistoren in Reihe aufweist, wobei die Gate-Elektrode des einen der Transistoren (T8) die stabile Referenzspannung (Vref) aufnimmt, wobei die Gate-Elektrode des anderen Transistors (T9) mit ihrer Drain-Elektrode verbunden ist und wobei der Anschlußpunkt der beiden Transistoren mit der Gate-Elektrode des Transistors der Stromquelle verbunden ist.
- Stromquelle nach Anspruch 8, dadurch gekennzeichnet, daß die beiden Transistoren des Polarisationskreises mit N-Kanal sind, wobei die Drain-Elektrode des Transistors (T8), der die Referenzspannung auf seiner Gate-Elektrode aufnimmt, mit der Versorgungsspannung (Vcc) des Kreises verbunden ist, und die Source-Elektrode des anderen (T9) auf Masse ist.
- Stromquelle nach Anspruch 9, dadurch gekennzeichnet, daß der Transistor (T8), der die Referenzsspannung auf seiner Gate-Elektrode aufnimmt, ein Transistor mit langem Kanal ist, und der andere Transistor (T9) des Polarisationskreises ein Transistor mit kurzem Kanal ist.
- Stromquelle nach einem der Ansprüche 1 bis 9, dadurch gekennzeichnet, daß der Verstärker einen nichtinvertierenden Eingang (E1) und einen invertierenden Eingang (E2) umfaßt, wobei der eine der Eingänge über eine Diode mit einer Masse verbunden ist, wobei der andere über einen Widerstand und eine Diode in Reihe mit der Masse verbunden ist, und wobei der Ausgang über einen entsprechenden Widerstand (R2, R3) auf jedem der Eingänge zur Schleife zurückgeschaltet ist.
Applications Claiming Priority (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR8913758 | 1989-10-20 | ||
FR8913757 | 1989-10-20 | ||
FR8913758A FR2653574B1 (fr) | 1989-10-20 | 1989-10-20 | Source de courant a faible coefficient de temperature. |
FR8913757A FR2653572A1 (fr) | 1989-10-20 | 1989-10-20 | Circuit de reference de tension. |
Publications (2)
Publication Number | Publication Date |
---|---|
EP0424264A1 EP0424264A1 (de) | 1991-04-24 |
EP0424264B1 true EP0424264B1 (de) | 1993-01-20 |
Family
ID=26227612
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
EP90402933A Expired - Lifetime EP0424264B1 (de) | 1989-10-20 | 1990-10-18 | Stromquelle mit niedrigem Temperaturkoeffizient |
Country Status (3)
Country | Link |
---|---|
US (1) | US5103159A (de) |
EP (1) | EP0424264B1 (de) |
DE (1) | DE69000803T2 (de) |
Families Citing this family (22)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
IT1245237B (it) * | 1991-03-18 | 1994-09-13 | Sgs Thomson Microelectronics | Generatore di tensione di riferimento variabile con la temperatura con deriva termica prestabilita e funzione lineare della tensione di alimentazione |
EP0504983A1 (de) * | 1991-03-20 | 1992-09-23 | Koninklijke Philips Electronics N.V. | Referenzschaltung zum Zuführen eines Referenzstromes mit vorbestimmtem Temperaturkoeffizienten |
IT1252324B (it) * | 1991-07-18 | 1995-06-08 | Sgs Thomson Microelectronics | Circuito integrato regolatore di tensione ad elevata stabilita' e basso consumo di corrente. |
US5428287A (en) * | 1992-06-16 | 1995-06-27 | Cherry Semiconductor Corporation | Thermally matched current limit circuit |
JPH0778481A (ja) | 1993-04-30 | 1995-03-20 | Sgs Thomson Microelectron Inc | ダイレクトカレント和バンドギャップ電圧比較器 |
US6060945A (en) * | 1994-05-31 | 2000-05-09 | Texas Instruments Incorporated | Burn-in reference voltage generation |
US6204701B1 (en) | 1994-05-31 | 2001-03-20 | Texas Instruments Incorporated | Power up detection circuit |
US5497348A (en) * | 1994-05-31 | 1996-03-05 | Texas Instruments Incorporated | Burn-in detection circuit |
US6127881A (en) * | 1994-05-31 | 2000-10-03 | Texas Insruments Incorporated | Multiplier circuit |
GB9417267D0 (en) * | 1994-08-26 | 1994-10-19 | Inmos Ltd | Current generator circuit |
US5880599A (en) * | 1996-12-11 | 1999-03-09 | Lsi Logic Corporation | On/off control for a balanced differential current mode driver |
US5883507A (en) * | 1997-05-09 | 1999-03-16 | Stmicroelectronics, Inc. | Low power temperature compensated, current source and associated method |
JP3586073B2 (ja) | 1997-07-29 | 2004-11-10 | 株式会社東芝 | 基準電圧発生回路 |
DE69710467T2 (de) * | 1997-10-23 | 2002-11-07 | Stmicroelectronics S.R.L., Agrate Brianza | Erzeugung von symetrischen temperaturkompensierten rauscharmen Referenzspannungen |
GB0211564D0 (en) * | 2002-05-21 | 2002-06-26 | Tournaz Technology Ltd | Reference circuit |
US6737849B2 (en) | 2002-06-19 | 2004-05-18 | International Business Machines Corporation | Constant current source having a controlled temperature coefficient |
US6919716B1 (en) | 2002-08-28 | 2005-07-19 | Cisco Technology, Inc. | Precision avalanche photodiode current monitor |
US7372316B2 (en) * | 2004-11-25 | 2008-05-13 | Stmicroelectronics Pvt. Ltd. | Temperature compensated reference current generator |
KR100738964B1 (ko) * | 2006-02-28 | 2007-07-12 | 주식회사 하이닉스반도체 | 밴드갭 기준전압 발생 회로 |
KR20100124381A (ko) * | 2009-05-19 | 2010-11-29 | 삼성전자주식회사 | 직접 게이트 구동 기준 전류원 회로 |
FR2995723A1 (fr) * | 2012-09-19 | 2014-03-21 | St Microelectronics Crolles 2 | Circuit de fourniture de tension ou de courant |
JP6083421B2 (ja) * | 2014-08-28 | 2017-02-22 | 株式会社村田製作所 | バンドギャップ基準電圧回路 |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS56121114A (en) * | 1980-02-28 | 1981-09-22 | Seiko Instr & Electronics Ltd | Constant-current circuit |
US4325018A (en) * | 1980-08-14 | 1982-04-13 | Rca Corporation | Temperature-correction network with multiple corrections as for extrapolated band-gap voltage reference circuits |
US4443753A (en) * | 1981-08-24 | 1984-04-17 | Advanced Micro Devices, Inc. | Second order temperature compensated band cap voltage reference |
US4525663A (en) * | 1982-08-03 | 1985-06-25 | Burr-Brown Corporation | Precision band-gap voltage reference circuit |
JPS5952321A (ja) * | 1982-09-17 | 1984-03-26 | Matsushita Electric Ind Co Ltd | 電流源回路 |
JP2525346B2 (ja) * | 1983-10-27 | 1996-08-21 | 富士通株式会社 | 定電流源回路を有する差動増幅回路 |
US4935690A (en) * | 1988-10-31 | 1990-06-19 | Teledyne Industries, Inc. | CMOS compatible bandgap voltage reference |
US4849684A (en) * | 1988-11-07 | 1989-07-18 | American Telephone And Telegraph Company, At&T Bell Laaboratories | CMOS bandgap voltage reference apparatus and method |
FR2652672B1 (fr) * | 1989-10-02 | 1991-12-20 | Sgs Thomson Microelectronics | Memoire a temps de lecture ameliore. |
-
1990
- 1990-10-18 DE DE9090402933T patent/DE69000803T2/de not_active Expired - Fee Related
- 1990-10-18 EP EP90402933A patent/EP0424264B1/de not_active Expired - Lifetime
- 1990-10-19 US US07/600,309 patent/US5103159A/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
DE69000803D1 (de) | 1993-03-04 |
US5103159A (en) | 1992-04-07 |
DE69000803T2 (de) | 1993-06-09 |
EP0424264A1 (de) | 1991-04-24 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
EP0424264B1 (de) | Stromquelle mit niedrigem Temperaturkoeffizient | |
EP0733961B1 (de) | Referenzstromgenerator in CMOS-Technologie | |
EP3176669B1 (de) | Schaltkreis zur erzeugung einer referenzspannung | |
FR2623307A1 (fr) | Source de courant a deux bornes avec compensation de temperature | |
EP1380914A1 (de) | Referenzspannungsquelle, Temperatursensor,Temperaturschwellendetektor, Chip und entsprechendes System | |
EP2067090B1 (de) | Spannungsreferenz-elektronikschaltung | |
FR2890259A1 (fr) | Circuit de generation d'un courant de reference et circuit de polarisation | |
CH697322B1 (fr) | Procédé de génération d'un courant sensiblement indépendent de la température et dispositif permettant de mettre en oeuvre ce procédé. | |
FR2975510A1 (fr) | Dispositif de generation d'une tension de reference de bande interdite ajustable a fort taux de rejection d'alimentation | |
FR2975512A1 (fr) | Procede et dispositif de generation d'une tension de reference ajustable de bande interdite | |
FR2832819A1 (fr) | Source de courant compensee en temperature | |
EP0756223B1 (de) | Spannungs- und/oder Stromreferenzgenerator in integriertem Schaltkreis | |
EP0188401B1 (de) | Referenzspannungsquelle | |
EP0649079B1 (de) | Geregelter Spannungsquellengenerator der Bandgapbauart | |
FR2637747A1 (fr) | Procede pour produire une tension de decalage nulle dans un circuit suiveur de tension et amplificateur a tension de decalage nulle | |
FR2801145A1 (fr) | Circuit d'alimentation a courant constant | |
EP1566717B1 (de) | Vorrichtung zur Erzeugung einer verbesserten Referenzspannung und entsprechende integrierte Schaltung | |
EP0524294B1 (de) | Verstärkerschaltung mit exponentieller verstärkungssteuerung | |
CH644231A5 (fr) | Circuit a gain variable commande par une tension. | |
FR2757964A1 (fr) | Regulateur de tension serie | |
EP0829796B1 (de) | Spannungssteuerung mit gedämpfter Temperaturempfindlichkeit | |
FR2620541A1 (fr) | Circuit regulateur de tension | |
FR2653574A1 (fr) | Source de courant a faible coefficient de temperature. | |
FR2834086A1 (fr) | Generateur de tension de reference a performances ameliorees | |
EP1164455B1 (de) | Verfahren und Vorrichtung zur Erzeugung eines temperaturunabhängigen Stroms |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PUAI | Public reference made under article 153(3) epc to a published international application that has entered the european phase |
Free format text: ORIGINAL CODE: 0009012 |
|
AK | Designated contracting states |
Kind code of ref document: A1 Designated state(s): DE FR GB IT |
|
17P | Request for examination filed |
Effective date: 19910307 |
|
17Q | First examination report despatched |
Effective date: 19910606 |
|
ITF | It: translation for a ep patent filed | ||
GRAA | (expected) grant |
Free format text: ORIGINAL CODE: 0009210 |
|
AK | Designated contracting states |
Kind code of ref document: B1 Designated state(s): DE FR GB IT |
|
REF | Corresponds to: |
Ref document number: 69000803 Country of ref document: DE Date of ref document: 19930304 |
|
GBT | Gb: translation of ep patent filed (gb section 77(6)(a)/1977) |
Effective date: 19930422 |
|
PLBE | No opposition filed within time limit |
Free format text: ORIGINAL CODE: 0009261 |
|
STAA | Information on the status of an ep patent application or granted ep patent |
Free format text: STATUS: NO OPPOSITION FILED WITHIN TIME LIMIT |
|
26N | No opposition filed | ||
REG | Reference to a national code |
Ref country code: FR Ref legal event code: D6 |
|
PGFP | Annual fee paid to national office [announced via postgrant information from national office to epo] |
Ref country code: DE Payment date: 20001009 Year of fee payment: 11 |
|
REG | Reference to a national code |
Ref country code: GB Ref legal event code: IF02 |
|
PG25 | Lapsed in a contracting state [announced via postgrant information from national office to epo] |
Ref country code: DE Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES Effective date: 20020702 |
|
PGFP | Annual fee paid to national office [announced via postgrant information from national office to epo] |
Ref country code: FR Payment date: 20021008 Year of fee payment: 13 |
|
PGFP | Annual fee paid to national office [announced via postgrant information from national office to epo] |
Ref country code: GB Payment date: 20021016 Year of fee payment: 13 |
|
PG25 | Lapsed in a contracting state [announced via postgrant information from national office to epo] |
Ref country code: GB Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES Effective date: 20031018 |
|
GBPC | Gb: european patent ceased through non-payment of renewal fee |
Effective date: 20031018 |
|
PG25 | Lapsed in a contracting state [announced via postgrant information from national office to epo] |
Ref country code: FR Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES Effective date: 20040630 |
|
REG | Reference to a national code |
Ref country code: FR Ref legal event code: ST |
|
PG25 | Lapsed in a contracting state [announced via postgrant information from national office to epo] |
Ref country code: IT Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES;WARNING: LAPSES OF ITALIAN PATENTS WITH EFFECTIVE DATE BEFORE 2007 MAY HAVE OCCURRED AT ANY TIME BEFORE 2007. THE CORRECT EFFECTIVE DATE MAY BE DIFFERENT FROM THE ONE RECORDED. Effective date: 20051018 |