EP0348933A3 - Standard cell - Google Patents
Standard cell Download PDFInfo
- Publication number
- EP0348933A3 EP0348933A3 EP19890111757 EP89111757A EP0348933A3 EP 0348933 A3 EP0348933 A3 EP 0348933A3 EP 19890111757 EP19890111757 EP 19890111757 EP 89111757 A EP89111757 A EP 89111757A EP 0348933 A3 EP0348933 A3 EP 0348933A3
- Authority
- EP
- European Patent Office
- Prior art keywords
- standard cell
- cell
- standard
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D89/00—Aspects of integrated devices not covered by groups H10D84/00 - H10D88/00
- H10D89/10—Integrated device layouts
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C5/00—Details of stores covered by group G11C11/00
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C5/00—Details of stores covered by group G11C11/00
- G11C5/06—Arrangements for interconnecting storage elements electrically, e.g. by wiring
- G11C5/063—Voltage and signal distribution in integrated semi-conductor memory access lines, e.g. word-line, bit-line, cross-over resistance, propagation delay
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C8/00—Arrangements for selecting an address in a digital store
- G11C8/14—Word line organisation; Word line lay-out
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Design And Manufacture Of Integrated Circuits (AREA)
- Semiconductor Integrated Circuits (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP158005/88 | 1988-06-28 | ||
JP63158005A JP2739958B2 (en) | 1988-06-28 | 1988-06-28 | Standard cell |
Publications (3)
Publication Number | Publication Date |
---|---|
EP0348933A2 EP0348933A2 (en) | 1990-01-03 |
EP0348933A3 true EP0348933A3 (en) | 1990-11-28 |
EP0348933B1 EP0348933B1 (en) | 1994-05-11 |
Family
ID=15662174
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
EP89111757A Expired - Lifetime EP0348933B1 (en) | 1988-06-28 | 1989-06-28 | Standard cell |
Country Status (5)
Country | Link |
---|---|
US (1) | US5401988A (en) |
EP (1) | EP0348933B1 (en) |
JP (1) | JP2739958B2 (en) |
KR (1) | KR940001393B1 (en) |
DE (1) | DE68915211T2 (en) |
Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH06140505A (en) * | 1992-10-28 | 1994-05-20 | Mitsubishi Electric Corp | Semiconductor integrated circuit device |
US5675501A (en) * | 1994-03-15 | 1997-10-07 | Kabushiki Kaisha Toshiba | Method of designing semiconductor integrated circuit apparatus having no dead space |
DE69517693T2 (en) * | 1995-12-29 | 2001-03-01 | Stmicroelectronics S.R.L., Agrate Brianza | Standard cell library for integrated circuit design |
US5949261A (en) | 1996-12-17 | 1999-09-07 | Cypress Semiconductor Corp. | Method and circuit for reducing power and/or current consumption |
US6963510B1 (en) | 1998-07-10 | 2005-11-08 | Xilinx, Inc. | Programmable capacitor and method of operating same |
US6255675B1 (en) * | 1998-07-10 | 2001-07-03 | Xilinx, Inc. | Programmable capacitor for an integrated circuit |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0006958A1 (en) * | 1977-12-30 | 1980-01-23 | Fujitsu Limited | Complementary mis-semiconductor integrated circuits |
Family Cites Families (17)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB1579419A (en) * | 1977-06-15 | 1980-11-19 | Seiko Instr & Electronics | Static induction transistor logic semi-conductor devices and integrated injection logic semi-conductor devices |
US4198695A (en) * | 1978-07-19 | 1980-04-15 | Texas Instruments Incorporated | Static semiconductor memory cell using data lines for voltage supply |
US4295149A (en) * | 1978-12-29 | 1981-10-13 | International Business Machines Corporation | Master image chip organization technique or method |
US4423432A (en) * | 1980-01-28 | 1983-12-27 | Rca Corporation | Apparatus for decoding multiple input lines |
JPS5827343A (en) * | 1981-08-10 | 1983-02-18 | Matsushita Electronics Corp | semiconductor integrated circuit |
JPS58142544A (en) * | 1982-02-19 | 1983-08-24 | Hitachi Ltd | Semiconductor integrated circuit |
JPS58166742A (en) * | 1982-03-29 | 1983-10-01 | Nec Corp | master slice board |
US4516040A (en) * | 1982-06-14 | 1985-05-07 | Standard Microsystems Corporation | High-speed merged plane logic function array |
JPS607147A (en) * | 1983-06-24 | 1985-01-14 | Mitsubishi Electric Corp | semiconductor equipment |
JPS60198843A (en) * | 1984-03-23 | 1985-10-08 | Fujitsu Ltd | Master-slice integrated circuit |
JPS6124250A (en) * | 1984-07-13 | 1986-02-01 | Nippon Gakki Seizo Kk | Semiconductor integrated circuit device |
JPS61185964A (en) * | 1985-02-13 | 1986-08-19 | Toshiba Corp | Semiconductor memory |
JPS6320440U (en) * | 1986-07-25 | 1988-02-10 | ||
US4949149A (en) * | 1987-03-31 | 1990-08-14 | Unisys Corporation | Semicustom chip whose logic cells have narrow tops and wide bottoms |
JP2606845B2 (en) * | 1987-06-19 | 1997-05-07 | 富士通株式会社 | Semiconductor integrated circuit |
JPS6437034A (en) * | 1987-08-01 | 1989-02-07 | Ricoh Kk | Standard cell |
US4851893A (en) * | 1987-11-19 | 1989-07-25 | Exar Corporation | Programmable active/passive cell structure |
-
1988
- 1988-06-28 JP JP63158005A patent/JP2739958B2/en not_active Expired - Lifetime
-
1989
- 1989-06-28 EP EP89111757A patent/EP0348933B1/en not_active Expired - Lifetime
- 1989-06-28 DE DE68915211T patent/DE68915211T2/en not_active Expired - Fee Related
- 1989-06-28 KR KR1019890008920A patent/KR940001393B1/en not_active Expired - Fee Related
-
1992
- 1992-11-10 US US08/974,322 patent/US5401988A/en not_active Expired - Lifetime
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0006958A1 (en) * | 1977-12-30 | 1980-01-23 | Fujitsu Limited | Complementary mis-semiconductor integrated circuits |
Non-Patent Citations (1)
Title |
---|
NASECODE IV, Dublin, 19th - 21st June 1985, pages 396-404; L.W. MASSENGILL et al.: "Voltage span modeling for very large memory arrays" * |
Also Published As
Publication number | Publication date |
---|---|
DE68915211D1 (en) | 1994-06-16 |
KR900001007A (en) | 1990-01-31 |
KR940001393B1 (en) | 1994-02-21 |
JP2739958B2 (en) | 1998-04-15 |
EP0348933B1 (en) | 1994-05-11 |
DE68915211T2 (en) | 1994-09-29 |
US5401988A (en) | 1995-03-28 |
JPH029149A (en) | 1990-01-12 |
EP0348933A2 (en) | 1990-01-03 |
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Legal Events
Date | Code | Title | Description |
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PUAI | Public reference made under article 153(3) epc to a published international application that has entered the european phase |
Free format text: ORIGINAL CODE: 0009012 |
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17P | Request for examination filed |
Effective date: 19890628 |
|
AK | Designated contracting states |
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RAP1 | Party data changed (applicant data changed or rights of an application transferred) |
Owner name: TOSHIBA MICRO-ELECTRONICS CORPORATION Owner name: KABUSHIKI KAISHA TOSHIBA |
|
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