EP0234662A1 - Device for filtering a multiplexed video signal - Google Patents

Abstract

Device for eliminating parasitic signals inherent in a multiplexed video signal, comprising an arrangement of the RAM memories "1", "2" and "3" and the adders AD1, 2 and 3 and consisting in obtaining by digital processing of the signal the average value ? stored prior information contained in a certain slice of image points to subtract it from the information Y supplied by the image point being analyzed. The transfer function of said processing has the expression: <IMAGE> Application to new generation IR detectors.

Description

The invention relates to a device for eliminating parasitic signals inherent in a multiplexed video signal at the output of a detector consisting of a strip of elements arranged in the same line and performing the scanning of the scene, said signal being of first amplified then converted to digital for image processing and finally converted to analog.

This device finds an application for example when using new generation infrared detectors.

These detectors consist of IR sensors coupled to charge transfer devices or the like. Thus, at the output of these detectors, the function of transforming the incident flux into an electrical signal is realized, and on the other hand the function of integrating the currents and their multiplexing to form a serial video signal.

The old so-called first generation detectors only performed said flux transformation function. The elimination of the parasitic signals coming from these detectors was done simply by the addition of a filtering capacitor to each detector element at the level of the preamplifier. The signal multiplexing operation was then carried out using appropriate circuits.

In new generation detectors, we do not have access to the basic information of each detector. The stream transformation and multiplexing functions are no longer separated. As a result, the signal at the output of the detector no longer presents itself in the same way.

The useful signals resulting from the scanning of the scene in polar or rectangular coordinates now appear in series at the output of the detector and are modulated in a certain frequency range. These useful signals are superimposed by a parasitic low frequency continuous signal which it is a question of eliminating and which results from the response of the detector to the average temperature of the background or to the temperature of the lens mount, offsets between the different channels and LF noise from the integration and multiplexing assembly.

The device of the invention is intended to play a role comparable to the filtering capacitor placed between the detector and its preamplifier when a first generation detector system is used, this capacitive link not existing in infrared detector systems. so-called new generation.

• -n échantillonneurs-bloqueurs et leur système de pilotage pour effectuer le démultiplexage du signal vidéo série.
• -n filtres analogiques (soit n réseaux résistance-condensateur au minimum) pour effectuer le filtrage proprement dit.
• -n commutateurs analogiques et leur système de pilotage pour multiplexer ces n voies parallèles avant d'en effectuer la conversion analogique-numérique.

The realization of such a device intended to cut the low frequencies on each channel from a multiplexed signal coming from the serialization of n channels is to be rejected in analog form because it would require to implement:

• -n sample-and-hold units and their control system for demultiplexing the serial video signal.
• -n analog filters (at least n resistance-capacitor networks) to perform the actual filtering.
• -n analog switches and their control system to multiplex these n parallel channels before performing the analog-digital conversion.

The demultiplexing, necessary to process each channel independently, being easy in digital thanks to the use of memories, the device of the invention is remarkable in that it comprises at the output of the analog-digital converter a first shaping circuit of the signal followed by a first memory RAM addressed in coordinates of each picture element analyzed and operating in shift register, the input information corresponding to the picture element being analyzed being transmitted to a terminal input of said first memory also serving as an output terminal, said input information being simultaneously transmitted to a first adder and to a second adder, said first adder also receiving from said output terminal of the shift register , the information changed sign through an inverter of another image element shifted by n elements relative to the element being analyzed to effect the difference of s said input and output information and the quotient of this difference by the number of elements n of said slice, said quotient being transmitted to a third adder which receives from a second RAM memory the average value of the input information of the slice of elements associated with the image element preceding the element being analyzed to form the average value of the input information of the slice of elements associated with the element being analyzed, the average value of the input information of the section of elements associated with the first analyzed element having been calculated and stored in said second memory during an initialization phase, said average value coming from the third adder being, after passing through a second signal shaping circuit, firstly stored in said second RAM memory to be used for calculating the average value associated with the image elements of the next section, and on the other hand transmitted to a third RAM memory which introduces a certain delay fixing the position of each slice of n elements relative to the image element being analyzed, the output of said third memory being connected after inversion of signal sign to another input of said second adder which thus makes the difference between the value of the input information corresponding to the element being analyzed and the average value of the information of the slice of n elements which is assigned to it associated, from said third memory, this last difference corresponding to the processing of the filtering operation being transmitted through a third signal shaping circuit.

The following description with reference to the appended drawings, all given by way of example will make it clear how the invention can be implemented.

• Figure 1 shows the diagram of a new generation detector.
• FIG. 2 represents a frame obtained for a scan of the scene carried out in polar coordinates.
• FIG. 3 represents the block diagram of the filter according to the invention.
• FIG. 4 shows a section of elements in the form of a crown for a scan carried out in polar coordinates.

FIG. 1 represents the diagram of a new generation detector assembly comprising a strip B of detector elements e arranged in the same column. Each of them is coupled to a charge transfer device t or equivalent, the outputs of which are interconnected at S to transmit a serial video signal. The whole is contained in a "Dewar" vase D. The analog signal which appears on the output S is amplified (A) and converted into digital (CAN). The digital signal undergoes processing (T) then can undergo conversion to analog (DAC).

Suppose, for example, that the scene is scanned in polar coordinates. A complete analysis of the scene delimits the field according to the characteristics of an infrared self-director. The image obtained in the focal plane of the objective constitutes a frame represented in FIG. 2. The detectors e are arranged in a strip B of n elements. A prism rotating at the lens produces rotation of the image in the scene plane. Each detector element e therefore analyzes a circular crown centered in Co. The flux which it receives is integrated and read sequentially for a certain time according to the speed of rotation every 1/128 turn. The frame thus broken down into 128 successive positions of the detector array itself cut geographically into n elements is formed 128 times n image elements or pixels (contraction of the English words picture elements). One of these elements e is represented around the point M of polar coordinates Q and e. If the scanning speed is 200 t / s, the frame period is 5 ms. If in addition n = 32 elements, the time which elapses between the analysis of two consecutive pixels is of the order of a microsecond.

• avec n = 2, 4, 8, 16, 32 ou 64 positions successives de la barrette de détecteurs, K_o =O,t,ou2

dans laquelle z représente un opérateur retard.The filter of the invention is located at the output of the CAN. Its transfer function has the expression:

• with n = 2, 4, 8, 16, 32 or 64 successive positions of the detector array, K _o = O, t, ou2

in which z represents a delay operator.

Let y (t) be the luminance level of the pixel analyzed at an instant t.

The operator z corresponding to z "the value y (t + n7-), the transformation H applied to y (t) generates a function u (t) such that:

In this expression, y (t) is the raw information of the luminance level of a pixel analyzed at time t and which includes that of the parasitic signals listed above. y (t-koT), y [t- (k _o + 1) τ], ..., y [t- (ko + n-1) τ] represent the luminance levels of n pixels analyzed respectively at times t -k _oT , t - (k _o + 1) T, ..., t - (n + k _o -1) T and which also include the levels of the parasitic signals, T being the time interval between the passages of two consecutive pieces of information. The quotient by n of their sum represents the average value of the luminance level of the n pixels and the subtraction of this average value from the luminance value of the pixel analyzed at time t leads to the elimination of the parasitic signals. The number k _o fixes the position of the slice of the n pixels analyzed previously with respect to the pixel being analyzed at time t.

The block diagram of the filter according to the invention is shown in FIG. 3.

_L après remise en forme des signaux.The coordinates e and e linked to the scan in polar coordinates (e being the angular position of the bar and e the number of the detector), become θ _L and

_L after reshaping the signals.

Y (CAN output) represents a serial video message which, at the output of the analog-digital converter, consists of a series of 9-bit words which are the digitized signals of the luminance levels.

_L et utilisé comme ligne à retard. Cette mémoire est constituée de registres à décalage empilés horizontalement, chaque pile correspondant à un numéro de la barrette de détecteurs (

) et chaque case d'un registre correspondant verticalement à une position de e mais qui se déplace pour opérer le transfert de l'information introduite sur les entrées/sorties 1/0. Ce sont en effet les mêmes broches qui servent à entrer les données d'entrée et à sortir les données de sortie. Aux adresses

_L et θ_L qui sont les coordonnées des pixels analysés, on vient ranger les valeurs y des niveaux de luminance. Par le mécanisme de transfert des registres à décalage, une entrée y(t) à l'instant t s'effectue immédiatement après une sortie y(t-nr). Ainsi pour chaque pixel analysé à un instant t, une tranche d'informations successives correspondant au même numéro du détecteur (ϑ _L) est conservée en mémoire pendant l'intervalle de temps nr.After passing through the block L, which operates a reshaping of the signals to make them last the maximum of time and through the block L ', of protection against short-circuits, the successive information Y are transmitted to the memory block RAM "1" addressed in θ _L and

_L and used as a delay line. This memory is made up of shift registers stacked horizontally, each stack corresponding to a number of the detector array (

) and each box of a register corresponding vertically to a position of e but which moves to operate the transfer of the information entered on the inputs / outputs 1/0. These are the same pins that are used to enter the input data and to output the output data. To the addresses

_L and θ _L which are the coordinates of the analyzed pixels, we come to arrange the values y of the luminance levels. By the transfer mechanism of the shift registers, an entry y (t) at time t takes place immediately after an exit y (t-nr). Thus for each pixel analyzed at an instant t, a section of successive information corresponding to the same number of the detector (ϑ _L ) is kept in memory during the time interval nr.

In the time frame of the order of 1 us separating the analysis of two consecutive pixels, it is not possible to fetch n values in memory, to average them and to subtract this average from the value analysis in progress. An average value calculation is done once and for all in an initialization step on the pixel segment delimited by the values of n and k _o .

We choose for example n = 32 and k _o = 0. For a constant value of ϑ (detector number) Figure 4 shows the crown edge thus delimited.

Between positions 0 and 31 of the bar, the mean value of the luminance level of a detector has the expression:

This average value calculated in the initialization phase is stored in RAM "2".

For the pixel corresponding to the next position of the bar (θ = 32), the average value of the luminance level over the previous 32 positions is written:

By making the difference between these two average values, we obtain:

We see from this relation that the calculation of the mean value y is relatively simple since there is only one value left y ₃₁ to fetch in memory instead of 32. The average value 7 ₃₂ is then stored in RAM "2" in order to be able to calculate in the same way y 33 by means of the relation deduced by recurrence from the previous one:

By the mechanism of the shift registers of RAM "1", y _o leaves this memory to let in y ₃₂ ; similarly, the analysis of the next pixel causes y to exit, to let y ₃₃ enter and so on.

(y₃₂ -y_o) qui n'est autre que la valeur moyenne y. Après remise en forme dans le bloc L₂, Y ₃₂ est mise en mémoire d'une part dans RAM "2" pour servir au calcul de y ₃₃et d'autre part dans RAM "3:" qui fonctionne en ligne à retard (avec un retard nul pour k_o = 0) et d'où elle ressort inversée pour être transmise aux entrées B d'un autre additionneur (bloc AD2) qui reçoit y ₃₂ sur ses entrées A. Ainsi les sorties Σ de cet additionneur fournissent y₃₂ y ₃₂ c'est-à-dire le traitement de l'opération de filtrage des signaux parasites objet de l'invention dont la remise en forme est effectuée à travers le bloc L₃.Returning to the block diagram of the filter, we see that y _o is routed through the inverter I to the input B of the adder (AD1) whose input A receives y ₃₂ . We therefore have on the output of this adder the value y ₃₂ -y _o . The division of this value by 32 which consists simply in eliminating the five least significant bits is introduced on the inputs A of the adder (AD2) which receives on its inputs B the average value y previously stored in RAM "2" and therefore provides on its outputs Σ, ₃₁ +

(y ₃₂ -y _o ) which is none other than the average value y . After getting back into shape in block L ₂ , Y ₃₂ is stored on the one hand in RAM "2" to be used for the calculation of y ₃₃ and on the other hand in RAM "3:" which operates on delay line (with zero delay for k _o = 0) and from which it emerges inverted to be transmitted to the inputs B of another adder (block AD2 ) Who receives y ₃₂ on its inputs A. Thus the outputs Σ of this adder provide y ₃₂ y _32, that is to say the processing of the filtering operation of the spurious signals which is the subject of the invention, the reshaping of which is carried out through the block L ₃ .

In the example above, we treated the simplest case for which k _a = 0, that is to say that we associated the information y ₃₂ arriving at time t, the average value y ₃₂ calculated on the section of 32 pixels including the pixel being analyzed at this time.

If we set k _o = 1 or 2, the slice of 32 pixels on which the average value is calculated is shifted by 1 or 2 pixels compared to the information y ₃₂ . The RAM memory "3" then fully fulfills its role of delay line at the same time as it performs the inversion of the average value.

The low-cut filter thus produced, of slope -6 dB / octave has a low cut-off frequency at -3 dB equal to fcb given in the following table, according to n and k _o (fcb in Hz), in the context of l considered example

The scene analysis can also be performed in rectangular coordinates. The treatment of the problem is identical.

For more general information, denote by k and i the coordinates of the analyzed pixel (k = and i = 8 in the box of analysis in polar coordinates considered above). Let Y be the luminance level at the output of the analog-digital converter and t _{k, i} the instant at which the point of coordinates k, i is analyzed. These coordinates become k _L and i _L after regeneration of the signals are the addresses of the RAM memory "1" (diagram of FIG. 3) which plays the role of delay line. The capacity of this memory is 2048 words of 16 bits, capacity used totally if n = 64 or partially for n = 2, 4, 8, 16 or 32. During the first part of the cycle corresponding to the pixel with coordinates k, i, the luminance level of point k, in is read and during the second part that of point k, i is written in RAM "1".

The adders of block 5 and the inverters of block AD1 make it possible to calculate Y _k ,; - Y _{k, in} = Δ _{k, i-}

qui est extraite pour lui additionner Δ_k,i dans la deuxième partie du cycle pixel k,i. Ainsi à la fin du cycle pixel k,i, l'information de sortie du bloc 7 correspond à

The RAM "2" looped back on itself thanks to the adders of the block AD3 and to the fitness circuits of the block L ₂ contains at the address k, i (modulo n) the information

which is extracted to add Δ _{k, i to it} in the second part of the pixel k, i cycle. Thus at the end of the pixel k, i cycle, the output information of block 7 corresponds to

This information divided by n is introduced into RAM "3" which plays the role of delay line for the generation of k _o . In all cases, this information is equal to the average value of n consecutive luminance levels on the same detector k.

The operation n _k , _i = Y _{k, i} - -7 _k is performed using the adders of block AD2. The result of the calculation - (differential luminance of point k, i) is reshaped thanks to the circuits of block L3.

The initialization of the device can be done automatically at power-up or at the start of each acquisition cycle, for example.

• a -a l'avantage d'effectuer un filtrage BF du signal multiplexé et donc de participer à l'élimination du bruit BF du dispositif à transfert de charge (CCD).
• b -doit pouvoir permettre de s'affranchir des corrections de non-uniformités des détecteurs et du CCD qui se traduisent par des offsets (qu'il s'agisse des offsets systématiques dûs à la réponse des détecteurs excités par un flux photonique à travers des angles solides différents ou d'offsets "électriques" des différents canaux du CCD).

In addition to the functions to be performed for which it is intended, this filter:

• has the advantage of performing LF filtering of the multiplexed signal and therefore of participating in the elimination of LF noise from the charge transfer device (CCD).
• b - must be able to overcome the non-uniformity corrections of the detectors and the CCD which result in offsets (whether these are systematic offsets due to the response of the detectors excited by a photonic flux through different solid angles or "electrical" offsets of the different CCD channels).

Thus, only the corrections of non-uniformities of the responsiveness of the IR sensor coupled to CCDs should be made.

c - causes an increase in noise which can be estimated at (1 + 1 / n) ¹¹² (ie + 0.13 dB for n = 32) which is perfectly negligible.

Claims (1)

1. Device for eliminating parasitic signals inherent in a multiplexed video signal at the output of a detector consisting of a bar of elements arranged in the same column and performing the scene scanning, said signal being first amplified and then converted to digital for image processing and finally converted to analog, characterized in that said device comprises at the output of the analog-digital converter a first signal shaping circuit followed by a first RAM memory addressed in coordinates of each picture element analyzed and operating in shift register, the input information corresponding to the picture element being analyzed being transmitted to an input terminal of said first memory also serving as an output terminal , said input information being simultaneously transmitted to a first adder and to a second adder, said first adder also receiving, coming from said so terminal rtie of the shift register, the information changed sign through an inverter of another picture element shifted by n elements with respect to the element being analyzed to effect the difference between said input information and output and the quotient of this difference by the number of elements n of said slice, said quotient being transmitted to a third adder which receives from a second RAM memory the average value of the input information of the slice of elements associated with the analyzed image element preceding the element being analyzed to form the average value of the input information of the slice of elements associated with the element being analyzed, the average value of the input information of the section of elements associated with the first analyzed element having been calculated and stored in said second memory, during an initialization phase, said average value coming from the third adder being, after passing through a second setting circuit in the form of a signal, on the one hand stored in said second RAM memory to be used for calculating the average value associated with the image elements of the next section and on the other hand, transmitted to a third RAM memory which introduces a certain delay fixing the position of each slice of n elements with respect to the image element being analyzed, the output of said third memory being connected after signal inversion of the signal to another input of said second adder which thus makes the difference between the value of the input information corresponding to the element being analyzed and the average value of the information of the slice of n elements associated therewith, from said third memory, this latter difference corresponding to the processing of the filtering operation being transmitted through a third signal shaping circuit.

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