Description
Analog to Duty Cycle Converter
• Technical Field
This invention relates generally to an apparatus for converting an analog electrical signal into a duty cycle modulated electrical signal, and, more particularly, to an apparatus for producing a duty cycle modulated electrical signal in response to the position of a movable mechanical element.
Background Art
In the past, one major obstacle to the use of digital control electronics, both on products and in manufacturing processes, has been the lack of suitable analog to digital signal'transducers. In a typical control system, it is necessary to sense a variety of mechanical operations or actions and produce representative digital signals, both for error protected signal transfer purposes and for subsequent use by a microprocessor or other digital control system. The sensing and conversion process must be accurate and rapid, and tne transducer must be both rugged and reasonably priced relative to the remainder of the control circuitry. Responsive to this need, numerous analog to digital conversion devices have been developed. These devices take a variety of forms, some being suited only to the particular application for which they were designed. Other "generic" transducers are more flexible in their application, but tend to be complex, expensive, subject to damage in an industrial environment, and undesirably affected by electrical noise signals.
The instant invention is particularly well suited for sensing mechanical position and producing a responsive duty cycle modulated digital signal having a predetermined frequency. The resulting digital signal
5 can be transferred over various circuit paths to a destination, then decoded either by measuring the produced duty cycle, or by averaging or filtering the modulated signal. The modulated signal can also be . received, for example, by a microprocessor, and
10. utilized to accomplish various required calculations for a particular control system.
An additional problem with available transducer devices is that the actual sensing element must be individually designed for each particular
15 application to which it is applied, or that a universal sensing element is used inefficiently owing to the wide variety of mechanical movement that must be sensed. The instant application utilizer a single resistive sensing element having a predetermined range of
20 travel. The associated circuitry is equipped to select, a predetermined portion of the resistive element range, and to fully utilize the portion selected in converting the mechanical position to a duty cycle modulated output signal. Therefore, a single universal sensing 5 element can be utilized to sense a wide range of mechanical motion, without sacrificing desired resolution.
The present invention is directed to over¬ coming one or more of the problems as set forth above. 0
Disclosure of the Invention
In one aspect of the present invention an apparatus for producing a duty cycle modulated electrical signal in response to the position of a 5 movable mechanical element includes power supply means
for producing a predetermined supply voltage. Transducer means produce an analog signal having a magnitude responsive to the position of the movable mechanical element. Reference means produce a
5 reference signal having a magnitude that varies between first and second predetermined values at a predetermined frequency, at least one of the first and second predetermined values being controllably established by range select means. Conversion means
10. receive the analog signal and the reference signal, compare the analog signal with the reference signal, and produce a duty cycle modulated output signal having a frequency responsive to the reference signal frequency and a duty cycle responsive to the respective
15 magnitudes of the analog signal and the reference signal during the period of each reference signal cycle.
The present invention provides a low cost, rugged apparatus for converting mechanical' position • into a duty cycle modulated digital signal. In
20 addition, a single sensing element can be adapted to sense a wide range of mechanical movement without sacrificing resolution of the resulting digital signal.
3rief Description of the Drawings 25 For a better understanding of the present invention, reference may be made to the accompanying drawings, in which:
Fig. 1 is a block diagram of one embodiment of the present invention; 30 Figs. 2 and 3 collectively comprise a schematic diagram of the one embodiment of the present invention depicted in Fig. 1; and
Fig. 4 is a signal timing diagram used to explain the schematic diagram depicted in Figs. 2 and 3 35
Best Mode For Carrying Out the Invention
Referring to Fig._ 1, an apparatus embodying certain of the principles of the present invention is generally indicated by the reference numeral 10. It should be understood that the following detailed description relates to the best presently-known embodiment of the apparatus 10; However, the apparatus 10 can assume numerous other embodiments, as will become apparent to those skilled in the art, without - departing from the appended claims.
The apparatus 10 includes a power supply means 12 for producing a predetermined supply voltage. The power supply means 12 includes a preregulator 14 having an input terminal connected to plus battery voltage, for example, to a battery on a vehicle or to a positive power supply tap on a machine tool. The preregulator 14 also includes an output terminal that supplies a predetermined preregulated output voltage, for example, plus 10 volts DC. The power supply means 12 also includes a voltage regulator 16 having an input terminal connected to the preregulator output terminal, and having an output terminal that provides a fully regulated voltage output, for example, plus 5 volts DC. The power supply means 12 further includes a negative supply voltage terminal, shown schematically by a conventional circuit ground symbol.
A transducer means 18 produces an analog signal having a magnitude responsive to the position of a movable mechanical element 11, shown in block form. A reference means 20 produces a reference signal having a magnitude that varies linearly between first and second predetermined values at a predetermined frequency. In the preferred embodiment, the reference means 20 includes a constant current source 22, a constant current sink 24, a waveform capacitor 26, a
threshold circuit 28, a latch circuit 30, and a trigger circuit 32. The constant current devices 22,24 are connected, together with the waveform capacitor 26, to the threshold circuit 28, which is also connected to the latch circuit 30. The latch circuit 30 is connected to the trigger circuit 32, which is connected to the constant current sink 24. A range select means 34 is connected to the reference means 20, specifically to the threshold circuit 28, and controllably ■ establishes at least one of the reference signal first and second predetermined values, limiting the effective operating range of the transducer means 18.
The apparatus 10 also includes a conversion means 36 for receiving the analog and reference signals, comparing the analog signal with the reference signal, and producing a duty cycle modulated output signal having a frequency responsive to the reference signal predetermined frequency and a duty factor responsive to the respective magnitudes of the analog and reference signals during the period of each reference signal cycle. The conversion means 36 includes a comparator 38 and a driver circuit 40. Tne comparator 38 has input terminals connected to the transducer means 18 and to the waveform capacitor 26 of the reference means 20. An output terminal of the comparator 38 is connected to the driver circuit 40.
Figs. 2 and 3 are a schematic representation of the elements depicted in block form in Fig. 1. The power supply means 12 is of conventional design, and includes both preregulated and regulated positive supply voltage terminals and a negative supply voltage terminal. In the preferred embodiment, the power supply means 12 produces a preregulated plus 10 volt DC supply voltage, and a regulated plus 5 volt DC supply voltage.
The transducer means 18 includes a potentiometer 42 having a resistive element 43 connected across the positive and negative regulated supply voltage terminals, and a mechanical wiper element 44 adapted to slidably engage the resistive element 43. The position of the wiper element 44 along the resistive element 43 is responsive to the position of the movable mechanical element 11 to which the wiper is mechanically linked. The mechanical element 11 and interconnecting linkage is not material to the instant application and is shown only in block form in the drawings. A capacitor is connected to the wiper element 44 and provides electrical noise suppression. A potentiometer of the type described is employed to convert mechanical position into an analog electrical signal in the preferred embodiment of the instant invention, but it will be apparent to those skilled in the art that other suitable transducers can be substituted for the potentiometer according to the specific requirements of a particular application, for example, piezoelectric. Hall effect, and optical sensors can be employed as desired. The specific transducer selected should produce an analog voltage signal responsive to the mechanical element being monitored.
The reference means 20 is not complex but does involve a number of basic electrical elements. The constant current source 22 includes a transistor 46 connected to a current source terminal through a current limiting resistor 48. In response to a conventional diode type biasing circuit arrangement, the transistor 46 produces a constant current at a collector terminal, the magnitude of the constant current being determined by the biasing circuit and the value of the current limiting resistor 48.
The constant current sink 24 is of similar design to the constant current source 22 just discussed, and includes a transistor 50 connected to a current sink terminal through a current limiting resistor 52. The constant current sink 24 differs from the constant current source 22 in that the constant current sink 24 includes a trigger input terminal for controlling the "on" and "off" status of the transistor 50. In response to being triggered "on", the 0 transistor 50 sinks a constant current at a collector terminal, the magnitude of the constant current being' determined by another diode biasing arrangement and by the value of the current limiting resistor 52. Owing to the difference in value of the respective current 5 limiting resistors 48,52, the magnitude of the constant current passed by the constant current sink 24 is double that produced by the constant current source 22.
The collector terminals of the constant current devices 22,24 are connected in common to the o waveform capacitor 26, and to respective first and second input terminals of the threshold circuit 28. The threshold circuit 28 includes first and second threshold detectors 54,56 each having a first input terminal connected to the waveform capacitor 26. The 5 first threshold detector 54 also has a second input terminal connected to the regulated plus 5 volt DC supply voltage terminal. The second threshold detector 56 includes a second "range" input terminal connected to a "range" output terminal of the range select means o 34. The range select means 34 is a voltage divider having first and second resistors 58,60 connected between the regulated plus 5 volt DC supply voltage terminal and the negative supply voltage terminal. An output terminal of the first threshold 5 detector 54 is connected to a "reset" terminal of the latch circuit 30. An output terminal of the second
threshold detector 56 is connected to a "set" terminal .of the latch circuit 30. The "set" terminal of the latch circuit 30 is biased by a voltage divider network at a predetermined voltage level between the regulated plus 5 volt DC supply voltage and circuit ground. An output terminal of the latch circuit 30 is connected through a voltage divider network to the regulated plus 5 volt DC supply voltage terminal, and to an input terminal of the trigger circuit 32. • The trigger circuit 32 includes a transistor
62 which is biased "on" in response to an output signal from the latch circuit 30 having a first magnitude, and "off" in response to the output signal from the latch circuit 30 having a second magnitude. An output terminal of the trigger circuit- 32 is connected to the trigger input terminal of the constant current sink 24, and controls the "on/off" state of the transistor 50 of the constant current s-ink 24.
The conversion means 36 includes the comparator- 38 having a first input terminal connected to the waveform capacitor 26 and a second input terminal connected to the wiper element 44 of the potentiometer 42. An output terminal of the comparator 38 is connected to the driver circuit 40. The driver circuit 40 is an open collector transistor circuit, and includes a digital signal output terminal 64.
The circuit described above is the preferred embodiment of the instant invention. It will be appreciated by those skilled in the art that the ratings and values of the various electrical elements discussed are for exemplary purposes only. Alterations of the circuit and embodiment discussed, and the use of electrical elements of different constructions or ratings, will be apparent to those skilled in the art. Such alterations or substitutions can be implemented without departing from the appended claims.
Industrial Applicability
Operation of the apparatus 10 is next described, with reference to the schematic diagram of Figs. 2 and 3 and to the timing diagram of Fig. 4. Testpoint designations are used on the schematic diagram to refer to representative waveforms shown on the timing diagram.
The reference means 20 preferably produces a substantially linear voltage waveform at a reference signal output terminal TP4. The reference signal output terminal TP4 is the common junction of the waveform capacitor 26, the constant current device output terminals, and the common input terminals to the threshold circuit 28. When power is first applied to the apparatus
10, the waveform capacitor 26 has zero volts DC across it, and the output terminal TP2 of the second threshold detector 56 is at a logic "low" level. Responsively, the output terminal TP3 of the latch circuit 30 is at a logic "high" level, preventing the trigger circuit 32 from turning "on" the constant current sink 24. The waveform capacitor 26 begins to charge toward the plus 10 volt DC supply voltage at a rate determined by the magnitude of the current supplied by the constant current source 22.
When the voltage across the waveform capacitor 26 exceeds the reference voltage present on the second input terminal of the first threshold detector 54, shown as time Tl in Fig. 4, the output terminal TP1 of the first threshold detector 54 delivers a logic "low" level signal and "resets" the latch 30. Note that the reference voltage present on the second input terminal of the first threshold detector 54 is fixed at the plus 5 volt DC supply voltage level. Responsively, the output terminal TP3 of the latch 30 delivers a logic
"low" level signal, causing the trigger circuit 32 to turn the constant current sink 24 "on". The voltage across tne waveform capacitor 26 immediately begins to discharge through the constant current sink 24 at the rate established by the current limiting resistor 52. Owing to the fact that the constant current sink 24 passes current at a rate twice that at which current is supplied by the constant current source 22, the waveform capacitor 26 discharges at the same rate at ■ whicn it was previously charging. The first threshold detector 54 responsively again produces the logic "high" level signal, and the circuit remains stable until the voltage across the waveform capacitor 26 is discharged below the threshold voltage established by the range select means 34 at the second input terminal of the second threshold detector 56, shown as time T2 in Fig. 4.
In the embodiment of Figs. 2 and.3, trie range select threshold voltage is established, for example, at 25% of the regulated plus 5 volt DC supply voltage, as can oe observed from tne waveform at the reference signal output terminal TP4 'of Fig. 4. Therefore, once the voltage across the waveform capacitor 26 has discharged below the threshold voltage established by the range select means 34, the output terminal TP2 of the second threshold detector 56 delivers the logic "low" level signal and "sets" the latch circuit 30. The output terminal TP3 of the latch circuit 30 responsively delivers the logic "high" level signal, causing the trigger circuit 32 to turn "off" the constant current sink 24, and the waveform capacitor 26 again begins to charge through the constant current source 22, restarting the above described cycle. Therefore, during the time that power is applied to the apparatus 10, the reference means 20 continuously produces a substantially triangular
waveform at the reference signal output terminal TP4. The produced waveform varies substantially linearly between the thresholds established by the range select means 34 and the regulated plus 5 volt DC supply voltage. The frequency of the produced reference signal is determined by the charge/discharge rate of the waveform capacitor 26 through the constant current devices 22,24. This cyclic reference signal is supplied to the first input terminal of the comparator • 38.
The wiper element 44 of the potentiometer 42 is connected to the second input terminal of the comparator 38. The voltage delivered from the potentiometer wiper element 44 has a value established between the regulated plus 5 volt DC supply voltage and zero volts DC or circuit ground. The particular voltage value delivered from the wiper element 44 is determined by the instantaneous position of the wiper element 44 along the potentiometer resistive element 43. Assume that the wiper element 44 of the t potentiometer 42 is set midway along the resistive element 43. Responsively, a 2.5 volt DC voltage is delivered to the second input terminal of the comparator 38, as shown in Fig. 4. The comparator output terminal delivers a "low" logic value signal to the driver circuit 40 during the time that the waveform reference signal has a magnitude less than 2.5 volts DC, and delivers a "high" logic value signal during the time that the reference signal has a magnitude greater than 2.5 volts DC. In turn, the driver circuit 40 receives the logic signals from the comparator 38, and delivers the duty cycle modulated output signal at the digital signal output terminal 64, shown in solid line at TP5 on Fig. 4. The driver circuit 40 is an open collector circuit for purposes of increased flexibility
of design, and is typically connected through a suitable pull-up resistor to a source of positive supply voltage. For exemplary purposes, in Fig. 4 it is assumed that the output terminal 64 is connected through a pull-up resistor to the regulated plus 5 volt DC supply voltage.
Moving the wiper element 44 of the potentiometer 42 to a position along the resistive element 43 near the positive supply voltage connection, - causes a relatively higher magnitude DC voltage to be delivered to the second input terminal of the comparator 38, for example, 3.75 volts DC. Responsively, the duration of the logic "low" signal at the output terminal of the comparator 38 becomes relatively longer and the duration of the logic "high" signal becomes shorter. Correspondingly, the digital output signals de-livered by the driver circuit 40 to • the digital signal output terminal 64 are varied inversely in the manner shown by the dashed line at TP5 of Fig. 4. Therefore, the position of the wiper element 44 along the resistive element 43 of the potentiometer 42 determines the duty cycle of the signal ultimately delivered at the digital signal output terminal 64 of the apparatus 10. The reference signal fixes the frequency of this duty cycle modulated digital output signal at a predetermined value. Therefore, the duty cycle of the output signal depends solely on the position of the wiper element 44 of the potentiometer 42. It is observed that, in the above-discussed embodiment, only 75% of the potentiometer range is utilized for control purposes. The portion utilized is determined by the threshold voltage established by the range select means 34. In other words, in the embodiment described, a wiper element voltage less than
1.25 volts DC has no effect on the duty cycle of the modulated output signal. However, the entire range of the waveform reference signal is utilized over the active portion of the potentiometer range. Therefore,
5 high resolution of the apparatus 10 is maintained throughout the selected active potentiometer range.
Although, in the preferred embodiment, one of the threshold voltages is fixed by the plus 5 volt DC supply voltage, and the other of the threshold voltages
10. is variable by the range select means 34, it will be apparent to those skilled in the art that a second range select means can be incorporated into the apparatus 10. Such dual range select means can be utilized to select an active potentiometer range
15 anywhere within the full operating range of the potentiometer 42, allowing the apparatus 10 to be fully customized for any particular application.
Owing to the ratiometric nature of the apparatus 10, with the various components that
20 collectively produce the reference signal, the range select signal, the first threshold detector reference signal, and the analog signal delivered from the potentiometer wiper element 44, each being connected to the regulated plus 5 volt DC supply voltage, variations
25 i the duty cycle modulated signal output caused by changes in ambient temperature are substantially eliminated.
Other aspects, objects, advantages, and uses of this invention can be obtained from a study of the
30 drawings, the disclosure, and the appended claims.
35