EP0216265B1 - Voltage reference generating circuit with a given temperature drift - Google Patents
Voltage reference generating circuit with a given temperature drift Download PDFInfo
- Publication number
- EP0216265B1 EP0216265B1 EP86112573A EP86112573A EP0216265B1 EP 0216265 B1 EP0216265 B1 EP 0216265B1 EP 86112573 A EP86112573 A EP 86112573A EP 86112573 A EP86112573 A EP 86112573A EP 0216265 B1 EP0216265 B1 EP 0216265B1
- Authority
- EP
- European Patent Office
- Prior art keywords
- circuit
- transistor
- voltage
- generating
- temperature coefficient
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Images
Classifications
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F3/00—Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
- G05F3/02—Regulating voltage or current
- G05F3/08—Regulating voltage or current wherein the variable is DC
- G05F3/10—Regulating voltage or current wherein the variable is DC using uncontrolled devices with non-linear characteristics
- G05F3/16—Regulating voltage or current wherein the variable is DC using uncontrolled devices with non-linear characteristics being semiconductor devices
- G05F3/20—Regulating voltage or current wherein the variable is DC using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
- G05F3/30—Regulators using the difference between the base-emitter voltages of two bipolar transistors operating at different current densities
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S323/00—Electricity: power supply or regulation systems
- Y10S323/907—Temperature compensation of semiconductor
Definitions
- the invention relates to a circuit arrangement according to the preamble of patent claim 1.
- Reference voltages are required in almost all circuits with integrated circuits. They should be constant under all operating conditions and have no or a certain temperature drift. In particular in integrated circuits themselves, bandgap circuits are preferred for generating the reference voltages. Bandgap circuits are described, for example, in the book "Semiconductor Circuit Technology" by U.Tietze and Ch. Schenk, 5th revised edition, Springer-Verlag, Berlin, Heidelberg, New York 1980, pages 387 ff.
- such bandgap circuits can be used to generate reference voltages which are independent of the temperature coefficient of the components used in them, ie such a circuit provides a temperature-independent reference voltage which corresponds to the bandgap of the semiconductor material.
- this temperature-independent reference voltage is 1.205 V.
- such a circuit uses the base-emitter voltage of a transistor, the negative temperature coefficient of which by adding a voltage with a positive temperature coefficient is compensated. This voltage is formed from the difference between the base-emitter voltages of two transistors operated with different currents.
- Known bandgap circuit arrangements require an extensive network in order to generate a reference voltage that is different from the bandgap voltage, in particular when specifying a specific temperature drift.
- a generic circuit is known from JP-A-60 101 623, which has the disadvantage that the current supplied by the current source through the network and the circuit connected in series for generating a positive temperature drift depends on the load current and is therefore poorly defined . As a result, the network is subject to conditions restricting the absolute value of the reference voltage and the possible temperature drift.
- the invention has for its object a simple and with To specify simple means of modifiable circuit arrangement for generating a reference voltage with predeterminable temperature drift, which has a low current consumption and a well-defined current and which is largely freely dimensionable with regard to the absolute value of the reference voltage and its temperature drift.
- a network is connected in series with the circuit for generating an electrical variable with a positive temperature coefficient and is integrated via a controller into the negative feedback of the operating point setting of this circuit.
- the network expanding the control loop is subject to hardly any restrictive conditions and enables a variety of parameters with regard to the absorber value of the reference voltage and its temperature drift, since the operating point is already set by the circuit for generating an electrical variable with a positive temperature coefficient with the help of the controller.
- the circuit arrangement according to the invention for generating a reference voltage with a predeterminable temperature drift has a feed circuit which contains a current source SQ supplied by a terminal with the voltage U E with respect to a reference potential.
- the circuit arrangement according to the invention is based on the bandgap principle.
- the first branch contains a transistor T1 connected as a diode with a collector resistor R1 and the second branch the output circuit of a second transistor T2 with collector resistor R2 and emitter resistor R3.
- the base of transistor T2 is connected to the base and the collector of transistor T1.
- Another transistor T3 is connected with its output circuit parallel to the series circuit described and parallel to the output terminals with the reference voltage U REF of the circuit arrangement according to the invention and with its base on the collector of transistor T2.
- the circuit arrangement according to FIG. 1 corresponds to the bandgap circuit specified in the cited publication by U. Tietze and Ch. Schenk.
- the arrangement formed from the elements T1, T2 and R1 to R3 represents a circuit for generating an electrical variable with a positive temperature coefficient. This electrical variable is determined by the product of a resistance and a flowing electrical current, from which the dimension "voltage" results.
- the reference voltage U REF or the bandgap voltage U BG becomes the sum of the voltage drop across the resistor R2 with positive temperature coefficients and the base-emitter voltage of the transistor T3 with a negative temperature coefficient educated.
- the transistor T3 acts as a control transistor, which is voltage-coupled via the resistor R2 and keeps the potential at the collector of the transistor T2 constant.
- the network NW which according to the invention contains passive and / or active elements, is now in the circuit arrangement 1 included in the negative feedback of the control transistor T3.
- the network NW is in series with the circuit for generating an electrical quantity with a positive temperature coefficient, the current flowing through the network NW is divided equally between the two parallel branches of this circuit as if the network NW were short-circuited represent.
- the resulting temperature coefficient of the bandgap voltage U BG can essentially be influenced by the ratio of the current densities through the transistors T1 and T2 or their emitter area ratio as well as the resistance ratio R2 / R1 and the resistance ratio R2 / R3.
- the reference voltage U REF to be generated according to the invention results from the addition of the bandgap voltage U BG and the voltage drop across the network NW.
- Possible embodiments for this network NW are shown in FIG. 2.
- 2a shows a purely ohmic resistor R4, FIG. 2b a diode D and FIG. 2c a transistor T4, the output circuit of which is parallel to an ohmic voltage divider formed from the resistors R5 and R6 and the base of which is driven by the dividing point.
- the band gap voltage composed of the additive components of the base-emitter voltage of the transistor T3 and the voltage drop across the resistor R2 with a positive temperature coefficient is therefore added.
- 2a a voltage with a positive temperature coefficient and in the cases of FIGS. 2b and 2c each a diode forward voltage with a negative temperature coefficient. In the case of FIG. 2b, this voltage is added in full with a negative temperature coefficient; in the case of FIG. 2c, the base-emitter voltage of the transistor T4 is weighted by the voltage divider from the resistors R5 and R6.
- the reference voltage at the output terminals of the circuit thus contains two components: one proportional to the base-emitter voltage with a negative temperature coefficient and one proportional to the temperature voltage U T , which results from the difference between the base-emitter voltages of the transistors T1 and T2, and one has positive temperature coefficients. Since these two components change in opposite directions with temperature, temperature compensation is possible.
- FIGS. 1 and 2 show an exemplary embodiment of a specific circuit for generating a reference voltage U REF at its output terminals , the temperature coefficient of which can be specified by the circuit dimensioning.
- the same elements as in FIGS. 1 and 2 are provided with the same reference numerals.
- the network NW contains the series circuit consisting of an ohmic resistor R4 and an already described network according to FIG. 2c.
- the transistor T2 according to FIG. 1 is replaced in FIG. 3 by a transistor T2 'with two or more emitters.
- the current source SQ consists of a series transistor T5, the collector of which is connected to the supply terminal which has the voltage U E with respect to the reference potential and the emitter of which is connected to the output terminal which has the reference voltage U REF with respect to the reference potential.
- the transistor T5 is driven by means of the resistor R7, which is connected between its collector and its base.
- the output circuit of transistor T3 is connected to the output terminals for the reference voltage U REF via the base-emitter path of transistor T5.
- the output voltage ie the reference voltage U REF
- U BG bandgap voltage
- U2 dropping across the resistor R4
- the voltage across the collector-emitter path of the transistor T4 and the voltage divider from the resistors R5 and R6 falling voltage U3 together.
- n means the ratio of the emitter areas of the transistors T2 or T2 'and T1 and U T is the temperature voltage which results from the product of the Boltzmann constant and the absolute temperature divided by the elementary charge.
- the base-emitter voltages given relate to the associated transistor.
- the following expression results as reference voltage U REF :
- the proportionality factors for the base-emitter voltage U BE and the temperature voltage U T which are in this empirical formula, enable both freely definable temperature drifts and an absolute value of the reference voltage U REF through targeted manipulation.
- the absolute value of the reference voltage can be set independently of the temperature drift by selecting the resistance values. Since there are only resistance relationships in the empirical formula, the circuit arrangement according to the invention is largely independent of process-related scattering of both the absolute resistance values and their temperature drifts, provided the same resistance material is assumed.
- FIGS. 1 to 3 are shown with NPN transistors; however, the invention is not limited to transistors of this type, but a circuit arrangement according to the invention can also be achieved with pnp transistors.
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Nonlinear Science (AREA)
- Electromagnetism (AREA)
- General Physics & Mathematics (AREA)
- Radar, Positioning & Navigation (AREA)
- Automation & Control Theory (AREA)
- Control Of Electrical Variables (AREA)
- Continuous-Control Power Sources That Use Transistors (AREA)
Abstract
Description
Die Erfindung betrifft eine Schaltungsanordnung nach dem Oberbegriff des Patentanspruchs 1.The invention relates to a circuit arrangement according to the preamble of patent claim 1.
Referenzspannungen sind in nahezu allen Schaltungen mit integrierten Schaltkreisen erforderlich. Sie sollen unter allen Betriebsbedingungen konstant sein und keine oder aber eine bestimmte Temperaturdrift besitzen. Insbesondere in integrierten Schaltkreisen selbst werden zur Erzeugung der Referenzspannungen Bandgap-Schaltungen bevorzugt. Bandgap-Schaltungen sind beispielsweise in dem Buch "Halbleiter-Schaltungstechnik" von U.Tietze und Ch. Schenk, 5. überarbeitete Auflage, Springer-Verlag, Berlin, Heidelberg, New York 1980, Seiten 387 ff. beschrieben.Reference voltages are required in almost all circuits with integrated circuits. They should be constant under all operating conditions and have no or a certain temperature drift. In particular in integrated circuits themselves, bandgap circuits are preferred for generating the reference voltages. Bandgap circuits are described, for example, in the book "Semiconductor Circuit Technology" by U.Tietze and Ch. Schenk, 5th revised edition, Springer-Verlag, Berlin, Heidelberg, New York 1980, pages 387 ff.
In der vorgenannten Veröffentlichung ist ausgeführt, daß mittels derartiger Bandgap-Schaltungen Referenzspannungen erzeugt werden können, die unabhängig vom Temperaturkoeffizienten der in ihr verwendeten Bauelemente sind, d.h. eine derartige Schaltung liefert eine temperaturunabhängige Referenzspannung, die dem Bandabstand des Halbleitermaterials entspricht. Für das häufig verwendete Silicium beträgt diese temperaturunabhängige Referenzspannung 1,205 V. Eine derartige Schaltung verwendet im Prinzip als Referenz die Basis-Emitter-Spannung eines Transistors, deren negativer Temperaturkoeffizient durch die Addition einer Spannung mit positivem Temperaturkoeffizienten kompensiert wird. Diese Spannung wird aus der Differenz der Basis-Emitter-Spannungen zweier mit verschiedenen Strömen betriebener Transistoren gebildet.In the aforementioned publication it is stated that such bandgap circuits can be used to generate reference voltages which are independent of the temperature coefficient of the components used in them, ie such a circuit provides a temperature-independent reference voltage which corresponds to the bandgap of the semiconductor material. For the frequently used silicon, this temperature-independent reference voltage is 1.205 V. In principle, such a circuit uses the base-emitter voltage of a transistor, the negative temperature coefficient of which by adding a voltage with a positive temperature coefficient is compensated. This voltage is formed from the difference between the base-emitter voltages of two transistors operated with different currents.
Eine Erweiterung einer Bandgap-Schaltung ist beispielsweise aus der US-PS 3,893,018 bekannt. In ihr werden, zusätzlich zur Bandgap-Stufe, mit Hilfe eines umfangreichen, aktive und passive Elemente enthaltenden Netzwerks zwei stabilisierte Ausgangsspannungen erzeugt, von denen jeweils eine auf ein Potential der Versorgungs-Speisespannung bezogen ist.An expansion of a bandgap circuit is known, for example, from US Pat. No. 3,893,018. In addition to the bandgap stage, two stabilized output voltages are generated with the help of an extensive network containing active and passive elements, one of which is related to a potential of the supply supply voltage.
Bekannte Bandgap-Schaltungsanordnungen erfordern zur Erzeugung einer von der Bandgap-Spannung unterschiedlichen Referenzspannung ein umfangreiches Netzwerk, insbesondere bei der Vorgabe einer bestimmten Temperaturdrift.Known bandgap circuit arrangements require an extensive network in order to generate a reference voltage that is different from the bandgap voltage, in particular when specifying a specific temperature drift.
Aus der JP-A-60 101 623 ist eine gattungsgemäße Schaltung bekannt, die den Nachteil aufweist, daß der von der Stromquelle gelieferte Strom durch das Netzwerk und die in Reihe dazu liegende Schaltung zur Erzeugung einer positiven Temperaturdrift vom Laststrom abhängig und somit schlecht definiert ist. Dadurch ist das Netzwerk hinsichtlich Absolutwert der Referenzspannung als auch der möglichen Temperaturdrift einschränkenden Bedingungen unterworfen.A generic circuit is known from JP-A-60 101 623, which has the disadvantage that the current supplied by the current source through the network and the circuit connected in series for generating a positive temperature drift depends on the load current and is therefore poorly defined . As a result, the network is subject to conditions restricting the absolute value of the reference voltage and the possible temperature drift.
Aus der JP-A-56 153 417 ist eine Schaltung zur Erzeugung einer Referenzspannung mit vorgebbarer Temperaturdrift bekannt, die einen vergleichsweise hohen Strom verbraucht und ebenfalls hinsichtlich der Höhe der Referenzspannung und der Temperaturdrift bzw. des Vorzeichens der Temperaturdrift eingeschränkt ist, weil parallel zur Schaltung zur Erzeugung einer elektrischen Größe mit positivem Temperaturkoeffizienten ein Widerstand liegt. Damit ist die Schaltung aber auch hinsichtlich des Bereichs zur Vorgabe einer Temperaturdrift eingeschränkt.From JP-A-56 153 417 a circuit for generating a reference voltage with predeterminable temperature drift is known, which consumes a comparatively high current and is also limited with respect to the level of the reference voltage and the temperature drift or the sign of the temperature drift, because parallel to the circuit there is a resistor for generating an electrical quantity with a positive temperature coefficient. However, the circuit is also restricted with regard to the range for specifying a temperature drift.
Der Erfindung liegt die Aufgabe zugrunde, eine einfache und mit einfachen Mitteln modifizierbare Schaltungsanordnung zur Erzeugung einer Referenzspannung mit vorgebbarer Temperaturdrift anzugeben, die einen geringen Stromverbrauch und einen gut definierten Strom aufweist und die hinsichtlich Absolutwert der Referenzspannung als auch ihrer Temperaturdrift weitgehend frei dimensionierbar ist.The invention has for its object a simple and with To specify simple means of modifiable circuit arrangement for generating a reference voltage with predeterminable temperature drift, which has a low current consumption and a well-defined current and which is largely freely dimensionable with regard to the absolute value of the reference voltage and its temperature drift.
Diese Aufgabe wird bei einer Schaltungsanordnung der eingangs genannten Art erfindungsgemäß durch die Merkmale des kennzeichnenden Teils des Patentanspruchs 1 gelöst.This object is achieved according to the invention in a circuit arrangement of the type mentioned at the outset by the features of the characterizing part of patent claim 1.
Erfindungsgemäß wird dabei in Serie zu der Schaltung zur Erzeugung einer elektrischen Größe mit positivem Temperaturkoeffizienten ein Netzwerk geschaltet, das über einen Regler in die Gegenkopplung der Arbeitspunkteinstellung dieser Schaltung eingebunden ist. Das den Regelkreis erweiternde Netzwerk unterliegt kaum einschränkenden Bedingungen und ermöglicht eine Parametervielfalt hinsichtlich Absorlutwert der Referenzspannung als auch ihrer Temperatur-drift, da die Arbeitspunkteinstellung bereits durch die Schaltung zur Erzeugung einer elektrischen Größe mit positivem Temperaturkoeffizienten mit Hilfe des Reglers vorgenommen wird.According to the invention, a network is connected in series with the circuit for generating an electrical variable with a positive temperature coefficient and is integrated via a controller into the negative feedback of the operating point setting of this circuit. The network expanding the control loop is subject to hardly any restrictive conditions and enables a variety of parameters with regard to the absorber value of the reference voltage and its temperature drift, since the operating point is already set by the circuit for generating an electrical variable with a positive temperature coefficient with the help of the controller.
Weitere Ausgestaltungen des Erfindungsgedankens sind in Unteransprüchen gekennzeichnet.Further refinements of the inventive concept are characterized in the subclaims.
Die Erfindung wird im folgenden anhand von in den Figuren der Zeichnung dargestellten Ausführungsbeispielen näher erläutert.The invention is explained in more detail below with reference to exemplary embodiments shown in the figures of the drawing.
Es zeigt:
- Fig. 1
- ein schematisches Schaltbild einer Schaltungsanordnung zur Erzeugung einer Referenzspannung mit vorgebbarer Temperaturdrift,
- Fig. 2
- Schaltbilder konkreter Ausführungsformen erfindungsgemäßer Netzwerke und
- Fig. 3
- ein Schaltbild einer praktischen Ausführungsform einer erfindungsgemäßen Schaltungsanordnung.
- Fig. 1
- 1 shows a schematic circuit diagram of a circuit arrangement for generating a reference voltage with predeterminable temperature drift,
- Fig. 2
- Circuit diagrams of specific embodiments of networks and
- Fig. 3
- a circuit diagram of a practical embodiment of a circuit arrangement according to the invention.
Gemäß Fig. 1 besitzt die erfindungsgemäße Schaltungsanordnung zur Erzeugung einer Referenzspannung mit vorgebbarer Temperaturdrift eine Speiseschaltung, die eine, von einer Klemme mit der Spannung UE gegenüber einem Bezugspotential versorgte Stromquelle SQ enthält. Die erfindungsgemäße Schaltungsanordnung stüzt sich auf das Bandgap-Prinzip. In Serie zu einem Netzwerk NW liegt eine zwei Zweige enthaltende Parallelschaltung. Der erste Zweig enthält einen als Diode geschalteten Transistor T1 mit Kollektorwiderstand R1 und der zweite Zweig den Ausgangskreis eines zweiten Transistors T2 mit Kollektorwiderstand R2 und Emitterwiderstand R3. Die Basis des Transistors T2 ist mit der Basis und dem Kollektor des Transistors T1 verbunden. Ein weiterer Transistor T3 liegt mit seinem Ausgangskreis parallel zu der beschriebenen Serienschaltung und parallel zu den Ausgangsklemmen mit der erfindungsgemäßen Referenzspannung UREF der Schaltungsanordnung und mit seiner Basis am Kollektor des Transistors T2.1, the circuit arrangement according to the invention for generating a reference voltage with a predeterminable temperature drift has a feed circuit which contains a current source SQ supplied by a terminal with the voltage U E with respect to a reference potential. The circuit arrangement according to the invention is based on the bandgap principle. In series with a network NW is a parallel connection containing two branches. The first branch contains a transistor T1 connected as a diode with a collector resistor R1 and the second branch the output circuit of a second transistor T2 with collector resistor R2 and emitter resistor R3. The base of transistor T2 is connected to the base and the collector of transistor T1. Another transistor T3 is connected with its output circuit parallel to the series circuit described and parallel to the output terminals with the reference voltage U REF of the circuit arrangement according to the invention and with its base on the collector of transistor T2.
Unter der Annahme, daß das zunächst nicht näher bezeichnete Netzwerk NW einen Kurzschluß darstellt, entspricht die Schaltungsanordnung nach Fig. 1 der in der zitierten Veröffentlichung von U. Tietze und Ch. Schenk angegebenen Bandgap-Schaltung. Die aus den Elementen T1, T2 und R1 bis R3 gebildete Anordnung stellt eine Schaltung zur Erzeugung einer elektrischen Größe mit positivem Temperaturkoeffizienten dar. Diese elektrische Größe wird vom Produkt aus einem Widerstand und einem durchfließenden elektrischen Strom bestimmt, aus dem sich die Dimension "Spannung" ergibt.Assuming that the network NW, which is initially not described in more detail, represents a short circuit, the circuit arrangement according to FIG. 1 corresponds to the bandgap circuit specified in the cited publication by U. Tietze and Ch. Schenk. The arrangement formed from the elements T1, T2 and R1 to R3 represents a circuit for generating an electrical variable with a positive temperature coefficient. This electrical variable is determined by the product of a resistance and a flowing electrical current, from which the dimension "voltage" results.
Über dem Widerstand R3 fällt eine Spannung ab, die mit Hilfe des Transistors T2 verstärkt wird. Unter der getroffenen Annahme eines Kurzschlusses des Netzwerkes NW wird die Referenzspannung UREF bzw. die Bandgap-Spannung UBG aus der Summe der über dem Widerstand R2 abfallenden Spannung mit positiven Temperaturkoeffizienten und der Basis-Emitter-Spannung des Transistors T3 mit negativem Tem-peraturkoeffizienten gebildet. Der Transistor T3 wirkt dabei als Regeltransistor, der über den Widerstand R2 spannungsgegengekoppelt ist und das Potential am Kollektor des Transistors T2 konstant hält.A voltage drops across the resistor R3 and is amplified with the aid of the transistor T2. Assuming a short circuit in the network NW, the reference voltage U REF or the bandgap voltage U BG becomes the sum of the voltage drop across the resistor R2 with positive temperature coefficients and the base-emitter voltage of the transistor T3 with a negative temperature coefficient educated. The transistor T3 acts as a control transistor, which is voltage-coupled via the resistor R2 and keeps the potential at the collector of the transistor T2 constant.
Das Netzwerk NW, das erfindungsgemäß passive und/oder aktive Elemente enthält, wird nun in der Schaltungsanordnung nach Fig. 1 in die Gegenkopplung des Regeltransistors T3 einbezogen. Da andererseits das Netzwerk NW in Serie zur Schaltung zur Erzeugung einer elektrischen Größe mit positivem Temperaturkoeffizienten liegt, teilt sich der durch das Netzwerk NW fließende Strom im gleichen Verhältnis auf die beiden parallelen Zweige dieser Schaltung auf wie bei der Annahme, daß das Netzwerk NW einen Kurzschluß darstelle.The network NW, which according to the invention contains passive and / or active elements, is now in the circuit arrangement 1 included in the negative feedback of the control transistor T3. On the other hand, since the network NW is in series with the circuit for generating an electrical quantity with a positive temperature coefficient, the current flowing through the network NW is divided equally between the two parallel branches of this circuit as if the network NW were short-circuited represent.
Dieses gleichbleibende Verhältnis der beiden durch die parallelen Zweige fließenden Ströme, wobei die Stromdichte durch den Transistor T1 größer sein muß als die Stromdichte durch den Transistor T2, sorgt somit für eine gleichbleibende Spannung mit positivem Temperaturkoeffizienten sowohl am Widerstand R3 als auch am Widerstand R2. Somit bleiben die Kenndaten der Schaltung zur Erzeugung einer elektrischen Größe mit positivem Temperaturkoeffizienten trotz des in Serie liegenden erfindungsgemäßen Netzwerkes NW unabhängig von der Versorgungsspannung erhalten. Dies gilt insbesondere auch für den Spannungsabfall UBE über der Basis-Emitter-Strecke des Transistors T1, dem sich der Spannungsabfall über den Widerstand R1 addiert, so daß sich am Verbindungspunkt der beiden Widerstände R1 und R2 bezogen auf das Bezugspotential die unveränderte Bandgap-Spannung UBG abgreifen läßt.This constant ratio of the two currents flowing through the parallel branches, the current density through the transistor T1 must be greater than the current density through the transistor T2, thus ensures a constant voltage with a positive temperature coefficient at both the resistor R3 and the resistor R2. The characteristic data of the circuit for generating an electrical variable with a positive temperature coefficient are thus retained regardless of the supply voltage, in spite of the network NW according to the invention which is in series. This also applies in particular to the voltage drop U BE across the base-emitter path of the transistor T1, to which the voltage drop across the resistor R1 is added, so that the unchanged bandgap voltage at the connection point of the two resistors R1 and R2 is based on the reference potential U BG lets tap.
Der resultierende Temperaturkoeffizient der Bandgap-Spannung UBG läßt sich im wesentlichen durch das Verhältnis der Stromdichten durch die Transistoren T1 und T2 bzw. deren Emitterflächenverhältnis sowie das Widerstandsverhältnis R2/R1 und durch das Widerstandsverhältnis R2/R3 beeinflussen.The resulting temperature coefficient of the bandgap voltage U BG can essentially be influenced by the ratio of the current densities through the transistors T1 and T2 or their emitter area ratio as well as the resistance ratio R2 / R1 and the resistance ratio R2 / R3.
Die erfindungsgemäß zu erzeugende Referenzspannung UREF ergibt sich aus der Addition der Bandgap-Spannung UBG und der über dem Netzwerk NW abfallenden Spannung. Mögliche Ausführungsformen für dieses Netzwerk NW sind in Fig. 2 dargestellt. Fig. 2a zeigt einen rein ohmschen Widerstand R4, Fig. 2b eine Diode D und Fig. 2c einen Transistor T4, dessen Ausgangskreis parallel zu einem aus den Widerständen R5 und R6 gebildeten ohmschen Spannungsteiler liegt und dessen Basis vom Teilerpunkt angesteuert wird.The reference voltage U REF to be generated according to the invention results from the addition of the bandgap voltage U BG and the voltage drop across the network NW. Possible embodiments for this network NW are shown in FIG. 2. 2a shows a purely ohmic resistor R4, FIG. 2b a diode D and FIG. 2c a transistor T4, the output circuit of which is parallel to an ohmic voltage divider formed from the resistors R5 and R6 and the base of which is driven by the dividing point.
Zu der sich aus den additiven Anteilen der Basis-Emitter-Spannung des Transistors T3 und der über dem Widerstand R2 abfallenden Spannung mit positivem Temperaturkoeffizienten zusammensetzenden Bandgap-Spannung addiert sich deshalb bei einem Netzwerk NW gemäß den Ausführungsformen nach Fig. 2 im Fall der Fig. 2a eine Spannung mit positivem Temperaturkoeffizienten und in den Fällen der Fig. 2b und 2c jeweils eine Diodenflußspannung mit negativem Temperaturkoeffizienten. Im Fall der Fig. 2b addiert sich diese Spannung mit negativem Temperaturkoeffizienten in voller Höhe, im Fall der Fig. 2c wird die Basis-Emitter-Spannung des Transistors T4 durch den Spannungsteiler aus den Widerständen R5 und R6 gewichtet addiert.In the case of a network NW according to the embodiments according to FIG. 2, in the case of FIG. 2, the band gap voltage composed of the additive components of the base-emitter voltage of the transistor T3 and the voltage drop across the resistor R2 with a positive temperature coefficient is therefore added. 2a a voltage with a positive temperature coefficient and in the cases of FIGS. 2b and 2c each a diode forward voltage with a negative temperature coefficient. In the case of FIG. 2b, this voltage is added in full with a negative temperature coefficient; in the case of FIG. 2c, the base-emitter voltage of the transistor T4 is weighted by the voltage divider from the resistors R5 and R6.
Die Referenzspannung an den Ausgangsklemmen der Schaltung enthält damit zwei Anteile: einen proportional zur Basis-Emitter-Spannung mit negativem Temperaturkoeffizienten und einen proportional zur Temperaturspannung UT, die sich aus der Differenz der Basis-Emitter-Spannungen der Transistoren T1 und T2 ergibt und einen positiven Temperaturkoeffizienten besitzt. Da diese beiden Anteile sich gegenläufig mit der Temperatur ändern ist eine Temperaturkompensation möglich.The reference voltage at the output terminals of the circuit thus contains two components: one proportional to the base-emitter voltage with a negative temperature coefficient and one proportional to the temperature voltage U T , which results from the difference between the base-emitter voltages of the transistors T1 and T2, and one has positive temperature coefficients. Since these two components change in opposite directions with temperature, temperature compensation is possible.
Für das Netzwerk NW existieren kaum einschränkende Bedingungen, da die Einstellung der Arbeitspunkte der Schaltung zur Erzeugung einer elektrischen Größe mit positivem Temperaturkoeffizienten mit Hilfe des als Regler dienenden Transistors T3 vorgenommen wird. Fig. 3 zeigt ein Ausführungsbeispiel einer konkreten Schaltung zur Erzeugung einer Referenzspannung UREF an ihren Ausgangsklemmen, deren Temperaturkoeffizient sich durch die Schaltungsdimmensionierung vorgeben läßt. Gleiche Elemente wie in den Fig. 1 und 2 sind mit gleichen Bezugszeichen versehen.There are hardly any restrictive conditions for the network NW, since the operating points of the circuit for generating an electrical variable with a positive temperature coefficient are set with the aid of the transistor T3 serving as a regulator. 3 shows an exemplary embodiment of a specific circuit for generating a reference voltage U REF at its output terminals , the temperature coefficient of which can be specified by the circuit dimensioning. The same elements as in FIGS. 1 and 2 are provided with the same reference numerals.
Das Netzwerk NW enthält gemäß Fig. 3 die Serienschaltung aus einem ohmschen Widerstand R4 und einem bereits beschriebenen Netzwerk gemäß Fig. 2c. Der Transistor T2 nach Fig. 1 ist in Fig. 3 durch einen Transistor T2' mit zwei oder mehr Emittern ersetzt. Die Stromquelle SQ besteht aus einem Längstransistor T5, dessen Kollektor mit der gegenüber dem Bezugspotential die Spannung UE besitzenden Versorgungsklemme und dessen Emitter mit der gegenüber dem Bezugspotential die Referenzspannung UREF besitzenden Ausgangsklemme verbunden ist. Der Transistor T5 wird mit Hilfe des Widerstandes R7 angesteuert, der zwischen seinem Kollektor und seiner Basis angeschlossen ist. Im Unterschied zur Fig. 1 ist der Ausgangskreis des Transistors T3 über die Basis-Emitter-Strecke des Transistors T5 mit den Ausgangsklemmen für die Referenzspannung UREF verbunden.According to FIG. 3, the network NW contains the series circuit consisting of an ohmic resistor R4 and an already described network according to FIG. 2c. The transistor T2 according to FIG. 1 is replaced in FIG. 3 by a transistor T2 'with two or more emitters. The current source SQ consists of a series transistor T5, the collector of which is connected to the supply terminal which has the voltage U E with respect to the reference potential and the emitter of which is connected to the output terminal which has the reference voltage U REF with respect to the reference potential. The transistor T5 is driven by means of the resistor R7, which is connected between its collector and its base. In contrast to FIG. 1, the output circuit of transistor T3 is connected to the output terminals for the reference voltage U REF via the base-emitter path of transistor T5.
Die Ausgangsspannung, d.h. die Referenzspannung UREF, setzt sich additiv aus der Bandgap-Spannung UBG, der über dem Widerstand R4 abfallenden Spannung U₂ und der über der Kollektor-Emitter-Strecke des Transistors T4 bzw. über dem Spannungsteiler aus den Widerständen R5 und R6 abfallenden Spannung U₃ zusammen. Diese Teilspannungen ergeben sich gemäß den nachstehenden Formeln unter den Annahmen, daß Basisströme vernachlässigt und Spannungsabfälle an Basis-Emitter-Strecken gleichgesetzt werden sowie der Voraussetzung der Existenz eines stabilen Arbeitspunktes:
In diesen Formeln bedeutet das n das Verhältnis der Emitterflächen der Transistoren T2 bzw. T2' und T1 und UT ist die Temperaturspannung, die sich aus dem Produkt der Boltzmannkonstanten und der absoluten Temperatur dividiert durch die Elementarladung ergibt. Die angeführten Basis-Emitter-Spannungen beziehen sich auf den jeweils zugehörigen Transistor. Als Referenzspannung UREF ergibt sich folgender Ausdruck:
Die in dieser Summenformel stehenden Proportionalitätsfaktoren für die Basis-Emitter-Spannung UBE bzw. die Temperaturspannung UT ermöglichen durch eine gezielte Manipulation sowohl frei vorgebbare Temperaturdriften als auch Absolutwert der Referenzspannung UREF. Der Absolutwert der Referenzspannung ist durch die Wahl der Widerstandswerte unabhängig von der Temperaturdrift einstellbar. Da in der Summenformel ausschließlich Widerstandsverhältnisse vorkommen, ist die erfindungsgemäße Schaltungsanordnung weitgehend unabhängig von prozeßbedingten Streuungen sowohl der Widerstandabsolutwerte als auch deren Temperaturdriften, sofern man gleiches Widerstandsmaterial annimmt.The proportionality factors for the base-emitter voltage U BE and the temperature voltage U T , which are in this empirical formula, enable both freely definable temperature drifts and an absolute value of the reference voltage U REF through targeted manipulation. The absolute value of the reference voltage can be set independently of the temperature drift by selecting the resistance values. Since there are only resistance relationships in the empirical formula, the circuit arrangement according to the invention is largely independent of process-related scattering of both the absolute resistance values and their temperature drifts, provided the same resistance material is assumed.
Die erfindungsgemäßen Ausführungsbeispiele gemäß der Figuren 1 bis 3 sind mit npn-Transistoren dargestellt; die Erfindung ist jedoch nicht auf Transistoren dieses Typs beschränkt, sondern eine erfindungsgemäße Schaltungsanordnung läßt sich auch mit pnp-Transistoren erzielen.The exemplary embodiments according to the invention from FIGS. 1 to 3 are shown with NPN transistors; however, the invention is not limited to transistors of this type, but a circuit arrangement according to the invention can also be achieved with pnp transistors.
Claims (2)
- Circuit arrangement for generating a reference voltage (UREF) having a predetermined temperature drift at its output terminals, having a supply circuit (UE, SQ, R7, T5) and, connected thereto and located between the output terminals, a series circuit consisting of a network (NW), having at least one active element (T4), and a circuit for generating an electrical variable having a positive temperature coefficient (T1, T2, R1 to R3; T2') which, in two parallel circuits, contains on the one hand a first transistor (T1), connected as a diode and having a collector resistor (R1), and on the other hand a second transistor (T2, T2'), having a collector resistor and an emitter resistor (R2, R3), the base of which is connected to the base of the first transistor (T1) and the output side of which is connected to the input circuit of a controller (T3) for controlling the operating point setting, characterised in that the controller (T3) is connected on the output side directly to the output terminals and in that no resistor is provided in parallel with the circuit for generating an electrical variable having a positive temperature coefficient (T1, T2, R1 to R2; T2').
- Circuit arrangement according to Claim 1, characterised in that the controller is formed by a transistor (T3), the output circuit of which is connected to the reference voltage (UREF) and the base of which is connected to the collector of the second transistor (T2, T2').
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
AT86112573T ATE70373T1 (en) | 1985-09-17 | 1986-09-11 | CIRCUIT ARRANGEMENT FOR GENERATION OF A REFERENCE VOLTAGE WITH DEFINABLE TEMPERATURE DRIFT. |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE3533165 | 1985-09-17 | ||
DE3533165 | 1985-09-17 |
Publications (2)
Publication Number | Publication Date |
---|---|
EP0216265A1 EP0216265A1 (en) | 1987-04-01 |
EP0216265B1 true EP0216265B1 (en) | 1991-12-11 |
Family
ID=6281201
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
EP86112573A Expired - Lifetime EP0216265B1 (en) | 1985-09-17 | 1986-09-11 | Voltage reference generating circuit with a given temperature drift |
Country Status (5)
Country | Link |
---|---|
US (1) | US4733160A (en) |
EP (1) | EP0216265B1 (en) |
JP (1) | JPS6269308A (en) |
AT (1) | ATE70373T1 (en) |
DE (1) | DE3682855D1 (en) |
Families Citing this family (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4800365A (en) * | 1987-06-15 | 1989-01-24 | Burr-Brown Corporation | CMOS digital-to-analog converter circuitry |
JPH079616B2 (en) * | 1988-07-19 | 1995-02-01 | 日本電気株式会社 | Constant voltage circuit |
US4945260A (en) * | 1989-04-17 | 1990-07-31 | Advanced Micro Devices, Inc. | Temperature and supply compensated ECL bandgap reference voltage generator |
US4937697A (en) * | 1989-05-22 | 1990-06-26 | Motorola, Inc. | Semiconductor device protection circuit |
KR940003406B1 (en) * | 1991-06-12 | 1994-04-21 | 삼성전자 주식회사 | Circuit of internal source voltage generation |
DE69325027T2 (en) * | 1993-12-02 | 1999-09-16 | Co.Ri.M.Me. Consorzio Per La Ricerca Sulla Microelettronica Nel Mezzogiorno, Catania | Voltage reference with linear negative temperature coefficient |
EP0747798A3 (en) * | 1995-06-07 | 1998-02-11 | Acme Electric Corporation | Temperature and current dependent regulated voltage source |
US6292050B1 (en) | 1997-01-29 | 2001-09-18 | Cardiac Pacemakers, Inc. | Current and temperature compensated voltage reference having improved power supply rejection |
DE19818464A1 (en) * | 1998-04-24 | 1999-10-28 | Siemens Ag | Reference voltage generation circuit |
US6381491B1 (en) | 2000-08-18 | 2002-04-30 | Cardiac Pacemakers, Inc. | Digitally trimmable resistor for bandgap voltage reference |
DE102005033434A1 (en) * | 2005-07-18 | 2007-01-25 | Infineon Technologies Ag | Reference voltage generating circuit for generating small reference voltages |
JP5554081B2 (en) * | 2010-02-16 | 2014-07-23 | ローム株式会社 | Reference voltage circuit |
US9602100B1 (en) | 2014-01-22 | 2017-03-21 | Automation Solutions, LLC | Downhole measurement tool having a regulated voltage power supply and method of use thereof |
Family Cites Families (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3617859A (en) * | 1970-03-23 | 1971-11-02 | Nat Semiconductor Corp | Electrical regulator apparatus including a zero temperature coefficient voltage reference circuit |
US3701004A (en) * | 1971-05-13 | 1972-10-24 | Us Army | Circuit for generating a repeatable voltage as a function of temperature |
US3781648A (en) * | 1973-01-10 | 1973-12-25 | Fairchild Camera Instr Co | Temperature compensated voltage regulator having beta compensating means |
US4100477A (en) * | 1976-11-29 | 1978-07-11 | Burroughs Corporation | Fully regulated temperature compensated voltage regulator |
NL7803607A (en) * | 1978-04-05 | 1979-10-09 | Philips Nv | VOLTAGE REFERENCE CIRCUIT. |
JPS56153417A (en) * | 1980-04-30 | 1981-11-27 | Nec Corp | Constant voltage circuit |
DE3137504A1 (en) * | 1981-09-21 | 1983-04-07 | Siemens AG, 1000 Berlin und 8000 München | CIRCUIT ARRANGEMENT FOR GENERATING A TEMPERATURE-INDEPENDENT REFERENCE VOLTAGE |
JPS5952320A (en) * | 1982-09-17 | 1984-03-26 | Matsushita Electric Ind Co Ltd | Reference voltage circuit |
JPS60101623A (en) * | 1983-11-08 | 1985-06-05 | Toshiba Corp | Constant voltage supply circuit |
JPS60129818A (en) * | 1983-12-19 | 1985-07-11 | Matsushita Electric Ind Co Ltd | Reference voltage circuit |
-
1986
- 1986-09-11 JP JP61214967A patent/JPS6269308A/en active Pending
- 1986-09-11 AT AT86112573T patent/ATE70373T1/en active
- 1986-09-11 EP EP86112573A patent/EP0216265B1/en not_active Expired - Lifetime
- 1986-09-11 DE DE8686112573T patent/DE3682855D1/en not_active Expired - Lifetime
- 1986-09-16 US US06/907,986 patent/US4733160A/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
ATE70373T1 (en) | 1991-12-15 |
US4733160A (en) | 1988-03-22 |
DE3682855D1 (en) | 1992-01-23 |
EP0216265A1 (en) | 1987-04-01 |
JPS6269308A (en) | 1987-03-30 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
DE68926201T2 (en) | Operational amplifier circuit | |
DE3888855T2 (en) | Fast, supply-independent current level switching. | |
DE69530905T2 (en) | Circuit and method for voltage regulation | |
DE60102486T2 (en) | AMPLIFIER WITH MULTIPLE VOLTAGE SUPPLIES AND DYNAMIC VOLTAGE CONTROL | |
EP0216265B1 (en) | Voltage reference generating circuit with a given temperature drift | |
DE69511923T2 (en) | Control circuit for the generation of a temperature and supply voltage independent reference voltage | |
DE68909966T2 (en) | Stabilized current and voltage sources. | |
EP0360887B1 (en) | Cmos voltage reference | |
DE2508226A1 (en) | CURRENT STABILIZATION CIRCUIT | |
DE3937501A1 (en) | METHOD AND DEVICE FOR GENERATING A PRELOAD | |
DE2207233B2 (en) | Electronic signal amplifier | |
EP0952508A1 (en) | Generating circuit for reference voltage | |
DE68919764T2 (en) | Fully differential reference voltage source. | |
DE3047685C2 (en) | Temperature stable voltage source | |
DE69421083T2 (en) | Protection circuit and method for power transistor and voltage regulator using this | |
DE3447002C2 (en) | ||
DE3137504A1 (en) | CIRCUIT ARRANGEMENT FOR GENERATING A TEMPERATURE-INDEPENDENT REFERENCE VOLTAGE | |
DE3230429C2 (en) | ||
DE2250625A1 (en) | CURRENT REGULATOR | |
EP0238903B1 (en) | Reference current source | |
DE2636156B2 (en) | Voltage follower circuit with one input terminal | |
DE102015122521A1 (en) | Voltage reference circuit | |
EP0506174B1 (en) | Integrated circuit device comprising a differential amplifier | |
DE3810058A1 (en) | SCHMITT TRIGGER CIRCUIT | |
DE3824105C2 (en) | Circuit arrangement for generating a stabilized output voltage |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PUAI | Public reference made under article 153(3) epc to a published international application that has entered the european phase |
Free format text: ORIGINAL CODE: 0009012 |
|
AK | Designated contracting states |
Kind code of ref document: A1 Designated state(s): AT BE CH DE FR GB IT LI LU NL SE |
|
17P | Request for examination filed |
Effective date: 19870929 |
|
17Q | First examination report despatched |
Effective date: 19891206 |
|
GRAA | (expected) grant |
Free format text: ORIGINAL CODE: 0009210 |
|
AK | Designated contracting states |
Kind code of ref document: B1 Designated state(s): AT BE CH DE FR GB IT LI LU NL SE |
|
REF | Corresponds to: |
Ref document number: 70373 Country of ref document: AT Date of ref document: 19911215 Kind code of ref document: T |
|
REF | Corresponds to: |
Ref document number: 3682855 Country of ref document: DE Date of ref document: 19920123 |
|
ET | Fr: translation filed | ||
ITF | It: translation for a ep patent filed | ||
GBT | Gb: translation of ep patent filed (gb section 77(6)(a)/1977) | ||
PLBE | No opposition filed within time limit |
Free format text: ORIGINAL CODE: 0009261 |
|
STAA | Information on the status of an ep patent application or granted ep patent |
Free format text: STATUS: NO OPPOSITION FILED WITHIN TIME LIMIT |
|
26N | No opposition filed | ||
PGFP | Annual fee paid to national office [announced via postgrant information from national office to epo] |
Ref country code: SE Payment date: 19930914 Year of fee payment: 8 |
|
PGFP | Annual fee paid to national office [announced via postgrant information from national office to epo] |
Ref country code: LU Payment date: 19930916 Year of fee payment: 8 |
|
PGFP | Annual fee paid to national office [announced via postgrant information from national office to epo] |
Ref country code: BE Payment date: 19930920 Year of fee payment: 8 |
|
PGFP | Annual fee paid to national office [announced via postgrant information from national office to epo] |
Ref country code: NL Payment date: 19930930 Year of fee payment: 8 |
|
EPTA | Lu: last paid annual fee | ||
PGFP | Annual fee paid to national office [announced via postgrant information from national office to epo] |
Ref country code: CH Payment date: 19931215 Year of fee payment: 8 |
|
PGFP | Annual fee paid to national office [announced via postgrant information from national office to epo] |
Ref country code: GB Payment date: 19940815 Year of fee payment: 9 |
|
PGFP | Annual fee paid to national office [announced via postgrant information from national office to epo] |
Ref country code: AT Payment date: 19940824 Year of fee payment: 9 |
|
PG25 | Lapsed in a contracting state [announced via postgrant information from national office to epo] |
Ref country code: LU Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES Effective date: 19940911 |
|
PG25 | Lapsed in a contracting state [announced via postgrant information from national office to epo] |
Ref country code: SE Effective date: 19940912 |
|
PGFP | Annual fee paid to national office [announced via postgrant information from national office to epo] |
Ref country code: FR Payment date: 19940920 Year of fee payment: 9 |
|
PG25 | Lapsed in a contracting state [announced via postgrant information from national office to epo] |
Ref country code: LI Effective date: 19940930 Ref country code: CH Effective date: 19940930 Ref country code: BE Effective date: 19940930 |
|
PGFP | Annual fee paid to national office [announced via postgrant information from national office to epo] |
Ref country code: DE Payment date: 19941118 Year of fee payment: 9 |
|
EAL | Se: european patent in force in sweden |
Ref document number: 86112573.0 |
|
BERE | Be: lapsed |
Owner name: SIEMENS A.G. Effective date: 19940930 |
|
PG25 | Lapsed in a contracting state [announced via postgrant information from national office to epo] |
Ref country code: NL Effective date: 19950401 |
|
NLV4 | Nl: lapsed or anulled due to non-payment of the annual fee | ||
REG | Reference to a national code |
Ref country code: CH Ref legal event code: PL |
|
EUG | Se: european patent has lapsed |
Ref document number: 86112573.0 |
|
PG25 | Lapsed in a contracting state [announced via postgrant information from national office to epo] |
Ref country code: GB Effective date: 19950911 Ref country code: AT Effective date: 19950911 |
|
GBPC | Gb: european patent ceased through non-payment of renewal fee |
Effective date: 19950911 |
|
PG25 | Lapsed in a contracting state [announced via postgrant information from national office to epo] |
Ref country code: FR Effective date: 19960531 |
|
PG25 | Lapsed in a contracting state [announced via postgrant information from national office to epo] |
Ref country code: DE Effective date: 19960601 |
|
REG | Reference to a national code |
Ref country code: FR Ref legal event code: ST |
|
PG25 | Lapsed in a contracting state [announced via postgrant information from national office to epo] |
Ref country code: IT Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES;WARNING: LAPSES OF ITALIAN PATENTS WITH EFFECTIVE DATE BEFORE 2007 MAY HAVE OCCURRED AT ANY TIME BEFORE 2007. THE CORRECT EFFECTIVE DATE MAY BE DIFFERENT FROM THE ONE RECORDED. Effective date: 20050911 |