EP0028174B1 - Electronic control unit to regulate the air-fuel ratio of the mixture fed to an internal-combustion engine - Google Patents

Description

The invention relates to fuel supply systems for internal combustion engines; it relates to an electronic controller for regulating the air / fuel ratio of the mixture admitted into the engine cylinders, and more precisely such a controller using the output signal of an oxygen sensor disposed on the exhaust path of the burnt gases.

FIG. 1 shows the relative proportions of the main constituents of the gases burned at the outlet of an internal combustion engine as a function of the air / fuel ratio (A / C) of the fuel mixture admitted into the cylinders of this engine, the particularly harmful constituents being hydrocarbons (HC), carbon monooxide (CO) and nitric oxides (NO _x ).

On examination of this figure, it can be seen that the pollution rate of an engine is reduced when the latter is supplied by a lean mixture, that is to say the A / C ratio of which is greater than 15: 1 corresponding to the stoichiometric ratio indicated by the dotted vertical line. It is known that the CO emission decreases when the A / C ratio increases due to the excess of oxygen which ensures more perfect combustion of the fuel mixture. In practice because of the imperfect air / fuel mixture and the short combustion time, an excess of air above the stoichiometric A / C ratio is necessary. However, an A / C ratio higher than 18: 1 constitutes an upper limit because, for various reasons, the HC emission increases again, the ignition of the mixture proves to be critical, the power supplied by the engine is lower and the specific consumption increases. So, to meet the Pollution Standards currently in force and, for the future, being developed, we are led to take additional measures which generally consist in destroying residual harmful agents outside the engine, in reactors catalytic or non-catalytic. It follows from what has just been explained that, in order to reduce the pollution rate of motor vehicles to low values, the A / C ratio of the fuel mixture admitted into the engine cylinders must remain within narrow limits corresponding to a mixture rather poor, and that, to have a flexible pipe, in the pleasant direction, it is necessary to increase the richness of the fuel mixture for certain engine operating regimes.

In a conventional carburetion system, it is not possible to control the A / C ratio of the carburetted mixture with sufficient precision, taking into account manufacturing dispersions, inevitable wear and variations in operating conditions, in particular the temperature of the engine, ambient pressure, etc. Also, electronic carburetor controllers have already been proposed which use the electrical output signal from an oxygen sensor placed on the path of the engine exhaust gases to act on the fuel flow rates supplied to the carburetor. To obtain low CO and HC emissions, it is necessary to operate with values of the A / C ratio of the order of 16: 1 to 18: 1 which also correspond to a low specific consumption, but do not allow to draw the maximum power from the engine and to ensure adequate ignition of the mixture when the engine temperature is low.

A lean fuel mixture is satisfactory when the engine temperature is established, its average speed and its load not too high; conversely, during the engine start-up phase, the operating conditions at high load and during acceleration requests a rich mixture proves necessary. The known electronic carburation controllers operate in a closed loop when the engine temperature is sufficiently high and the load is medium; they switch to an open loop mode during acceleration requests or high loads, so as to operate like a conventional fuel system; such a solution is far from satisfactory since one instantly loses the automatic correction made by the closed loop controller.

In order to remedy the defect in the aforementioned carburetor controllers, it has been proposed, in FR-A-2,389,770, an analog type controller comprising storage means making it possible to store the value. adjusting the carburetor in a closed loop, and then adjusting the carburetor, in an open loop, from this stored adjustment value increased by a quantity depending on the engine temperature.

The object of the invention is a digital electronic controller for regulating the air fuel ratio (A / C) of the mixture supplied to an internal combustion engine, this engine having: a fuel supply device, the flow rate of which can be regulated by at least one solenoid valve operating according to an "all or nothing"cycle; sensors for measuring engine operating conditions, and an oxygen sensor which is placed in the path of the burnt gases; this electronic controller comprises: a clock signal generator which supplies sequencing signals and a synchronous signal at the frequency of the cycle of the solenoid valve; a closed loop circuit of the proportional-integral type with variable gain, which loop circuit is connected between the oxygen sensor and the solenoid valve and it comprises, connected in series: a level comparator with two output states which provides a signal loop error, a digital integrator having a reset input and a gain control input which receives a measurement signal representative of the motor rotation speed, a first digital modulator of the opening duty cycle (RCO) of the solenoid valve having a control input connected to the loop error signal, and a multiplexer allowing open the closed loop circuit and enter an open loop adjustment signal, this multiplexer having at least one control input which is connected to a logic control circuit sensitive to signals for measuring the operating conditions of the motor and selecting the closed loop or open loop operating mode; and in that an open loop regulation circuit is connected between the digital integrator and another input of the multiplexer and comprises a digital memory having means for filtering and copying the content of the digital integrator, this digital memory being connected to a second digital modulator having a control input connected to a second digital modulator having a control input connected to a measurement signal, such as a motor temperature measurement signal and the output of this digital modulator also being connected to the reset input of the digital integrator.

A particular embodiment of the invention is an electronic controller of the digital type in which the digital integrator comprises means making it possible to lock the latter at the extreme limits.

Another particular embodiment of the invention is an electronic controller of the digital type in which the digital integrator comprises means for forcing the directions of counting.

Another particular embodiment of the invention is an electronic controller of the digital type comprising a digital modulator of the opening / closing cycle whose sensitivity, or scale factor, can be multiplied as a function of the magnitude of a parameter. of the engine, such as temperature or engine speed.

The invention also relates to an internal combustion engine comprising a digital electronic controller having the characteristics listed above and making it possible to regulate the ratio of the air / fuel mixture admitted into the cylinders of this engine.

Other characteristics will appear in the detailed description which follows, made with reference to the appended drawings which represent an embodiment of a controller according to the invention; on these drawings:

• FIG. 1 represents the relative proportions of the main constituents of the exhaust gases as a function of the A / C ratio of the fuel mixture,
• FIG. 2 represents, in the form of a block diagram, a carburetion system for an internal combustion engine equipped with an electronically regulated carburetor,
• FIG. 3a represents, in a sectional view, an oxygen sensor of a known type,
• FIG. 3b represents the characteristic of the output voltage of an oxygen sensor as shown in FIG. 3a,
• FIG. 4 represents, in the form of a simplified diagram, a carburetor of the COMPOUND type,
• FIG. 5a represents, in the form of a diagram, the different temperature zones of the engine,
• FIG. 5b represents, in the form of a table, the different engine load zones,
• FIG. 6 represents, in the form of a block diagram, the basic structure of an electronic carburetion controller according to the invention,
• FIG. 7a represents, in the form of chronograms, the waveforms of the clock signals H _o and H _e ,
• FIG. 7b represents, in the form of a timing diagram, the waveform of the output signal Cλ opposite the signal M (λ),
• FIG. 7c represents a timing diagram of the output signals R (λ) or R (8) or R (N) of the digital duration modulators,
• FIG. 7d represents a timing diagram of the value of the RCO of the output signal R (À) opposite the output signal CÀ of the level comparator,
• FIG. 8a represents, in the form of a block diagram, an embodiment of the A / D converter providing a digital signal representative of the speed of rotation of the motor,
• FIG. 8b represents the conversion characteristic of the A / D converter of the speed of rotation of the motor,
• FIG. 9 represents, in the form of a block diagram, an embodiment of the logic circuit for controlling the operating modes of the controller,
• FIG. 10 represents, in the form of a block diagram, an embodiment of the circuit for processing the signals MSW-A and MSW-B,
• FIG. 11 represents, in the form of a block diagram, an embodiment of the circuit for producing signals representing the temperature ranges of the engine water,
• FIG. 12a represents, in the form of an electrical diagram, an embodiment of the circuit for processing the output signal V _Bc of the engine ignition key,
• FIG. 12b represents the timing diagrams of the main signals associated with the processing circuit of FIG. 12a,
• FIG. 13a represents, in the form of a block diagram, an embodiment of the multiplexer and of the logic circuits associated with the control amplifiers of the solenoid valves,
• FIG. 13b represents, in tabular form, the connections between the inputs and outputs of the multiplexer,
• - Figure 14 shows, in the form of a block diagram, an embodiment a control amplifier for a solenoid valve,
• FIG. 15 represents, in the form of a block diagram, an embodiment of the digital integrator,
• FIG. 16a represents, in the form of a block diagram, the basic structure of a digital duration modulator,
• FIG. 16b represents the timing diagrams of the main signals associated with the digital modulator of FIG. 16a,
• FIG. 17a represents, in the form of a block diagram, an embodiment of the duration modulator providing the signal R (λ),
• FIG. 17b represents the timing diagrams of the main signals associated with the modulator of FIG. 17a,
• FIG. 18 represents, in the form of a block diagram, an embodiment of the duration modulator providing the signal R (θ),
• FIG. 19 represents, in the form of a block diagram, an embodiment of the duration modulator supplying the signal R (N),
• FIG. 20a represents, in the form of a block diagram, an embodiment of the digital memory,
• FIG. 20b represents, in the form of an electrical diagram, an embodiment of the circuit supplying the signal INIT.EN authorizing the initialization of the digital memory,
• FIG. 21 represents, in a block diagram, an embodiment of the upper stop circuit,
• FIG. 22 represents, in a block diagram, an embodiment of the lower stop circuit,
• FIG. 23 represents, in a block diagram, an embodiment of the asymmetry circuit of the loop,
• - Figure 24 shows, in a block diagram, an embodiment of the depletion delay circuit.

The controller which will now be described in detail belongs to the class of proportional-integral servomechanisms of variable delay, this delay resulting from the delay between the instant of admission of the fuel mixture and the instant of exhaust of the mixture. burned, this delay being inversely proportional to the engine speed.

• - un bloc moteur 1, comportant notamment: le collecteur d'admission 2 du mélange carburé, le collecteur d'échappement des gaz brûles et, généralement, des senseurs de température de l'eau de refroidissement et de l'huile de lubrification, ces senseurs de température n'étant pas représentés sur cette figure,
• - un carburateur 4, muni de ses accessoires tels que la filtre à air, la pompe d'alimentation en carburant, etc., ce carburateur, qui peut être d'un type connu, comporte des moyens électromécaniques, identifiés par la référence E.Vs permettant de faire varier le débit des fluides; par exemple, ces moyens électromécaniques peuvent être constitués par des électrovannes opérant avantageusement selon un mode "tout ou rien". Il peut comporter aussi des senseurs de pression permettant de connaître les grandeurs de la dépression dans les tubulures d'admission, ces grandeurs étant représentatives de la charge du moteur,
• - un senseur d'oxygène 5, appelé couramment sonde À (lambda), cette sonde est disposée directement sur la tubulure d'échappement 3a qui fait suite au collecteur d'échappement 3; elle fournit un signal de sortie Vλ représentatif du rapport A/C du mélange carburé,
• - un contrôleur électronique 6, qui peut opérer sur divers modes de fonctionnement, notamment un mode de régulation en boucle fermée, un mode de commande en boucle ouverte et, éventuellement, un mode hybride de régulation/commande, ces modes de fonctionnement étant régis par les conditions d'utilisation du moteur. Le contrôleur reçoit, d'une part, sur la liaison 7f, le signal d'entrée Vλ fourni par la sonde à oxygène 5, les signaux fournis par les différents senseurs du moteur, par exemple: sur les liaisons 7a et 7b, des signaux fournis par les senseurs de pression; sur la liaison 7c, un signal fourni par le senseur de température de l'eau de refroidissement, sur la liaison 7d, un signal fourni par le senseur de température de l'huile de lubrification, sur la liaison 7e, un signal représentatif de la vitesse de rotation du moteur et, d'autre part, de la source d'énergie électrique des véhicules, directement sur la liaison 7g, une tension V_B et, indirectement sur la liaison 7h, à travers un interrupteur 8, ou clé de contact, une tension V_BC: le contrôleur délivre sur la liaison 9, des signaux électriques de commande des électrovannes EV_s,
• - un ou des convertisseurs 10, catalytiques ou non, disposés en série avec la tubulure d'échappement 3a, la fonction de ces convertisseurs étant de compléter l'action du contrôleur, afin de réduire les niveaux d'émission des agents nocifs aux valeurs extrêmement faibles imposées par les Normes d'antipollution considérées.

FIG. 2 represents, in the form of a block diagram, a fuel system for an internal combustion engine equipped with an electronically regulated carburetor; this system includes the following elements:

• an engine block 1, comprising in particular: the intake manifold 2 of the fuel mixture, the exhaust manifold of the burnt gases and, generally, temperature sensors of the cooling water and of the lubricating oil, these temperature sensors not shown in this figure,
• a carburetor 4, fitted with its accessories such as the air filter, the fuel supply pump, etc., this carburetor, which may be of a known type, includes electromechanical means, identified by the reference E. Vs making it possible to vary the flow rate of the fluids; for example, these electromechanical means can be constituted by solenoid valves operating advantageously in an "all or nothing" mode. It can also include pressure sensors making it possible to know the magnitudes of the vacuum in the intake pipes, these magnitudes being representative of the engine load,
• - an oxygen sensor 5, commonly called probe A (lambda), this probe is arranged directly on the exhaust pipe 3a which follows the exhaust manifold 3; it provides an output signal Vλ representative of the A / C ratio of the fuel mixture,
• - an electronic controller 6, which can operate on various operating modes, in particular a closed loop regulation mode, an open loop control mode and, optionally, a hybrid regulation / control mode, these operating modes being governed by engine operating conditions. The controller receives, on the one hand, on the link 7f, the input signal Vλ supplied by the oxygen sensor 5, the signals supplied by the various sensors of the engine, for example: on the links 7a and 7b, signals supplied by pressure sensors; on link 7c, a signal supplied by the cooling water temperature sensor, on link 7d, a signal supplied by the lubricating oil temperature sensor, on link 7e, a signal representative of the speed of rotation of the engine and, on the other hand, of the source of electrical energy of the vehicles, directly on the link 7g, a voltage V _B and, indirectly on the link 7h, through a switch 8, or ignition key , a voltage V _BC : the controller delivers on the link 9, electrical signals for controlling the solenoid valves EV _s ,
• - one or more converters 10, catalytic or not, arranged in series with the exhaust pipe 3a, the function of these converters being to supplement the action of the controller, in order to reduce the emission levels of harmful agents to extremely high values low imposed by the emission standards considered.

FIG. 3a represents, in a sectional view, an oxygen probe of a known type, this probe comprises an active element 5a made of Zirconium dioxide Z ₁ 0 ₂ whose faces 5b, internal and external are coated with a film of platinum. This active element is protected from direct abrasion of exhaust gases by a cover external 5C provided with openings allowing gases. exhaust to reach the sensitive part. When the active element is brought to a sufficient temperature, the zirconium dioxide and the platinum act as an electrochemical cell; the internal impedance, the output voltage Vλ and the response time of this cell are a function of the temperature.

FIG. 3b represents the characteristic output voltage Vλ / A / C ratio of the mixture; a very low level signal Vλ is generated when the A / C ratio is poor, that is to say greater than the stoichiometric value; when the ratio A / C is rich, the signal Vλ reaches a value of the order of the sees, it is this abrupt characteristic which is exploited to maintain, in closed loop, the value of the ratio A / C in the vicinity of the stoichiometric value . With this type of probe, it is necessary to provide, in the controller, time-delay means, when the vehicle is started, until the probe has reached its operating temperature.

FIG. 4 represents, in the form of a simplified diagram, a carburetor 4 of the "COMPOUND" type, also called stepped carburetor, this carburetor comprises an air inlet 40 and an outlet 41 of the fuel mixture, between which two are arranged carburetion chambers: a first chamber 42a and a second chamber 42b inside which the butterflies 43a and 43b are mechanically coupled respectively so that, when the accelerator pedal is depressed, the butterfly 43b does not 'opens only when the butterfly 43a is almost completely open. It follows that at the start of the accelerator pedal stroke, only the first carburetion chamber will operate, then gradually the second chamber will come into action jointly with the first chamber.

The carburetion chambers are supplied with fuel by means of the various nozzles, the flow rates of which are controlled by the following solenoid valves: the EVI solenoid valves of the idle nozzles 44a and 44b, the EV2 solenoid valves of the main jets 45a and 45b, the EV3 solenoid valves of the enrichers 46a and 46b. On the other hand, an EV4 solenoid valve actuates the opener 47 of the butterfly 43a disposed in the first carburetion chamber. Finally, two vacuum sensors 48a and 48b, constituted by microswitches MSW-A and MSW-B indicate the engine load regimes.

A solenoid valve is constituted by an electromagnetic valve controlled by an electrical signal, in general one will use solenoid valves of the "open or closed" type, the open state corresponding to the absence of electric current passing through. To continuously control the flow rate of the fluid, such solenoid valves must be controlled, from periodic square signals, by their opening duty cycle (RCO), this is particularly the case for the solenoid valves EV1 and EV2, associated with the sprinklers, conversely the solenoid valves EV3 and EV4 can be controlled by continuous signals. Because the absence of current passing through a solenoid valve corresponds to a maximum fluid flow rate, it may prove necessary, in order to eliminate the self-ignition phenomenon, to provide specific means making it possible to maintain the solenoid valve in closed position, for a few seconds after opening contact 8. This consideration applies to the EV1, EV2 and EV3 solenoid valves. To this end, the controller 6 generates a suffocation signal as soon as the ignition key is turned to the off position.

Motor temperature zones

Engine temperatures are defined by the temperature of the lubricating oil and the temperature of the cooling water.

The oil temperature can be given by a thermal switch, set to a temperature θ _H , which provides an electrical signal E _H at a high level when the oil temperature is above the value θ _H and additionally at the low level. when the oil temperature is lower than the value θ _H , this electrical signal E _H is available on link 7d.

• a) très froid: inférieur à une valeur 6_F,
• b) froid: comprise entre cette valeur 8_F et une valeur supérieure 8_c,
• c) chaud: supérieure à cette valeur θ_c.

The temperature of the cooling water can be given by a temperature probe which provides an electrical signal Eg representative of the water temperature; this electrical signal is available on link 7c. Three areas of water temperature will be considered:

• a) very cold: less than 6 _F ,
• b) cold: between this value 8 _F and a higher value 8 _c ,
• c) hot: greater than this value θ _c .

We can then, considering the oil and water temperatures, define three engine temperature zones, illustrated in FIG. 5a:

When the engine temperature is in zone 1, the controller always operates in open loop; when the engine temperature is in zone 3, the controller is authorized to operate in a closed loop.

Motor load zones

The motor load is indicated by the state of the microswitches MSW-A and MSW.B associated respectively with the first and second carburetion chambers. We can then, by considering the states of these two microswitches, define four motor load zones:

illustrated in Figure 5b. Controller structure

FIG. 6 represents, in the form of a block diagram, the basic structure of an electronic carburetion controller 6.

• - un comparateur de niveau 11, avantageusement du type type à hystérésis, qui comporte: une première entrée qui reçoit le signal de sortie VA fourni par la sonde À 5 placée sur le trajet d'échappement des gaz brûlés, et une seconde entrée reliée à une source de tension continue fixe Va; ce comparateur délivre un signal de sortie Cλ à deux états: un état au niveau haut lorsque le rapport A/C est pauvre et un état au niveau bas lorsque le rapport A/C est riche,
• - un premier convertisseur analogique/ numérique (A/N) 12; l'entrée de ce convertisseur reçoit, par la liaison 7C, un signal électrique continu E_E représentatif de la température 8 de l'eau de refroidissement du moteur, ce convertisseur 12 délivre sur une ligne omnibus B1 (bus en abrégé) une donnée numérique représentative de la température de l'eau du moteur,
• - un second convertisseur A/N 13, l'entrée de ce convertisseur reçoit un signal EN en impulsions, dont la fréquence de récurrence est proportionnelle à la vitesse de rotation N du moteur, ce convertisseur délivre, sur un bus B2, une donnée numérique représentative de la vitesse de rotation N du moteur,
• - un générateur 14 de signaux d'horloge, ce générateur incluant: une horloge pilote, des circuits diviseurs de fréquence et un moyen d'interruption de l'horloge pilote, ce générateur délivre deux signaux d'horloge de base: un signal d'horloge Ho de fréquence Fo et un signal d'horloge Hc de fréquence Fc correspondant à la fréquence de cycle des électrovannes EV1 et EV2 et des signaux d'horloge H_i à H_n à fréquence intermédiaire entre les fréquences extrêmes Fo et Fc,
• - un intégrateur numérique 15, cet intégrateur incluant un compteur programmable du type direct/inverse, incrémenté par un signal d'horloge Ho, des moyens de commande de la direction de comptage, reliés notamment à la sortie du comparateur 11, des moyens de réinitialisation; des moyens permettant de modifier le gain de boucle intégral en fonction de la vitesse de rotation du moteur, ces moyens étant contrôlés par le signal numérique disponible sur le bus B2,
• - un premier modulateur numérique 16 de durée relié au bus B3, ce modulateur incluant deux compteurs programmables du type inverse, des moyens permettant d'introduire le terme de gain proportionnel, ce modulateur élabore un signal carré de sortie R (À) de fréquence de récurrence F_e permettant de commander le RCO des électrovannes EV1 et EV2 en boucle fermée; il reçoit les signaux d'horloge H_o et H_c,
• - une mémoire numérique 17, reliée au bus B3, cette mémoire élabore et stocke une donnée numérique M (λ) correspondant à la version filtrée de la 'donnée numérique M (λ); cette opération de recopie du contenu de l'intégrateur numérique 15 n'est autorisée que lorsque le système de carburation opère en boucle fermée et que le moteur fonctionne avec une charge moyenne; à cet effet, cette mémoire numérique reçoit un signal RECOP.EN autorisant l'opération de recopie: cette mémoire numérique comporte un moyen d'initialisation à une valeur déterminée, la vitesse de recopie est fixée par la fréquence d'un signal d'horloge H_R; la donnée numérique de sortie M (λ) est transmise sur un bus B4,
• - un second modulateur numérique 18 de durée relié au bus B4, ce modulateur incluant un compteur programmable du type inverse et un moyen permettant implicitement de multiplier la donnée numérique M (λ) par un facteur fonction de la température 8 de l'eau de refroidissement du moteur, ce modulateur élabore un signal carré de sortie R (8) de fréquence de récurrence F_c permettant de commander de RCO des électrovannes EV1 et EV2 en boucle ouverte, il reçoit les signaux d'horloge H_e et H, et, par le bus B1, la donnée numérique correspondant à la température de l'eau de refroidissement du moteur, le signal de sortie R (θ) est, d'autre part, utilisé pour réinitialiser l'intégrateur numérique 15,
• - un troisième modulateur numérique 19 de durée relié au bus B4, ce modulateur incluant un compteur programmable du type inverse et un moyen permettant implicitement de multiplier la donnée numérique M (λ) par un facteur fonction de la vitesse de rotation N du moteur, ce modulateur élabore un signal carré de sortie R (N) de fréquence de récurrence F_e permettant de commander le RCO des électrovannes EV1 et EV2 en boucle ouverte et lorsque la charge du moteur est maximale,
• -un multiplexeur 20, ce multiplexeur comportant trois entrées reliées respectivement aux modulateurs de durée 16, 18 et 19, deux entrées de commande A et B et deux sorties W et Z reliées respectivement aux amplificateurs 21 et 22 de commande des électrovannes EV1 et EV2,
• - un premier amplificateur 21 de commande d'électrovanne, cet amplificateur du type "tout ou rien" comportant une première entrée reliée à la sortie W du multiplexeur 20 et une seconde entrée qui reçoit le signal ETFF.EN permettant l'étouffement du moteur lors de l'ouverture de la clé de contact 8,
• - un second amplificateur 22 de commande d'électrovanne identique au précédent, ce second amplificateur comportant une première entrée reliée à la sortie Z du multiplexeur 20 et une seconde entrée qui reçoit le signal ETFF.EN,
• - un troisième amplificateur 24 de commande d'électrovanne, cet amplificateur; identique au précédent, comportant une première entrée reliée à la sortie du comparateur de niveau 11 et une seconde entrée qui reçoit le signal ETFF.EN, la sortie de cet amplificateur étant reliée à l'électrovanne EV3 d'enrichissement,
• - un quatrième amplificateur 25 de commande d'électrovanne, cet amplificateur, identique au précédent, comportant une première entrée reliée, à travers un comparateur numérique 26, au bus B2 de liaison avec le convertisseur A/N 13 qui fournit la vitesse de rotation N du moteur sous la forme d'un signal numérique,
• - un circuit logique de contrôle 23 des modes de fonctionnement des circuits inclus dans le contrôleur, les entrées de ce circuit logique sont connectées aux liaisons 7a, 7b, 7c, 7d, 7e et 7h déjà décrites précédemment, ce contrôleur fournit les signaux suivants: les signaux CMD.1 et CMD.2 de commande du multiplexeur 20, le signal ETFF.EN, un signal REINT.EN autorisant la réinitialisation de l'intégrateur numérique 15, un signal RECOP.EN autorisant l'opération de recopie de la mémoire numérique 17 et un signal V_BCR permettant d'interrompre les signaux d'horloge et d'interdire le passage d'un courant dans les différentes électrovannes un court instant après l'ouverture de la clé de contact 8,
• - une alimentation stabilisée 27, du type à diode Zener, reliée en permanence à la source d'alimentation électrique V_B du véhicule, cette alimentation fournissant une tension continue stabilisée V_cc.

In what follows, it will be assumed that this controller operates from a λ probe, as described in FIG. 3a and that it is associated with a carburetor of the type illustrated in FIG. 4. This controller comprises the following elements:

• a level 11 comparator, advantageously of the hysteresis type, which comprises: a first input which receives the output signal VA supplied by the probe A 5 placed on the exhaust path of the burnt gases, and a second input connected to a fixed DC voltage source Va; this comparator delivers an output signal Cλ with two states: a state at the high level when the A / C ratio is poor and a state at the low level when the A / C ratio is rich,
• - a first analog / digital converter (A / D) 12; the input of this converter receives, via the link 7C, a continuous electrical signal E _E representative of the temperature 8 of the engine cooling water, this converter 12 delivers digital data on an omnibus line B1 (bus for short) representative of the engine water temperature,
• a second A / D converter 13, the input of this converter receives an EN signal in pulses, the recurrence frequency of which is proportional to the rotation speed N of the motor, this converter delivers digital data on a bus B2 representative of the engine speed N,
• a generator 14 of clock signals, this generator including: a pilot clock, frequency dividing circuits and a means of interrupting the pilot clock, this generator delivers two basic clock signals: a signal clock Ho of frequency Fo and a clock signal Hc of frequency Fc corresponding to the cycle frequency of the solenoid valves EV1 and EV2 and clock signals H _i to H _n at intermediate frequency between the extreme frequencies Fo and Fc,
• a digital integrator 15, this integrator including a programmable counter of the direct / reverse type, incremented by a clock signal Ho, means for controlling the counting direction, connected in particular to the output of the comparator 11, reset means ; means making it possible to modify the integral loop gain as a function of the speed of rotation of the motor, these means being controlled by the digital signal available on the bus B2,
• a first digital modulator 16 of duration connected to the bus B3, this modulator including two programmable counters of the inverse type, means making it possible to introduce the term of proportional gain, this modulator elaborates a square output signal R (λ) of frequency recurrence F _e for controlling the RCO of the solenoid valves EV1 and EV2 in a closed loop; it receives the clock signals H _o and H _c ,
• - a digital memory 17, connected to the bus B3, this memory develops and stores digital data M (λ) corresponding to the filtered version of the 'digital data M (λ); this operation of copying the content of the digital integrator 15 is only authorized when the fuel system operates in a closed loop and the engine is operating with an average load; for this purpose, this digital memory receives a RECOP.EN signal authorizing the copy operation: this digital memory includes an initialization means at a determined value, the copy speed is fixed by the frequency of a clock signal H _R ; the digital output data M (λ) is transmitted on a bus B4,
• a second digital modulator 18 of duration connected to the bus B4, this modulator including a programmable counter of the inverse type and a means implicitly making it possible to multiply the digital data M (λ) by a factor depending on the temperature 8 of the cooling water of the motor, this modulator develops a square output signal R (8) with a recurrence frequency F _c making it possible to control from RCO of the solenoid valves EV1 and EV2 in open loop, it receives the clock signals H _e and H, and, by the bus B1, the digital data corresponding to the temperature of the engine cooling water, the output signal R (θ) is, on the other hand, used to reset the digital integrator 15,
• a third digital modulator 19 of duration connected to the bus B4, this modulator including a programmable counter of the inverse type and a means implicitly making it possible to multiply the digital data M (λ) by a factor depending on the rotation speed N of the motor, this modulator develops a square output signal R (N) with a recurrence frequency F _e enabling the RCO of the solenoid valves EV1 and EV2 to be controlled in open loop and when the motor load is maximum,
• a multiplexer 20, this multiplexer comprising three inputs connected respectively to the duration modulators 16, 18 and 19, two control inputs A and B and two outputs W and Z connected respectively to the amplifiers 21 and 22 for controlling the solenoid valves EV1 and EV2,
• a first amplifier 21 for controlling the solenoid valve, this "all or nothing" type amplifier comprising a first input connected to the output W of the multiplexer 20 and a second input which receives the signal ETFF.EN allowing the engine to be stifled during the opening of the ignition key 8,
• - a second amplifier 22 for solenoid valve control identical to the previous one, this second amplifier comprising a first input connected to the output Z of the multi plexer 20 and a second input which receives the signal ETFF.EN,
• a third amplifier 24 for controlling the solenoid valve, this amplifier; identical to the previous one, comprising a first input connected to the output of the level comparator 11 and a second input which receives the signal ETFF.EN, the output of this amplifier being connected to the enrichment solenoid valve EV3,
• a fourth amplifier 25 for controlling the solenoid valve, this amplifier, identical to the previous one, comprising a first input connected, through a digital comparator 26, to the bus B2 for connection with the A / D converter 13 which supplies the speed of rotation N of the motor in the form of a digital signal,
• a logic control circuit 23 of the operating modes of the circuits included in the controller, the inputs of this logic circuit are connected to the links 7a, 7b, 7c, 7d, 7e and 7h already described above, this controller provides the following signals: the signals CMD.1 and CMD.2 for controlling the multiplexer 20, the signal ETFF.EN, a signal REINT.EN authorizing the reinitialization of the digital integrator 15, a signal RECOP.EN authorizing the memory copying operation digital 17 and a signal V _BCR making it possible to interrupt the clock signals and to prohibit the passage of a current in the various solenoid valves a short instant after the opening of the ignition key 8,
• a stabilized power supply 27, of the Zener diode type, permanently connected to the source of electrical power V _B of the vehicle, this power supply providing a stabilized direct voltage V _cc .

This controller can be built from digital circuits, advantageously made using C-MOS (Oxide-Metal-Semiconductor-Complementary) technology, so the controller can be kept permanently on, provided that the pilot clock is interrupted of the generator 14 of the clock signals and of prohibiting the passage of a current through the control amplifiers of the solenoid valves, during periods of engine shutdown; for this purpose, one can use the information provided by the output signal V _BC of the ignition key 8 of the vehicle.

FIG. 7a represents, in the form of chronograms, the waveforms of the clock signals Ho and Hc supplied by the clock signal generator 14. In fact, the clock signal H _r of frequency F _c is available in three forms: a clock signal H _c1 whose duration is equal to three clock steps H _o , intended, in particular, to stabilize the internal data of the controller, a clock signal H _c2 positioned inside of the signal H _c1 intended, in particular, to transfer, sample, store, certain internal data, a clock signal H _c3 , positioned outside the clock signal H _c1 , intended, in particular, for resetting the contents of certain counters. The value d ₆ the frequency F _e of the clock signals H _e can be of the order of ten Hz, the value of the frequency F. of the clock signal H _o being equal to 2 ⁿ .F _c , where the exponent, n, determines the accuracy, or resolution, of the closed loop controller. This generator 14 can supply different clock signals H _i to H _n at intermediate frequencies between the extreme values F _o and F _c .

FIG. 7b represents, in the form of chronograms, the waveform of the output signal Cλ of the level comparator 11, opposite the output signal M (À) of the digital integrator 15. The waveform of the signal Cλ is idealized, in the sense that it constitutes an error signal and that then the period of the slots is random; the state at the high level of the signal CA corresponds to a lean fuel mixture, therefore to an enrichment order. The signal M (λ) oscillates around an average value indicated by a dotted line, a positive slope corresponds to an enrichment of the fuel mixture, conversely a negative slope corresponds to an impoverishment of this mixture. The digital value of the signal M (λ) can be between the extreme values zero 25 2 ⁿ -1.

FIG. 7c represents, in the form of a timing diagram, the waveform of the output signals R (λ), R (8) and R (N) of the digital modulators of duration 16, 18 and 19. The period of these signals is T _c = 1 / F _c , these signals are at the high level for a time T _on corresponding to the period of opening of the valves of the solenoid valves and at the low level B for a time T _off corresponding to the time for closing the valves solenoid valves; the opening cyclic ratio (RCO) of the solenoid valves is given by the following relationship:

FIG. 7d represents, in the form of a timing diagram, the value of the RCO of the output signal R (À) of the duration modulator 15, opposite the output signal Ci of the level comparator 11.

Converter 13

• - un moyen de mesure de la période de rotation du moteur, comprenant, connectés en série: un circuit d'horloge 131, une porte logique 132 du type ET, reliée à l'entrée d'horloge CK d'un compteur numérique du type direct 133,
• - un registre mémoire 134 de stockage du contenu du compteur numérique précédent,
• - une mémoire morte (ROM) 135.

Figure 8a shows, in the form of a block diagram, an embodiment of the A / D converter 13 shown in Figure 6; this A / D converter converts the engine speed information, available in the form of a frequency, into digital data adapted to the controller. The engine speed information can be provided by the electrical signal from the ignition coil or any other equivalent known means, this converter must provide digital output data between a lower speed N _i and a speed upper N _s . To this end, it includes the following elements connected in series:

• a means for measuring the period of rotation of the motor, comprising, connected in series: a clock circuit 131, a logic gate 132 of the AND type, connected to the clock input CK of a digital counter of the type direct 133,
• a memory register 134 for storing the content of the previous digital counter,
• - a read only memory (ROM) 135.

The input signal EN available on the link 7e, possibly via a frequency divider circuit 136, cyclically loads the content of the counter 133 in the memory register 134 which has a loading input L then reposition at zero the content of this counter which includes a reset input CLR. The overflow output Co of the counter 133 is connected to a second input of the gate 132.

FIG. 8b represents, by way of example, the conversion characteristic of this 13 A / D converter, the digital output data is available on four bits, for example on the bus B2, below a lower speed of rotation N and beyond a higher speed of rotation N _s , this data is constant; in the range of rotational speeds between the values N and N _s , this digital output data varies linearly in steps.

Control logic circuit 23

• - un circuit 230 de traitement des signaux électriques fournis par les microrupteurs MSW-A et MSW-B, ce circuit élabore: un signal IMP.RALNT en impulsions, indiquant que le moteur quitte la zone A correspondant au régime de ralenti, un signal MS-A correspondant au signal MSW.A échantillonné par le signal d'horloge H_C2 et un signal M.S-B correspondant au signal MSW-B échantillonné par le signal d'horloge H_e2,
• - un circuit 231 permettant d'élaborer deux signaux électriques représentatifs de la plage de température de l'eau de refroidissement du moteur: un premier signal V_E1 correspondant à une plage de température inférieure ou supérieure à la valeur θ_F déjà définie, et un second signal V₁₂ correspondant à une plage de température inférieure ou supérieure à une valeur θ_c déjà définie,
• - un circuit 232 de traitement du signal de sortie V_Bc de la clé de contact 8, ce circuit est connecté à la liaison 7h qui porte l'information V_BC correspondant à la tension V_B, de la source d'énergie du véhicule, après passage à travers la clé de contact 8; ce circuit élabore trois signaux électriques: un premier signal REG.EN qui autorise le contrôleur à opérer en boucle fermée, un second signal ETFF.EN qui permet de forcer les électrovannes EV1, EV2 et EV3 à la fermeture, durant quelques secondes après l'ouverture de la clé de contact 8 et un troisième signal V_BCR correspondant au signal V_BC régulé en niveau, ce signal V_BCR permet d'interrompre les différents signaux d'horloge et de maintenir, à l'état bloqué, les amplificateurs 21, 22, 24 et 25 de commande des électrovannes,
• - un circuit logique de combinaison 233 qui reçoit, sur ses entrées, les signaux suivants: MS-A, MS-B, V_E1, V_E2, E_H, REG.EN; ce circuit logique élabore les signaux de sortie suivants: les signaux CMD.1 et CMD.2 de commande du multiplexeur 20, le signal REINT.EN autorisant la réinitialisation du contenu de l'intégrateur numérique 15 à une valeur correspondant à la grandeur du signal R (8), le signal RECOP.EN autorisant la recopie de la donnée numérique M (À) par la mémoire numérique 17 et un signal auxiliaire FRC.U.EN autorisant le forçage du comptage dans la direction directe de l'intégrateur numérique 15; ce circuit logique comprend des registres mémoires de sortie chargés par le signal d'horloge H_c2.

FIG. 9 represents, in the form of a block diagram, an embodiment of the logic control circuit, of the operating modes of the circuits of the controller, this control circuit comprises the following elements:

• a circuit 230 for processing the electrical signals supplied by the microswitches MSW-A and MSW-B, this circuit produces: an IMP.RALNT signal in pulses, indicating that the motor leaves zone A corresponding to the idling speed, a signal MS -A corresponding to the signal MSW.A sampled by the clock signal H _C2 and a signal MS-B corresponding to the signal MSW-B sampled by the clock signal H _e2 ,
• a circuit 231 making it possible to develop two electrical signals representative of the temperature range of the engine cooling water: a first signal V _E1 corresponding to a temperature range lower or higher than the value θ _F already defined, and a second signal V ₁₂ corresponding to a temperature range lower or higher than a value θ _c already defined,
• a circuit 232 for processing the output signal V _Bc of the ignition key 8, this circuit is connected to the link 7h which carries the information V _BC corresponding to the voltage V _B , of the energy source of the vehicle, after passing through the ignition key 8; this circuit generates three electrical signals: a first REG.EN signal which authorizes the controller to operate in a closed loop, a second ETFF.EN signal which allows the solenoid valves EV1, EV2 and EV3 to be forced to close, for a few seconds after the opening of the ignition key 8 and a third signal V _BCR corresponding to the signal V _BC regulated in level, this signal V _BCR makes it possible to interrupt the various clock signals and to maintain, in the blocked state, the amplifiers 21, 22, 24 and 25 for controlling the solenoid valves,
• - a combination logic circuit 233 which receives, on its inputs, the following signals: MS-A, MS-B, V _E1 , V _E2 , E _H , REG.EN; this logic circuit generates the following output signals: the signals CMD.1 and CMD.2 for controlling the multiplexer 20, the signal REINT.EN authorizing the reinitialization of the content of the digital integrator 15 to a value corresponding to the magnitude of the signal R (8), the signal RECOP.EN authorizing the copying of the digital data M (À) by the digital memory 17 and an auxiliary signal FRC.U.EN authorizing the forcing of the counting in the direct direction of the digital integrator 15 ; this logic circuit includes output memory registers loaded by the clock signal H _c2 .

• - un circuit permettant d'élaborer un signal RALNT indiquant que le moteur fonctionne dans un régime de ralenti, ce circuit incluant les bascules 234a et 234b du type D, un inverseur 235 relié à l'entrée D de la bascule 234a et une porte logique 236 du type NON-ET, les entrées de cette porte étant reliées aux sorties Q des bascules,
• - un circuit permettant de détecter le passage du régime de ralenti aux régimes de charge supérieure, ce circuit incluant une bascule 237 du type D et une porte logique 238 du type NON-OU reliée à l'entrée PR de positionnement au niveau haut de la bascule 237; l'entrée D de la bascule 237 est placée au niveau bas et l'entrée CK est reliée à la porte 236, la sortie Q est reliée à une première entrée de la porte 238.

FIG. 10 represents, in the form of a block diagram, an embodiment of the circuit 230 for processing the signals MSW.A and MSW.B representative of the load of the motor; this circuit includes the following elements:

• a circuit making it possible to develop a RALNT signal indicating that the engine is operating in an idle speed, this circuit including flip-flops 234a and 234b of type D, an inverter 235 connected to the input D of flip-flop 234a and a logic gate 236 of the NAND type, the inputs of this gate being connected to the outputs Q of the flip-flops,
• a circuit making it possible to detect the transition from the idle speed to the higher load modes, this circuit including a flip-flop 237 of type D and a logic gate 238 of the NOR type connected to the input PR for positioning at the high level of the latch 237; the input D of the flip-flop 237 is placed at the low level and the input CK is connected to the gate 236, the output Q is connected to a first input of the gate 238.

At the start of each solenoid valve operating cycle, the leading edge of the clock signal H _c2 samples the state of the signals MSW-A and MSW-B, and the resulting sampled signals MS-A and MS-B are available respectively on the Q outputs of flip-flops 234a and 234b, the RALNT signal is at a low level during the engine idling speed, when the engine leaves this idling speed, the rising transition of this RALNT signal samples input D of flip-flop 237, which has the effect of positioning the output Q of this flip-flop at the low level, the trailing edge of the clock signal H _c2 via the gate 238 then reposition this output Q at the high level; this results in an impulse output signal IMP.RALNT lasting half a step from the basic clock, when the engine leaves idle speed.

FIG. 11 represents, in the form of a block diagram, the circuit 231 making it possible to develop the signals representative of the temperature ranges of the engine cooling water; this circuit essentially comprises two voltage comparators: a first voltage comparator 231a and a second voltage comparator 231b; the first inputs of these comparators receive, via the link 7C, the signal E _E representative of the water temperature, the second input of the comparator 231 a is connected to a reference voltage source V _R1 and the second input of the comparator 231 b is connected to a reference voltage source V _R2 different from V _R1 . The comparator 231a delivers an output signal V _E , at the high level, for example, when the water temperature is greater than a value θ _F and the comparator 231b delivers an output signal V _E2 at the level, for example, when the water temperature is greater than a value θ _c where the value of O _c is greater than the value 8 _F.

• - une cellule de régulation de la tension V_BC, constituée par la résistance série R1, la diode Zener D1 shuntée par la capacité C1, cette cellule délivre un signal de sortie V_BCR,
• - deux cellules de retard unidirectionnelle: une première cellule directe constituée par la diode D2, la résistance R2 et la capacité C2, et une seconde cellule inverse constituée par la diode D3, la résistance R3 et la capacité C2,
• - une porte logique 232a du type ET, dont une première entrée est reliée, par l'intermédiaire d'un inverseur 232b, à la tension V_BCR et la seconde entrée est reliée à la capacité C2; cette porte délivre un signal de sortie ETFF.EN.

FIG. 12a represents, in the form of an electrical diagram, an embodiment of the signal processing circuit V _BC . This circuit receives, via the link 7h, the signal V _Bc corresponding to the signal to start the engine and jointly from the controller; this circuit 232 includes the following elements:

• a voltage regulating cell V _BC , constituted by the series resistor R1, the Zener diode D1 shunted by the capacitor C1, this cell delivers an output signal V _BCR ,
• two unidirectional delay cells: a first direct cell constituted by the diode D2, the resistance R2 and the capacitor C2, and a second reverse cell constituted by the diode D3, the resistance R3 and the capacitor C2,
• a logic gate 232a of the ET type, a first input of which is connected, via an inverter 232b, to the voltage V _BCR and the second input is connected to the capacitor C2; this door delivers an ETFF.EN output signal.

FIG. 12b represents the timing diagrams of the main signals associated with the circuit of FIG. 12a. The time to corresponds to the instant of closing of the ignition key 8 of the vehicle, and to the time t, corresponds the instant of opening of this ignition key. The output signal REG.EN appears with a delay T ₁ , at the instant to, corresponding to the time constant of the cell R2.C2; the magnitude of this delay T1 is determined, in particular, by the delay in warming up the oxygen sensor 5. The signal REG.EN authorizes the controller to regulate in closed loop mode. The signal ETFF.EN appears at time t ₁ and lasts a time T ₂ fixed by the time constant R3.C3, the duration of this time T2 must be sufficient, of the order of a few seconds, so as to avoid any self-ignition phenomenon when the engine is stopped. The durations of the signals V _Bc and V _BCR are identical and equal to the duration of the closing of the ignition key 8.

Controller operating modes

The operating modes of the controller are determined by the temperature zones and the motor load zones, these modes result from the states of the output signals produced by the logic control circuit 23.

• - Phase de démarrage: le signal REG.EN est au niveau bas pendant une vingtaine de secondes,
• - Moteur froid et très froid: Zone 1 des températures.

Open loop mode:

• - Start-up phase: the REG.EN signal is at low level for about twenty seconds,
• - Cold and very cold engine: Zone 1 temperatures.

• - Moteur opérant à la charge maximale - Zone D des charges; le signal REG.EN est au niveau haut.

In these two cases, the solenoid valves are controlled by the signal R (θ), the digital memory 17 does not copy the digital data M (λ) from the digital integrator 15.

• - Engine operating at maximum load - Zone D loads; the REG.EN signal is high.

In this case, the solenoid valves EV1 and EV2 are controlled by the signal R (N), the digital memory 17 does not copy the digital data M (À) from the digital integrator 15.

Closed loop mode. - Hot engine: Zones 2 and 3 of temperatures. Idle: Zone A of the engine load.

The solenoid valves EV1 (idle nozzles) are controlled by the signal R (λ) and the solenoid valves EV2 (main jets) are controlled by the signal R (θ); the digital memory 17 does not copy the data M (À) of the digital integrator 15.

- Average load: Zone B of the engine load.

The solenoid valves EV1 and EV2 are controlled by the signal R (À), the digital memory 17 copies the digital data M (À) from the digital integrator 15.

- Heavy load: zonc C of the engine load.

The solenoid valves EV1 and EV2 are controlled by the signal R (N), the digital memory 17 does not copy the digital data M (λ) from the digital integrator 15.

Auxiliary modes

The auxiliary modes concern the electro- EV3 and EV4 valves corresponding respectively to the enricher and the carburetor opener.

When the fuel mixture is poor, the output signal CA of the comparator 11 is at the high level and through the control amplifier 24 authorizes the opening of the solenoid valve EV3.

On the other hand, when the rotation speed N of the engine exceeds a determined value, located between the limits N and N _s already defined, the solenoid valve EV4 actuates the butterfly valve opener 43a located in the first chamber of the carburetor.

Multiplexer 20

FIG. 13a represents, in the form of a block diagram, an embodiment of the multiplexer 20 and of the logic circuits associated with the control amplifiers of the solenoid valves 21, 22, 24 and 25. The multiplexer 20 is double of the type (4 inputs → 1 output), it comprises: two control inputs A and B which respectively receive the control signals CMD.1 and CMD.2 produced by the logic circuit 23, two outputs Z and W to which the input groups X correspond respectively _o at X ₃ and Y _o at Y ₃ , and finally an auxiliary control input ST, which, at the high level, makes it possible to force the outputs Z and W at the low level.

The inputs of the amplifiers 21, 22 and 24 of the solenoid valves EV1, EV2 and EV3 are respectively connected to the outputs of the logic gates 201, 202 and 203 of the "NON-OR" type, so as to ensure the suffocation function when the opening of the ignition key 8. The first input of door 201 is connected to the output W of the multiplexer 20, the first input of the door 202 is connected to the output Z of the multiplexer 20, the first input of the door 203 is connected to the exit of a door 204 of the "NON-OR"type; the second inputs of doors 201 to 203 are connected to the output of a door 205 of the "NO-OR" type. The first input of gate 204 receives the output signal Cλ from the level comparator 11, and the first input of gate 205 receives the signal V _BCR , the second inputs of gates 204 and 205 receive the signal ETFF.EN. The input of the amplifier 25 for controlling the solenoid valve EV4 is connected to the output of a door 206 of the ET type, the first input of this door receives the control signal OUVR.EN and the second input the signal V _BCR .

The connections between the inputs X, Y and the outputs Z and W of the multiplexer 20 are given in the table shown in FIG. 13b. It will be recalled that, when the input of amplifiers 21, 22, 23 and 24 is at the low level, the current passing through the solenoid valves is zero, corresponding to the opening of these solenoid valves; during the closing of the ignition key 8, the signal ETFF.EN is at the low level and the signal V _BCR is at the hat level, it follows that the output of door 205 is at low level, and that the outputs of the doors 201, 202 and 203 are at the level complementary to the level of the signals present on the first inputs of these doors. When the ignition key 8 is in the open position, the ETFF.EN signal is high for a few seconds; it follows that the outputs Z and W of the multiplexer 20 are at the low level, jointly, the signal V _SCR is at the low level, where it follows that the outputs of the gates 201 to 203 and 206 are at the high level thus ensuring the closing of the EV1, EV2 and EV3 solenoid valves and opening of the EV4 solenoid valve. When the signal ETFF.EN returns to the low level, the output of the gate 205 is at the high level and the output of the gates 201 to 203 is at the low level, from which it follows that the electrical consumption of all the control amplifiers of the solenoid valves is zero.

FIG. 14 represents, in the form of an electrical diagram, an embodiment of a control amplifier for a solenoid valve; this amplifier comprises, connected in series: a control transistor T1 and a switching transistor T2. The EV solenoid valve is connected to the collector output of the transistor T2 by a link 9; when handling this link 9, it may be accidentally short-circuited to ground, which could lead to the destruction of the amplifier. To overcome this effect, the amplifier comprises a means of protection against short-circuits of the link 9; this means comprises: a logic gate P of the AND type, the two inputs of which are shunted by a capacitor C _o , the first input of this gate receives the amplifier control signal and the second input is connected, through a resistor Ro, to the collector of the switching transistor; the elements Ro and Co constitute a high-pass network for the input signal E _; .

When the input signal EK, is at the high level, a current I _s flows through the solenoid valve EV and the collector of the switching transistor is at the high level. During an accidental short-circuit of the link 9, the collector voltage and, consequently, the second input of the AND gate are low, and thus the current I _s is interrupted. Resistors R1 and R2 determine the saturation current of transistors T1 and T2.

Digital integrator 15

FIG. 15 represents, in the form of a block diagram, an embodiment of the digital integrator, this digital integrator 15 essentially comprises a programmable counter 151 of the direct / reverse type (UP / DOWN according to Anglo-Saxon conventions) this counter comprising: a clock input CK connected to a logic gate 152 of the ET type, a counting direction input U / D connected to the output Q of a flip-flop 153 of the D type, data inputs Ao to An -1, a loading input L of the input data and of the outputs connected to a logic gate 154 of the NAND type and of the status outputs of the n flip-flops constituting a counter 151, these status outputs are gathered on the bus B3 which provides the digital data M (À), this counter also includes an overflow CO output, connected to a first input of gate 152 in order to block the content from the counter to the value 2 "-1 in the reverse count direction. The means for varying the gain of the integral loop as a function of the speed of rotation of the motor comprises a discrete frequency multiplier 156, of the BRM type, for example; data inputs M _o to M _i-1 are connected to the bus B2 which provides digital data representative of the speed of rotation of the motor, the clock input CK receives a clock signal H _o supplied by the signal generator clock 14, this multiplier delivers, on its signal output S, a clock signal H _i of frequency F _{1 as a} function of the speed of rotation of the motor, this clock signal H, is applied to a second input of the door 152, on the other hand, a third complementary input of this door receives the clock signal H _c1 allowing, at the start of a solenoid valve cycle, to stabilize for a short time the output data of the counter 151, in order to allow the transfer of this output data in the digital duration modulator 16. The flip-flop 153 comprises a data input D which receives the output signal CA from the level comparator 11, a clock input CK controlled by the clock signal H _i , two priority control inputs an input PR for positioning at the high level which receives a signal FCR.U making it possible to force the incrementation of the counter and an input CLR which receives a signal FCR.D making it possible to force the decrementation of the meter; the input PR of the flip-flop 153 is connected to a logic gate 155 of the NOR type, which receives, on a first input, a signal FCR.U.EN of authorization of forcing in the direction of direct counting and, on a second input, an INCR signal of increment order. Gate 154 has a first input which receives a signal REINT.EN authorizing the reset of the counter and a second input which receives a signal IMP.RALNT of reset command when the engine comes out of the idle speed corresponding to the zone I in Figure 5b.

The digital integrator 15 comprises a means for resetting the content of the counter 151 to the value of the RCO of the signal R (6) for controlling the solenoid valves, this resetting means including the counter 157 of the direct type and the logic gate 158 of the AND type. . The number j of flip-flops of the counter 158 can be less than the number n of flip-flops of the counter 151, in this case, the least significant data inputs A _o to 1 _i-1 , are biased at the low level and the inputs A to A _n-1 , are connected in correspondence to the state outputs P _o -P _j-1 of the counter 158 which has a clock input CK connected to the logic gate 158 and a reset CLR input which receives the signal d 'clock H _ca ; logic gate 158 has a first input which receives the output signal R (8) from the digital duration modulator 18, a second complemented input which receives the clock signal H _c1 , and a third input which receives a clock signal H ₂ of frequency Fo / 2 ^nj .

The operation of this digital integrator 15 will be described below. When the signal Cλ is at the high level corresponding to a lean fuel mixture, the output Q of the flip-flop 153 is at the high level and the counting direction of the counter 151 is direct, corresponding to an increase in the content of this counter, correlatively when the signal CÀ is at the low level, there corresponds a decrementation of the content of the counter. The connection between the CO output of the counter 151 and the first input of the door 152 allows, in the event of a fault in the probe A, for example, the stop of the counter 151 at its maximum value 2 ^n-1 corresponding to a mixture rich fuel, The content of counter 157 is reset to zero by the clock signal H _c3 , then is incremented during the time period during which the signal R (0) is high, the content of this counter 157 is transferred to the counter 151 under the action of the signal REINT.EN at the low level in the open loop regulation mode or by the signal IMP.RALNT at the low level, when the engine leaves the idle speed.

Digital modulators of duration 16, 18 and 19

• - un circuit d'horloge H_x qui fournit un signal d'horloge à une fréquence F_x, fixe ou variable,
• - une porte logique P du type ET,
• - un compteur C du type programmable inverse, ce compteur comprenant m étages de comptage et comportant: une entrée d'horloge CK, une entrée de chargement qui reçoit un signal de synchronisation S, m entrées de données recevant la donnée numérique M, une sortie d'identification CO du contenu nul de ce compteur, sur cette sortie CO est prélevé le signal de sortie E_o.

Before approaching the detailed description of the various digital duration modulators whose function is to vary the value of the RCO of the solenoid valves EV1 and EV2, reference will be made to FIG. 16a which represents the bottom structure of a circuit making it possible to modulate the duration, or width, of a pulse as a function of a digital input variable M available on m bits, such a circuit essentially comprises, connected in series:

• - a clock circuit H _x which supplies a clock signal at a frequency F _x , fixed or variable,
• - a logic gate P of type ET,
• a counter C of the inverse programmable type, this counter comprising m counting stages and comprising: a clock input CK, a loading input which receives a synchronization signal S, m data inputs receiving the digital data M, an output identification CO zero content of this counter, on this output CO the output signal E _{o is taken} .

FIG. 16b represents a chronogram of the main signals associated with the circuit of FIG. 16a which operates as follows: at times t _x , the content of the counter C is loaded at the value M, this content is then decremented at the rate of the signal d ' clock F _x , up to the zero value, the counter is then maintained at this zero value by coupling the CO output to one of the inputs of the gate P; the pulse duration of the output signal E _o is given by the following relation:

Duration modulator 16

• - un premier modulateur du durée comprenant: un compteur 161 de n bits du type programmable inverse, qui reçoit sur ses n entrées des données A_o ou A_n-_i, le signal numérique M (À) fourni par l'intégrateur 15 sur le bus B3 et une porte logique 162 du type ET,
• - un second modulateur de durée comprenant: un compteur programmable 163, de m bits du type inverse dont les m (m inférieur à n) entrées des données Ao à A_m-1 sont connectées à une source de signal numérique fixe C et une porte logique 164 du type ET.

The duration modulator 16 allows, when the controller operates in a closed loop, to vary the value of the RCO of the solenoid valves, this modulator 16 is represented, in the form of a block diagram, in FIG. 17a. It essentially consists of two chained duration digital modulators:

• a first duration modulator comprising: a counter 161 of n bits of the inverse programmable type, which receives on its n inputs data A _o or A _n - _i , the digital signal M (À) supplied by the integrator 15 on the bus B3 and a logic gate 162 of type ET,
• - a second duration modulator comprising: a programmable counter 163, of m bits of the inverse type whose m (m less than n) data inputs Ao to A _m-1 are connected to a fixed digital signal source C and a gate logic 164 of type ET.

The clock signal of the first digital duration modulator is the clock signal Ho of frequency Fo, while the clock signal of the second modulator is a clock signal H, of frequency F _i = F _o / 2 ^nm which can be supplied by the generator 14 of the clock signals; it will in fact be noted that the constant C which corresponds to a proportional gain factor does not need to be defined with an accuracy of n bits.

The output signals R, (À) and R ₂ (À) corresponding respectively to the first and second digital modulators are applied to the two inputs of an electronic switch 165 whose control input C receives the output signal CÀ from the comparator of level 11.

FIG. 17b represents a timing diagram of the main signals associated with the digital duration modulator of FIG. 17a. The signal Cλ is represented in an idealized form, in fact, the period of this signal is not as regular since it is supplied by the probe À which is effectively an error detector. The digital signal M (À) supplied by the digital integrator oscillates slightly around an average value due to the non-linear characteristic of the regulation loop. The RCO value of the output signal R (À) depends on the sign of the signal Cλ

Duration modulator 18

The digital duration modulator 18 allows, when the controller operates in open loop, to vary the RCO of the solenoid valves as a function of the temperature of the motor, this modulator is represented, in the form of a block diagram, in FIG. 18. It includes a single digital duration modulator and electronic means making it possible to vary the frequency of the clock signal for decrementing the content of this counter. As of now, a first ramarque is essential; the resolution or precision of this modulator does not need to be as high as that of the previous modulator, since it is used only during open loop operation of the controller.

• - un compteur 181 de m' bits, du type programmable inverse dont les m' entrées de données A_o à A_m'-1, sont connectées en correspondance aux m' bits de poids fort de la donnée numérique Ṁ (À) fourni sur le bus B4 par la mémoire numérique 17,
• - une porte logique 182 du type ET dont la sortie est reliée à l'entrée d'horloge CK du compteur 181,
• - un multiplicateur de fréquence discrète 183, par exemple, de type BRM, comportant une entrée qui reçoit un signal d'horloge à une fréquence F2=F_o/2^n-m,
• - un circuit de programme de température 184, par exemple, une mémoire morte (ROM) adressée par les données du bus B1.

The digital duration modulator 18 includes:

• - a counter 181 of m 'bits, of the inverse programmable type whose m' data inputs A _o to A _me-1 , are connected in correspondence to the m 'most significant bits of the digital data Ṁ (À) supplied on bus B4 via digital memory 17,
• a logic gate 182 of the AND type, the output of which is connected to the clock input CK of the counter 181,
• a discrete frequency multiplier 183, for example, of the BRM type, comprising an input which receives a clock signal at a frequency F2 = F _o / 2 ^nm ,
• a temperature program circuit 184, for example, a read only memory (ROM) addressed by the data of the bus B1.

avec

où Nx est la valeur numérique de la programmation des entrées de données du multiplicateur. A titre illustratif, si p le nombre de bits du multiplicateur est égal à huit, les entrées de données A_o, A₁, A₆ et A₇ positionnées au niveau haut, et les entrées des données A₂ à A5 reliées à la sortie de la mémoire de programme de température 184, le coefficient K peut être varié entre l'unité et une valeur égale à 1,3.The frequency Fx of the output signal of the multiplier 183 is given by the following relation:

with

where Nx is the numerical value for programming the data inputs of the multiplier. By way of illustration, if p the number of bits of the multiplier is equal to eight, the data inputs A _o , A ₁ , A ₆ and A ₇ positioned at the high level, and the data inputs A ₂ to A5 connected to the output from the temperature program memory 184, the coefficient K can be varied between the unit and a value equal to 1.3.

We now see, therefore, that the value of the RCO of the open loop solenoid valves is equal to the value of the RCO of the closed loop, multiplied by a factor greater than unity and a function of the temperature of the motor, consequently, in open loop, the controller will act to enrich the A / C mixture admitted into the engine cylinders.

Digital duration modulator 19

• - un compteur 191 de m' bits du type programmable inverse dont les m" entrées des données Ao à Am"-1 sont connectées aux m" bits de poids fort de la donnée numérique M/(λ) fournie sur le bus B₄ par la mémoire numérique 17,
• - une porte logique 192 du type ET dont la sortie est reliée à l'entrée d'horloge CK du compteur 191,
• - un mutiplicateur de fréquence discrète 193, par exemple du type BRM, comportant une entrée qui reçoit un signal d'horloge à une fréquence F₃=Fo/2^m-m",
• - un circuit de programmation de vitesse 194, par exemple une mémoire ROM adressée par les données du bus B₂.

The digital duration modulator 19 makes it possible, when the controller operates in open loop, to vary the RCO of the solenoid valves as a function of the speed of rotation of the motor; this modulator 19 is represented, in the form of a block diagram, in FIG. 19, its structure is identical to that of the modulator 18. It comprises the following elements:

• - a counter 191 of m 'bits of the inverse programmable type including the m "inputs of data Ao to Am "-1 are connected to the m" most significant bits of the digital data M / (λ) supplied on the bus B ₄ by the digital memory 17,
• a logic gate 192 of the AND type, the output of which is connected to the clock input CK of the counter 191,
• a discrete frequency multiplier 193, for example of the BRM type, comprising an input which receives a clock signal at a frequency F ₃ = Fo / 2 ^{mm "} ,
• a speed programming circuit 194, for example a ROM memory addressed by the data of the bus B ₂ .

All the preceding considerations relating to the modulator 18 remain valid, and in particular, the choice of the value of the parameter m ′ which imposes the resolution performance of the modulator and the programming of the inputs of the BRM.

Digital memory 17

• - un compteur 171 programmable, du type direct/inverse, comportant une entrée d'horloge CK, une entrée du sens de comptage U/D, une entrée de chargement L, des entrées de données Do à Dn-1 et des sorties des états des étages de comptage Co à Cn-1 qui fournissent, su un bus 8₄ un signal numérique M(λ) qui correspond à la valeur filtrée du signal de sortie M (λ) de l'intégrateur numérique 15,
• - un comparateur numérique 172 comportant: des premières entrées Ao à An-1 reliées en correspondance aux sorties Mo à Mn-1 du compteur 151 de l'intégrateur numérique 15, des secondes entrées Bo à Bn-1 reliées en correspondance aux sorties Co à Cn-1 du compteur 171 précédent et une sortie de comparaison indiquant si la grandeur du signal M (À) est supérieure à la grandeur du signal M/(À),
• - des moyens d'incrémentation/décrémentation du compteur 151, incluant: une bascule 173 du type D dans laquelle: l'entrée D est reliée à la sortie de comparaison du comparateur 172, la sortie Q est reliée à l'entrée U/D sens de comptage du compteur 171 et une porte 174 du type ET dont la sortie est reliée à l'entrée d'horloge CK du compteur 171.

FIG. 20a represents, in the form of a block diagram, an embodiment of the digital memory 17, this memory comprising the following elements:

• - a programmable counter 171, of the direct / reverse type, comprising a clock input CK, an input of the counting direction U / D, a loading input L, data inputs Do to Dn-1 and outputs of the states counting stages Co to Cn-1 which supply, on a bus 8 _4, a digital signal M (λ) which corresponds to the filtered value of the output signal M (λ) of the digital integrator 15,
• a digital comparator 172 comprising: first inputs Ao to An-1 connected in correspondence to the outputs Mo to Mn-1 of the counter 151 of the digital integrator 15, second inputs Bo to Bn-1 connected in correspondence to the outputs Co to Cn-1 of the preceding counter 171 and a comparison output indicating whether the magnitude of the signal M (À) is greater than the magnitude of the signal M / (À),
• - means for incrementing / decrementing the counter 151, including: a flip-flop 173 of type D in which: the input D is connected to the comparison output of comparator 172, the output Q is connected to the input U / D counting direction of counter 171 and a gate 174 of the ET type, the output of which is connected to the clock input CK of counter 171.

The speed of copying of this digital memory 15 is determined by the frequency F _R of a clock signal H _R of copying, the copying of the signal M (À) by this digital memory 15 is authorized by a signal RECOP.EN at high level; this signal being supplied by the logic circuit 23 is applied to a first input of the gate 174. The frequency F _R of the feedback clock signal H _R can be equal to the cycle frequency F _e of the solenoid valves or to a multiple of this frequency according to the desired copying speed, this signal H _R is applied to a second input of the gate 174 and through an inverter 175 to the clock input CK of the flip-flop 173.

When the controller 6 is put into service for the first time, it is necessary to initialize the content of the counter 171; for this purpose, a digital voltage source of value Mo is connected to the most significant data inputs D _i to D _n-1 and the least significant data inputs D _o to D _i-1 are connected at a low level, this digital voltage source can be constituted by a digital potentiometer supplied by the voltage source V _cc . This digital quantity Mo is loaded into the counter 171 under the action of an initialization authorization signal INIT.EN applied to the loading input L of this counter.

FIG. 20b represents, in the form of an electrical diagram, an embodiment of a circuit making it possible to develop the signal INIT.EN authorizing the initialization of the counter 171, this circuit is essentially constituted by a transistor T1, of the NPN type, supplied from the stabilized DC voltage Vcc, supplied by the power supply circuit 27, the base of this transistor T1 is connected to the voltage Vcc through a delay circuit including the resistors R3, R4 and the capacitor C2. When this transistor is energized, the voltage at the junction point of the resistor R2 and of the collector is high for a fraction of a second, due to the delay network in series with the base of the transistor, which has for effect of authorizing the change of the quantity Mo in the counter 171.

The digital memory 17 is continuously supplied by the supply voltage Vcc; after a first start of the engine, the content of this memory will be the quantity M (λ), however, in the event of accidental interruption of the supply voltage Vcc, the digital memory can be initialized again at the value Mo .

The digital memory as just described has a storage capacity of n bits, this capacity being equal to that of the digital integrator 15, this condition is absolutely not necessary the storage capacity of this memory digital is essentially determined by the number of bits m 'or m "of the digital modulators of duration 18 and 19. In order to have the maximum operating dynamics of the controller, the initial setting of the carburetor must be such that the value of the digital source Mo is equal to 2 _n-1 , in this case, the data inputs Do to D _n - ₂ are polarized at the low level and the data input D _n-1 is polarized at the high level.

• - un circuit de butée supérieure du signal R (À),
• ― un circuit de butée inférieur du signal R (λ),
• - un circuit permettant de disymétriser le gain de l'intégrateur numérique selon le signe du signal CÀ,
• - un circuit permettant d'introduire un retard à l'appauvrissement.

Additional circuits

• - an upper stop circuit of the signal R (λ),
• - a lower stop circuit of the signal R (λ),
• - a circuit allowing the gain to be asymmetrical of the digital integrator according to the sign of the signal CÀ,
• - a circuit for introducing a delay in depletion.

Upper stop circuit

FIG. 21 represents, in the form of a block diagram, an embodiment of an upper stop circuit of the signal R (A) for closed loop regulation of the solenoid valves EV1 and EV2, this circuit essentially consists of a flip-flop 28 of type D in which: the output signal R () of the duration modulator 16 is applied to the input D, the output signal R (N) of the duration modulator 19 is applied to the clock input CK and the output signal ERC.D is taken from output Q.

The signal R (À) is sampled by the signal R (N). When the duration of the signal R (λ) is greater than the duration of the signal R (N), the output signal FRC.D is at the high level; this signal is linked to the CLR input of flip-flop 153; it follows that the content of the counter 151 of the digital integrator 15 is decremented.

Lower stop circuit

FIG. 22 represents, in the form of a block diagram, an embodiment of a circuit 29 for the lower stop of the signal R (λ) for closed loop regulation of the solenoid valves EV1 and EV2.

For certain engine temperature ranges, in particular that corresponding to zone B defined at the beginning of the description, the RCO of the regulation signal R (À) must not be less than a quantity [M (λ) -ΔM] / 2 ⁿ -1, ΔM being a predetermined fixed quantity; to do this, an adder 291 is provided between the sleep weight outputs of the digital integrator 15 and the most significant inputs of the comparator 172 of the digital memory 17. neur 291 has first inputs Ao-Ap-1 connected in correspondence at the most significant bits of the bus B3 and of the second inputs Bo-Bo-1 connected to the output of a multiplexer 292 controlled by the clock signal Hc1, the first inputs Co-Cp-1 of this multiplexer are connected to the level down while the second Do-Dp-1 inputs are connected to the digital quantity ΔM. For a short time, corresponding to the duration of the clock signal H _c1 , the digital quantity ΔM is transferred to the inputs Bo-Bp-1 of the adder 291 and summed to the quantity M (λ). The comparison output of the digital comparator 172 is sampled by a flip-flop 293 of type D which receives on its clock input CK the clock signal H _c2 . The INCR output signal taken from the Q output of flip-flop 293 indicates the sign of the deviation. When the RCO value of the signal R (À) or its correspondent M (λ) is lower than the value [M (λ) -ΔM] and the engine temperature corresponds to zone B, the counter 151 is forced into the direct meaning.

Offset circuits

The characteristic (Figure 3a) output signal - A / C ratio of a probe A is abrupt and substantially centered on the stoichiometric ratio (λ = 1). The stoichiometric ratio does not always correspond to the optimal point of closed loop operation of the controller, for example, it is sometimes desirable to shift the regulation point towards lean fuel mixtures in order to reduce the specific fuel consumption or the quantities of CO and HC emitted. This offset can be obtained according to two known methods: a first method consisting in making the gain of the integral loop asymmetrical and a second method consisting in delaying the order at depletion.

Asymmetry circuit

FIG. 23 represents, in the form of a block diagram, an embodiment of a circuit 30 making it possible to carry out an asymmetrical control of the loop gain. This circuit 30 can be inserted in the bus B2, between the A / D converter 13 and the digital integrator 15. It is recalled that the gain of the integral control is proportional to the frequency of the clock signal of incrementation of the counter 151 of the digital integrator 15 and, in a practical way, by modifying the magnitude of the digital programming data of the multiplier BRM.

• - un multiplexeur double 301 dont l'entrée de commande S est reliée à la sortie du comparateur de niveau 11 qui fournit le signal Cλ, ce multiplexeur comportant deux groupes d'entrées: un premier groupe Xo-X_i-1 et X'_o-X'_i-1 programmées respectivement par les valeurs numériques A et A' et un second groupe d'entrées Yo-Y_i-1 et Y'_o-Y'_i-1 programmées respectivement par les valeurs numériques B et B', la grandeur des facteurs A-A' et B-B" étant prédéterminées; ce multiplexeur comportant deux sorties W_o-W_i-1 et Z_o-Z_i-1,
• - une mémoire morte (ROM) 302 comportant un nombre j d'entrées d'adressage à la lecture A_o-A_j-1; les entrées A_o-A_i-1 étant reliées en correspondance aux sorties W_o-W_i-1 du multiplexeur 301, et les entrées A_i-A_j-1 étant connectées en correspondance au bus B2 qui transmet une donnée numérique représentative de la vitesse de rotation du moteur, comme indiqué précédemment,
• - un additionneur numérique 303, cet additionneur comportant des premières entrées A_o-A_j-1 reliées en correspondance aux sorties Z_o-Z_i-1 du multiplexeur 301 et des secondes entrées Bo-Bi-1 reliées en correspondance aux sorties Q_o-Q_i-1 de la mémoire ROM précédente les sorties S_o-S_i-1 de cet additionneur sont reliées en correspondance aux entrées M_o-M_i-1 du multiplicateur BRM 156 de l'intégrateur numérique 15.

Circuit 30 includes the following elements:

• a double multiplexer 301, the control input S of which is connected to the output of the level comparator 11 which supplies the signal Cλ, this multiplexer comprising two groups of inputs: a first group Xo-X _i-1 and X ' _o -X ' _i-1 programmed respectively by the numerical values A and A' and a second group of inputs Yo-Y _i-1 and Y ' _o -Y' _i-1 programmed respectively by the numerical values B and B ', the magnitude of the factors AA 'and BB "being predetermined; this multiplexer comprising two outputs W _o -W _i-1 and Z _o -Z _i-1 ,
• - a read only memory (ROM) 302 comprising a number j of addressing addresses for reading A _o -A _j-1 ; the inputs A _o -A _i-1 being connected in correspondence to the outputs W _o -W _i-1 of the multiplexer 301, and the inputs A _i -A _j-1 being connected in correspondence to the bus B2 which transmits digital data representative of the engine speed, as indicated above,
• a digital adder 303, this adder comprising first inputs A _o -A _j -1 connected in correspondence to the outputs Z _o -Z _i-1 of the multiplexer 301 and second inputs Bo-Bi-1 connected in correspondence to the outputs Q _o -Q _i-1 of the preceding ROM memory the outputs S _o -S _i-1 of this adder are connected in correspondence to the inputs M _o -M _i-1 of the multiplier BRM 156 of the digital integrator 15.

The operation of this asymmetry circuit is as follows: the ROM memory 302 performs, by programming alternately, under the control of the signal CA, the product of the speed of rotation N of the motor by the constants A and A '; the adder 303 fixes the origin of the products An and A'N.

The asymmetry circuit which has just been described makes it possible, by choosing the value of AA 'and B-B', to modify the integral loop gain on demand, however, in practice, a single value of these parameters can be determined, then this asymmetry circuit can be simplified and include only the ROM memory 302 addressed, on the one hand, by the bus B2 and, on the other hand, by the signal CÀ.

Depletion delay circuit 31

• - une mémoire morte (ROM) 311, cette mémoire ROM comportant des entrées d'adressage à la lecture; les entrées A_o-A_i-1 étant reliées à une source numérique de grandeur fixe et les entrées A_i-A_f-, étant connectées en correspondance avec le bus B2 qui porte l'information numérique de vitesse de rotation N du moteur,
• - un soustracteur numérique 312, ce soustracteur comportant des premières entrées A_o-A_k-₁ reliées à une source numérique de grandeur D fixe et des secondes entrées B_o-B_k-1 connectées en correspondance aux sorties Q_o-Q_k-1 de la mémoire ROM précédente,
• - un compteur 313 programmable du type inverse, ce compteur comportant des entrées de programmation P_o-P_k-₁ connectées en correspondance aux sorties S_o-S_k-₁ du soustracteur précédent, une sortie CO indiquant que le contenu de ce compteur a une valeur nulle, une entrée L de chargement reliée à la sortie du comparateur de niveau 11, une entrée CLR de remise à zéro, la sortie CO et la sortie du comparateur de niveau 11 sont reliées respectivement à une première et une seconde entrées d'une porte logique 314 du type NON-OU, la sortie de cette porte étant reliée à l'entrée CLR de ce compteur 313, de plus, ce compteur comporte une entrée d'horloge CK,
• - un diviseur de fréquence 315, du type programmable, ce diviseur comportant: une entrée d'horloge CK qui reçoit un signal d'horloge H et une sortie CO reliée à l'entrée d'horloge du compteur 313, des entrées de programmation P_o-P_k-₁ reliées à une source numérique de grandeur P fixe, une entrée L de chargement reliée à une porte logique 316 de type NON-ET, une première entrée de cette porte étant reliée à la sortie CO et une seconde entrée étant reliée par l'intermédiaire d'un inverseur 317 à la sortie du comparateur de niveau 11.

FIG. 24 represents, in the form of a block diagram, an embodiment of a circuit 31 making it possible to introduce a delay to depletion. The delay in depletion varies linearly in the range of engine rotation speeds located between the values Ni and Ns already defined, on either side of this range of speeds, the delay in depletion remains constant; to do this, circuit 31 includes the following elements:

• a read-only memory (ROM) 311, this ROM memory comprising read addressing inputs; the inputs A _o -A _i-1 being connected to a digital source of fixed magnitude and the inputs A _i -A _f -, being connected in correspondence with the bus B2 which carries the digital information of rotation speed N of the motor,
• a digital subtractor 312, this subtractor comprising first inputs A _o -A _k - ₁ connected to a digital source of fixed magnitude D and second inputs B _o -B _k-1 connected in correspondence to the outputs Q _o -Q _{k- 1} of the previous ROM memory,
• a counter 313 programmable of the inverse type, this counter comprising programming inputs P _o -P _k - ₁ connected in correspondence to the outputs S _o -S _k - ₁ of the preceding subtractor, an output CO indicating that the content of this counter has a zero value, a loading input L connected to the output of the level comparator 11, a reset CLR input, the output CO and the output of the level comparator 11 are connected respectively to a first and a second input of a logic gate 314 of the NOR type, the output of this gate being connected to the CLR input of this counter 313, moreover, this counter comprises a clock input CK,
• a frequency divider 315, of the programmable type, this divider comprising: a clock input CK which receives a clock signal H and an output CO connected to the clock input of the counter 313, programming inputs P _o -P _k - ₁ connected to a digital source of fixed magnitude P, a loading input L connected to a logic gate 316 of NAND type, a first input of this gate being connected to the CO output and a second input being connected via an inverter 317 to the output of the level comparator 11.

The output signal CA ^* is taken from the output of door 314. The operation of this circuit 31 is as follows: the ROM memory 311, or program memory, provides the slope of the delay to depletion as a function of the speed of rotation N of the motor, the subtractor 313 makes it possible to introduce an initial delay to depletion, the counter 315 makes it possible to adjust the step of the delay introduced by the counter 313.

We now see more clearly the advantages of an electronic carburetion controller according to the invention, the values for adjusting the flow rate of the fluids obtained during closed loop operation can be kept and used during open loop operation. The values for adjusting the flow rate of open loop fluids are deduced from the closed loop values by a multiplying factor depending on the value of an engine operating parameter. During periods when the vehicle is stopped, the power consumption of the controller is extremely low, however the power supply to the controller can be interrupted when stopped, the controller comprising internal reset means.

The invention finds its application in internal combustion engines equipped with a carburetor or a fuel injection system.

Claims (9)

1. Electronic digital controller (6) permitting to adjust the air/fuel (A/C) ratio of the mixture supplied to an internal combustion engine (1), this engine having a fuel supply device the flow rate of which can be adjusted by at least one electrovalve (E.V) operating in an "all or nothing" cycle, probes (7a to 7e) for measuring the conditions of operation of the engine and an oxygen probe (5) placed on the path of the combustion gases, the controller (6) being characterized in that it comprises a clock signal generator (14) supplying sequencing signals (Hi) and a signal (Hc) which is synchronous with the frequency (Fc) of the electrovalve (E.V) cycle; a closed loop circuit of the proportional-integral type and having a variable gain, said loop circuit being connected between the oxygen probe (5) and the electrovalve (E.V) and comprising, connected in series: a level comparator (11) having two output states and supplying a loop error signal (CJ, a digital integrator (15) having a re-initialization input and a gain control input receiving a measurement signal (B₂) representing the rotational speed (N) of the engine, a first digital modulator of the cyclic opening ratio (R.C.O.) of the electrovalve having a control input connected to the loop error signal (CJ and a multiplexer (20) permitting to open the closed loop circuit and to enter an open loop adjustment signal, this multiplexer (20) having at least one control input (C.M.D.) connected to a logic monitoring circuit (23) responding to the measurement signals of the engine operation conditions and selecting the closed loop or open loop mode of operation; and in that an open loop adjustment circuit is connected between the digital integrator (15) and a further input of the multiplexer (20) and comprises a digital memory (17) having means for filtering and copying the content of the digital integrator (15), this digital memory (17) being connected to a second digital modulator (18) having a control input connected to a measurement signal (B₁) such as an engine temperature measurement signal, and the output of this digital modulator (18) being also connected to the re-initialization input of the digital integrator (15).

2. Controller according to claim 1, characterized in that the digital integrator (15) comprises a programmable counter (151) of direct/reverse type the incrementation input of which is connected to the output of a discrete frequency multiplyer (156), this multiplyer having a clock input (Ck) connected to the clock signal generator (14) and data inputs receiving a digital signal (B₂) representing the rotational speed (N) of the engine.

3. Controller according to claim 2, characterized in that the programmable counter (151) contained in the digital integrator (15) is loop-connected through a digital gate (152) arranged between the output of the discrete frequency multiplyer (156) and the incrementation input (Ck) of this counter.

4. Controller according to claim 2, characterized in that the counting direction input (U/D) of the programmable counter (151) is connected to a selection circuit (153) for selecting the counting directions, this selection circuit comprising counting directions forcing means.

5. Controller according to claim 1, characterised in that the digital modulator (16) comprises two programmable counters connected in series through a digital gate (164); a first looped counter (161) having data inputs respectively connected to the outputs of the digital integrator (15) and a second looped counter (163) having data inputs respectively connected to a digital voltage source (C), the outputs of these two counters being connected to the inputs of a multiplexer the control input of which is connected to the output of the two-state level comparator (11).

6. Controller according to claim 1, characterized in that the second digital duration modulator (18) comprises a programmable looped counter (181) the incrementation input (Ck) of which is connected to a discrete programmable frequency multiplyer (183) the data inputs of which are respectively connected to a digital voltage source representing the operational engine conditions.

7. Controller according to claim 1, characterized in that it comprises a duration comparator (28) connected between the first (16) and second (18) duration modulators for supplying a reverse direction forcing signal to the digital integrator (15).

8. Controller according to any of claims 1 to 7, characterized in that it is produced in C-MOS technology (complementary metal-oxide semiconductor) and in that the clock generator is interrupted during the standstill period of the engine.

9. Internal combustion engine, characterized in that it comprises an electronic digital controller for adjusting the air/fuel ratio according to any of claims 1 to 8.

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