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DK1672481T3 - Aritmetisk divisions- og kvadratrodsenhed - Google Patents

Aritmetisk divisions- og kvadratrodsenhed

Info

Publication number
DK1672481T3
DK1672481T3 DK05027390T DK05027390T DK1672481T3 DK 1672481 T3 DK1672481 T3 DK 1672481T3 DK 05027390 T DK05027390 T DK 05027390T DK 05027390 T DK05027390 T DK 05027390T DK 1672481 T3 DK1672481 T3 DK 1672481T3
Authority
DK
Denmark
Prior art keywords
square root
root unit
arithmetic division
arithmetic
division
Prior art date
Application number
DK05027390T
Other languages
English (en)
Inventor
Takahiko Uesugi
Original Assignee
Nec Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nec Corp filed Critical Nec Corp
Application granted granted Critical
Publication of DK1672481T3 publication Critical patent/DK1672481T3/da

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/491—Computations with decimal numbers radix 12 or 20.
    • G06F7/492—Computations with decimal numbers radix 12 or 20. using a binary weighted representation within each denomination
    • G06F7/493—Computations with decimal numbers radix 12 or 20. using a binary weighted representation within each denomination the representation being the natural binary coded representation, i.e. 8421-code
    • G06F7/496—Multiplying; Dividing
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/544—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices for evaluating functions by calculation
    • G06F7/552—Powers or roots, e.g. Pythagorean sums
    • G06F7/5525—Roots or inverse roots of single operands
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/4824—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices using signed-digit representation
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/483—Computations with numbers represented by a non-linear combination of denominational numbers, e.g. rational numbers, logarithmic number system or floating-point numbers
    • G06F7/487—Multiplying; Dividing
    • G06F7/4873—Dividing
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/544—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices for evaluating functions by calculation
    • G06F7/552—Powers or roots, e.g. Pythagorean sums

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Pure & Applied Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Computational Mathematics (AREA)
  • Mathematical Optimization (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Nonlinear Science (AREA)
  • Complex Calculations (AREA)
  • Executing Machine-Instructions (AREA)
DK05027390T 2004-12-15 2005-12-14 Aritmetisk divisions- og kvadratrodsenhed DK1672481T3 (da)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2004362300A JP4273071B2 (ja) 2004-12-15 2004-12-15 除算・開平演算器

Publications (1)

Publication Number Publication Date
DK1672481T3 true DK1672481T3 (da) 2009-03-16

Family

ID=35999596

Family Applications (1)

Application Number Title Priority Date Filing Date
DK05027390T DK1672481T3 (da) 2004-12-15 2005-12-14 Aritmetisk divisions- og kvadratrodsenhed

Country Status (9)

Country Link
US (1) US7921149B2 (da)
EP (1) EP1672481B1 (da)
JP (1) JP4273071B2 (da)
KR (1) KR100756137B1 (da)
AU (1) AU2005256094A1 (da)
CA (1) CA2530015C (da)
DE (1) DE602005011742D1 (da)
DK (1) DK1672481T3 (da)
SG (1) SG123731A1 (da)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7509365B2 (en) * 2005-02-11 2009-03-24 International Business Machines Corporation Inverting data on result bus to prepare for instruction in the next cycle for high frequency execution units
EP2341425A1 (en) * 2009-12-30 2011-07-06 STMicroelectronics (Grenoble 2) SAS control of electric machines involving calculating a square root
US8819098B2 (en) 2010-11-23 2014-08-26 International Business Machines Corporation Computation of a remainder by division using pseudo-remainders
US8868633B2 (en) * 2012-03-30 2014-10-21 Advanced Micro Devices, Inc. Method and circuitry for square root determination
RU2510072C1 (ru) * 2012-10-25 2014-03-20 Открытое акционерное общество "Российская корпорация ракетно-космического приборостроения и информационных систем" (ОАО "Российские космические системы") Устройство деления и извлечения квадратного корня
US9348796B2 (en) 2013-09-19 2016-05-24 International Business Machines Corporation Arithmetic operation in a data processing system
US9785407B2 (en) * 2014-11-21 2017-10-10 Arm Limited Data processing apparatus having combined divide-square root circuitry
US10209957B2 (en) * 2015-05-04 2019-02-19 Samsung Electronics Co., Ltd. Partial remainder/divisor table split implementation
US10209959B2 (en) 2016-11-03 2019-02-19 Samsung Electronics Co., Ltd. High radix 16 square root estimate
WO2020090024A1 (ja) * 2018-10-31 2020-05-07 富士通株式会社 演算処理装置
US11119731B2 (en) 2019-03-12 2021-09-14 Arm Limited Apparatus and method for rounding
US11281428B2 (en) * 2019-03-12 2022-03-22 Arm Limited Conversion circuitry

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4939686A (en) * 1987-05-18 1990-07-03 Weitek Corporation Method and apparatus for shared radix 4 division and radix 4 square root
US5023827A (en) * 1988-08-18 1991-06-11 Digital Equipment Corporation Radix-16 divider using overlapped quotient bit selection and concurrent quotient rounding and correction
US5128891A (en) 1990-04-02 1992-07-07 Advanced Micro Devices, Inc. High speed divider with square root capability
US5386376A (en) * 1992-08-31 1995-01-31 Intel Corporation Method and apparatus for overriding quotient prediction in floating point divider information processing systems
US5687106A (en) * 1995-03-31 1997-11-11 International Business Machines Corporation Implementation of binary floating point using hexadecimal floating point unit
US5787030A (en) * 1995-07-05 1998-07-28 Sun Microsystems, Inc. Correct and efficient sticky bit calculation for exact floating point divide/square root results
JP3514566B2 (ja) 1995-12-13 2004-03-31 株式会社ルネサステクノロジ 除算／開平回路
JPH10187420A (ja) 1996-12-26 1998-07-21 Hitachi Ltd 除算・開平演算器
US6490607B1 (en) * 1998-01-28 2002-12-03 Advanced Micro Devices, Inc. Shared FP and SIMD 3D multiplier
US6108682A (en) 1998-05-14 2000-08-22 Arm Limited Division and/or square root calculating circuit
JP3517162B2 (ja) 1999-09-22 2004-04-05 株式会社東芝 除算・開平演算装置
JP3551113B2 (ja) 2000-02-07 2004-08-04 日本電気株式会社 除算器
JP3793505B2 (ja) * 2000-09-26 2006-07-05 株式会社ルネサステクノロジ 演算器及びそれを用いた電子回路装置
US7016930B2 (en) * 2002-10-25 2006-03-21 Arm Limited Apparatus and method for performing operations implemented by iterative execution of a recurrence equation

Also Published As

Publication number Publication date
SG123731A1 (en) 2006-07-26
US20060129623A1 (en) 2006-06-15
AU2005256094A1 (en) 2006-06-29
EP1672481B1 (en) 2008-12-17
EP1672481A1 (en) 2006-06-21
CA2530015A1 (en) 2006-06-15
DE602005011742D1 (de) 2009-01-29
KR100756137B1 (ko) 2007-09-05
KR20060067874A (ko) 2006-06-20
JP2006172035A (ja) 2006-06-29
JP4273071B2 (ja) 2009-06-03
US7921149B2 (en) 2011-04-05
CA2530015C (en) 2010-01-05

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