DE9113499U1 - Electronic switch - Google Patents
Electronic switchInfo
- Publication number
- DE9113499U1 DE9113499U1 DE9113499U DE9113499U DE9113499U1 DE 9113499 U1 DE9113499 U1 DE 9113499U1 DE 9113499 U DE9113499 U DE 9113499U DE 9113499 U DE9113499 U DE 9113499U DE 9113499 U1 DE9113499 U1 DE 9113499U1
- Authority
- DE
- Germany
- Prior art keywords
- substrate
- semiconductor
- semiconductor circuit
- conductor
- contact surfaces
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 239000004020 conductor Substances 0.000 claims description 33
- 239000000758 substrate Substances 0.000 claims description 29
- 239000004065 semiconductor Substances 0.000 claims description 25
- 239000012212 insulator Substances 0.000 claims 1
- 239000000463 material Substances 0.000 claims 1
- 238000001816 cooling Methods 0.000 description 5
- 238000011161 development Methods 0.000 description 1
- 230000018109 developmental process Effects 0.000 description 1
- 230000017525 heat dissipation Effects 0.000 description 1
- 230000006698 induction Effects 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 238000007493 shaping process Methods 0.000 description 1
- 229910000679 solder Inorganic materials 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49575—Assemblies of semiconductor devices on lead frames
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
- H01L23/64—Impedance arrangements
- H01L23/645—Inductive arrangements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/71—Means for bonding not being attached to, or not being formed on, the surface to be connected
- H01L24/72—Detachable connecting means consisting of mechanical auxiliary parts connecting the device, e.g. pressure contacts using springs or clips
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01005—Boron [B]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/1901—Structure
- H01L2924/1904—Component type
- H01L2924/19043—Component type being a resistor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/30107—Inductance
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Power Conversion In General (AREA)
Description
Die Erfindung betrifft eine elektronische Schaltung, insbesonders Leistungshalbleiterschaltung gemäß dem Oberbegriff des Anspruchs 1.The invention relates to an electronic circuit, in particular a power semiconductor circuit according to the preamble of claim 1.
Es sind elektronische Schaltungen bekannt, die auf einem oder mehreren isolierenden Substraten mittels auf dem Substrat festhaftender, strukturierter Kontaktflächen und darauf angebrachten Halbleitertabletten Anschlußleiter aufweisen, welche die Schaltung in einer geometrisch definierten Weise mit externen Strom- und Steueranschlüssen verbinden. Die Geometrie der Kontaktflächen auf dem Substrat stellt dabei die entsprechende Schaltung dar, wobei die Halbleiteroberflächen und die Kontaktflächen noch mittels interner Leiter (beispielsweise Bonddrähte) entsprechend verbunden sind. Dabei werden alle notwendigen elektrischen Verbindungen so auf Substratebene ausgebildet, daß auf einem Substrat für einen Anschluß nach außen immer nur ein bestimmter Anschlußleiterkontakt existiert. Besonders bei Leistungshalbleiterschaltungen mit erheblichen Stromdichten erfordert das auf Substratebene eine dem ohm'sehen Widerstand der Leiterbahnen angepaßte Bahnbreite und eine erzwungene Geometrie der Kontaktflächen als Leiterstruktur, die der optimalen thermischen Verteilung der wärmeerzeugenden Halbleitertabletten auf dem auch zu Kühlzwecken dienenden Substrat nicht Rechnung trägt. Da auf Substratebene beispielsweise sich kreuzende Leiterstrukturen nicht möglich sind, ergeben sich Umwege und Umgehungen, die einer optimalen Struktur entgegen stehen. v Electronic circuits are known which have connecting conductors on one or more insulating substrates by means of structured contact surfaces firmly adhering to the substrate and semiconductor tablets attached thereto, which connect the circuit to external power and control connections in a geometrically defined manner. The geometry of the contact surfaces on the substrate represents the corresponding circuit, with the semiconductor surfaces and the contact surfaces also being connected accordingly by means of internal conductors (for example bonding wires). All necessary electrical connections are formed at substrate level in such a way that there is always only one specific connecting conductor contact on a substrate for an external connection. Particularly in the case of power semiconductor circuits with considerable current densities, this requires a track width at substrate level that is adapted to the ohmic resistance of the conductor tracks and a forced geometry of the contact surfaces as a conductor structure that does not take into account the optimal thermal distribution of the heat-generating semiconductor tablets on the substrate, which also serves for cooling purposes. Since, for example, crossing conductor structures are not possible at substrate level, detours and workarounds arise that are contrary to an optimal structure. v
Des weiteren ergibt sich daraus eine erhebliche Flächenausdehnung, welche die Kosten für Substrat und anschließendem Gehäuse erhöht. Des weiteren weisen Leiterteile die auf Substratebene angeordnet sind eine höhere Leitungsinduktivität auf, als beispielsweise übereinander in kleinerem Abstand verlaufende Leiterteile, was bei Schaltvorgängen zu höheren Überspannungen führt.Furthermore, this results in a significant expansion of the surface area, which increases the costs for the substrate and the subsequent housing. Furthermore, conductor parts arranged at the substrate level have a higher line inductance than, for example, conductor parts running one above the other at a smaller distance, which leads to higher overvoltages during switching processes.
Der Erfindung liegt die Aufgabe zugrunde, eine elektronische Schaltungsanordnung, insbesonders eine Leistungshalbleiterschaltung zu schaffen, die bei gegebener Substratfläche optimierte ohm'sche Widerstände und niedrige elektrische Induktionswerte der Leitungen ergibt, sowie zuläßt, die wärmeerzeugenden Halbleitertabletten so anzuordnen, daß sich eine optimierte Ausnützung der Substratfläche zu Wärmeableitung ergibt, was beispielsweise durch eine möglichst gleichmäßige Verteilung der Wärmequellen über die Substratfläche gegeben ist. Diese Aufgabe wird erfindungsgemäß durch die Merkmale des kennzeichnenden Teiles des Anspruchs 1 gelöst. Weiterbildungen der erfindungsgemäßen elektronischen Schaltungsanordnung sind in den Unteransprüchen gekennzeichnet.The invention is based on the object of creating an electronic circuit arrangement, in particular a power semiconductor circuit, which, for a given substrate area, results in optimized ohmic resistances and low electrical induction values of the lines, and allows the heat-generating semiconductor tablets to be arranged in such a way that an optimized utilization of the substrate area for heat dissipation results, which is achieved, for example, by distributing the heat sources as evenly as possible over the substrate area. This object is achieved according to the invention by the features of the characterizing part of claim 1. Further developments of the electronic circuit arrangement according to the invention are characterized in the subclaims.
Mit der erfindungsgemäßen Ausbildung der Schaltungsanordnung ergibt sich der Vorteil eines kompakten, kostengünstigen Aufbaues, der auf einer gegebenen Grundfläche eine hohe Stromdichte ermöglicht und der durch eine flexible Anordnung der Anschlußleiter an die konstruktiven und elektrischen Notwendigkeiten beispielsweise einer Stromrichterschaltung anpaßbar ist.The design of the circuit arrangement according to the invention provides the advantage of a compact, cost-effective structure which enables a high current density on a given base area and which can be adapted to the structural and electrical requirements of, for example, a power converter circuit through a flexible arrangement of the connecting conductors.
Die Einzelheiten, Merkmale und Vorteile ergeben sich aus der nachfolgenden Beschreibung von den schematisch dargestellten Ausführungsbeispielen der erfindungsgemäßen elektronischen Schaltungsanordnung und deren Erklärungen.The details, features and advantages emerge from the following description of the schematically illustrated embodiments of the electronic circuit arrangement according to the invention and their explanations.
Fig. l zeigt schematisch das Grundprinzip der Erfindung auf: Eine elektronische Schaltungsanordnung [10] mit einer Kühlplatte [12], die auch als Kühlkörper mit Kühlrippen ausgebildet sein kann, an der in an sich bekannter Weise ein elektrisch isolierendes Substrat [14] befestigt ist, wird durch die Halbleiterelemente [16] und die Kontaktflächen [18] gebildet, wobei innere Anschlußleiter [20], beispielsweise als Bonddrähte, notwendige Verbindungen zwischen den Halbleitere-Fig. l shows schematically the basic principle of the invention: An electronic circuit arrangement [10] with a cooling plate [12], which can also be designed as a cooling body with cooling fins, to which an electrically insulating substrate [14] is attached in a manner known per se, is formed by the semiconductor elements [16] and the contact surfaces [18], whereby internal connecting conductors [20], for example as bonding wires, provide necessary connections between the semiconductor elements.
u ,* k: "■ u ,* k : "■
lementen und den auf der Oberseite des Substrates festhaftenden Kontaktflächen [18] herstellen.elements and the contact surfaces firmly adhering to the upper side of the substrate [18].
Erfindungsgemäß besteht die elektronische Schaltung aus weiteren, außerhalb des Substrates verlaufenden Anschlußleitern [22, 26] die zwei Funktionen besitzen:According to the invention, the electronic circuit consists of additional connecting conductors [22, 26] running outside the substrate, which have two functions:
a) die Verbindung von getrennt liegenden Kontaktflächen [18] untereinander oder zwischen Kontaktflächen [18] und Halbleiterelement [16] herzustellena) to establish the connection between separate contact surfaces [18] with each other or between contact surfaces [18] and semiconductor element [16]
b) mittels äußerer Anschlüsse [24] die Verbindung nach außen zum Zweck des Anschlusses der Schaltung an den Strom- oder Steuerkreis zu ermöglichen.(b) to enable external connections [24] for the purpose of connecting the circuit to the power or control circuit.
Durch die Anordnung der Anschlußleiter [22, 26] über dem Substrat wird eine Leitungsführung auf dem Substrat vermieden, was im Fall des Stromverlaufs des gezeichneten Beispiels zu einem hohen Flächenverbrauch auf dem Substrat führen würde, da die Anschlußleiter [22, 26] durch ihre mehrlagige Anordnung Kreuzungen ermöglichen und weiter durch ihren geringen Abstand zu den stromführenden Kontaktflächen [18] einen niedrigen Induktivitätswert aufweisen. Außerdem können die Anschlußleiter [22, 26] durch eine entsprechend gewählte Stärke des Leiters kompakter ausgeführt werden, als die Leiterschicht der Kontaktflächen [18], die auf dem Substrat vornehmlich nur in einer begrenzten Schichtstärke ausgeführt werden kann.By arranging the connecting conductors [22, 26] above the substrate, a cable routing on the substrate is avoided, which in the case of the current flow in the example shown would lead to a high area consumption on the substrate, since the connecting conductors [22, 26] enable crossings due to their multi-layer arrangement and also have a low inductance value due to their small distance from the current-carrying contact surfaces [18]. In addition, the connecting conductors [22, 26] can be made more compact by selecting an appropriate conductor thickness than the conductor layer of the contact surfaces [18], which can primarily only be made in a limited layer thickness on the substrate.
Die Anschlußleiter [22, 26] gemäß der Erfindung können einstückig oder auch mehrstückig zusammengesetzt verbunden ausgeführt werden.The connecting conductors [22, 26] according to the invention can be made in one piece or in multiple pieces.
Die Verbindung der Anschlußleiter [22, 26] mit den Kontaktflächen [18] oder den Halbleitertabletten [16] kann stoffschlüssig mittels Lot-, Schweiß-Bondverbindung oder loslösbar mittels Druckkontakt hergestellt werden.The connection of the connecting conductors [22, 26] with the contact surfaces [18] or the semiconductor tablets [16] can be made in a material-locking manner using solder, welded bonding or detachably using pressure contact.
Durch eine entsprechende geometrische Formgebung der Anschlußleiter [22, 26] kann die Lage der äußeren Anschlüsse [24] an jeder Umfangsstelle des Substrates [14] oder der Kühlplatte [12] wählbar, den konstruktiven Anforderungen der Stromrichterschaltung gemäß, festgelegt werden.By appropriately shaping the connecting conductors [22, 26], the position of the external connections [24] can be selected at any point around the circumference of the substrate [14] or the cooling plate [12], in accordance with the design requirements of the converter circuit.
Die in Fig. 2 angedeutete elektronische Schaltungsanordnung [10] unterscheidet sich von der in Fig. 1 gezeigten Ausbildung dadurch, daß die Ebene der Anschlußleiter [22, 26] einen bestimmten Winkel (beispielsweise 90°) zur Ebene der Kontaktflächen [18] des Substrates [14] einnimmt und daß die Anschlußleiter [22, 26] nahe beieinander geführt werden können, was in bestimmten Stromrichterschaltungen zu einer sehr kompakten Bauweise und zu niedrigen Induktivitätswerten der Leiterführung führt. Des weiteren sei hier angedeutet, daß durch die Anschlußleiter [22, 26] auch mehrere Substrate nach den Ansprüchen der Erfindung verbunden werden können.The electronic circuit arrangement [10] indicated in Fig. 2 differs from the design shown in Fig. 1 in that the plane of the connecting conductors [22, 26] forms a certain angle (for example 90°) to the plane of the contact surfaces [18] of the substrate [14] and that the connecting conductors [22, 26] can be routed close to one another, which in certain converter circuits leads to a very compact design and to low inductance values of the conductor routing. Furthermore, it should be noted here that several substrates can also be connected by the connecting conductors [22, 26] in accordance with the claims of the invention.
Claims (8)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE9113499U DE9113499U1 (en) | 1991-09-11 | 1991-09-11 | Electronic switch |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE4130160A DE4130160A1 (en) | 1991-09-11 | 1991-09-11 | ELECTRONIC SWITCH |
DE9113499U DE9113499U1 (en) | 1991-09-11 | 1991-09-11 | Electronic switch |
Publications (1)
Publication Number | Publication Date |
---|---|
DE9113499U1 true DE9113499U1 (en) | 1992-04-30 |
Family
ID=25907190
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE9113499U Expired - Lifetime DE9113499U1 (en) | 1991-09-11 | 1991-09-11 | Electronic switch |
Country Status (1)
Country | Link |
---|---|
DE (1) | DE9113499U1 (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE4421319A1 (en) * | 1994-06-17 | 1995-12-21 | Abb Management Ag | Low-inductance power semiconductor module |
DE102005030247A1 (en) * | 2005-06-29 | 2007-01-11 | Semikron Elektronik Gmbh & Co. Kg | Housing of power semiconductor module with outwards coupling members contains insulating substrate, whose main surface away from base plate, carries mutually insulated coupling tracks |
WO2009074454A2 (en) * | 2007-12-11 | 2009-06-18 | Abb Research Ltd | Semiconductor module and connection terminal device |
-
1991
- 1991-09-11 DE DE9113499U patent/DE9113499U1/en not_active Expired - Lifetime
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE4421319A1 (en) * | 1994-06-17 | 1995-12-21 | Abb Management Ag | Low-inductance power semiconductor module |
US5574312A (en) * | 1994-06-17 | 1996-11-12 | Abb Management Ag | Low-inductance power semiconductor module |
DE102005030247A1 (en) * | 2005-06-29 | 2007-01-11 | Semikron Elektronik Gmbh & Co. Kg | Housing of power semiconductor module with outwards coupling members contains insulating substrate, whose main surface away from base plate, carries mutually insulated coupling tracks |
DE102005030247B4 (en) * | 2005-06-29 | 2009-06-04 | Semikron Elektronik Gmbh & Co. Kg | Power semiconductor module with high current carrying capacity connectors |
WO2009074454A2 (en) * | 2007-12-11 | 2009-06-18 | Abb Research Ltd | Semiconductor module and connection terminal device |
WO2009074454A3 (en) * | 2007-12-11 | 2009-08-06 | Abb Research Ltd | Semiconductor module and connection terminal device |
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