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DE69914059D1 - Verfahren und Vorrichtung zum Schutz gegen latch-up - Google Patents

Verfahren und Vorrichtung zum Schutz gegen latch-up

Info

Publication number
DE69914059D1
DE69914059D1 DE69914059T DE69914059T DE69914059D1 DE 69914059 D1 DE69914059 D1 DE 69914059D1 DE 69914059 T DE69914059 T DE 69914059T DE 69914059 T DE69914059 T DE 69914059T DE 69914059 D1 DE69914059 D1 DE 69914059D1
Authority
DE
Germany
Prior art keywords
measured
currents
protection against
supply voltage
maximum permissible
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69914059T
Other languages
English (en)
Other versions
DE69914059T2 (de
Inventor
Kempen Paulus Van
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Thales Nederland BV
Original Assignee
Thales Nederland BV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Thales Nederland BV filed Critical Thales Nederland BV
Application granted granted Critical
Publication of DE69914059D1 publication Critical patent/DE69914059D1/de
Publication of DE69914059T2 publication Critical patent/DE69914059T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/28—Supervision thereof, e.g. detecting power-supply failure by out of limits supervision
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Quality & Reliability (AREA)
  • Emergency Protection Circuit Devices (AREA)
  • Processing Of Meat And Fish (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Medicines Containing Antibodies Or Antigens For Use As Internal Diagnostic Agents (AREA)
  • Orthopedics, Nursing, And Contraception (AREA)
  • Power Sources (AREA)
  • Protection Of Static Devices (AREA)
  • Train Traffic Observation, Control, And Security (AREA)
  • Laying Of Electric Cables Or Lines Outside (AREA)
  • Control Of Multiple Motors (AREA)
  • Measurement Of Current Or Voltage (AREA)
DE69914059T 1998-10-13 1999-10-06 Verfahren und Vorrichtung zum Schutz gegen latch-up Expired - Fee Related DE69914059T2 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
NL1010303A NL1010303C2 (nl) 1998-10-13 1998-10-13 Beveiliging.
NL1010303 1998-10-13
PCT/EP1999/007796 WO2000022500A1 (en) 1998-10-13 1999-10-06 Protection system

Publications (2)

Publication Number Publication Date
DE69914059D1 true DE69914059D1 (de) 2004-02-12
DE69914059T2 DE69914059T2 (de) 2004-11-25

Family

ID=19767956

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69914059T Expired - Fee Related DE69914059T2 (de) 1998-10-13 1999-10-06 Verfahren und Vorrichtung zum Schutz gegen latch-up

Country Status (11)

Country Link
US (1) US6452771B1 (de)
EP (1) EP1051674B1 (de)
JP (1) JP2002527807A (de)
CN (1) CN1333322C (de)
AT (1) ATE257606T1 (de)
AU (1) AU755671B2 (de)
CA (1) CA2314147C (de)
DE (1) DE69914059T2 (de)
IL (1) IL136195A (de)
NL (1) NL1010303C2 (de)
WO (1) WO2000022500A1 (de)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7162656B2 (en) * 2003-03-24 2007-01-09 Intel Corporation Dynamic protection circuit
DE102005025160B4 (de) * 2004-06-01 2008-08-07 Deutsches Zentrum für Luft- und Raumfahrt e.V. Verfahren zum Löschen von in einer Schaltung auftretenden Latch-Ups sowie Anordnungen zum Durchführen des Verfahrens
US7907378B2 (en) * 2005-10-20 2011-03-15 Microchip Technology Incorporated Automatic detection of a CMOS device in latch-up and cycling of power thereto
US20070091527A1 (en) * 2005-10-20 2007-04-26 Microchip Technology Incorporated Automatic detection of a CMOS circuit device in latch-up and reset of power thereto
DE102005059795A1 (de) * 2005-12-14 2007-06-28 Siemens Ag Vorrichtung und Verfahren zur Inbetriebnahme von Baugruppen
US7714626B2 (en) 2007-06-28 2010-05-11 Microchip Technology Incorporated System, method and apparatus having improved pulse width modulation frequency resolution
ES2363145B1 (es) * 2009-04-02 2012-06-05 Universitat De Les Illes Balears Dispositivo de caracterización de transitorios de corriente producidos por interacción de partículas ionizantes con un bloque de transistores de una puerta lógica.
US10175748B2 (en) * 2017-01-05 2019-01-08 Nuvoton Technology Corporation System, method and computer program product for improved regulation of an electrical device's consumption of power from an external power supply

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3321086A1 (de) * 1983-06-10 1984-12-13 Siemens AG, 1000 Berlin und 8000 München Schaltungsanordnung zur verringerung der restspannung an unvollkommen abgeschalteten elektrischen verbrauchern
US4648015A (en) * 1984-10-04 1987-03-03 Motorola, Inc. Filter capacitor discharge circuit for a DC-DC converter
US5446320A (en) * 1992-01-24 1995-08-29 Compaq Computer Corp. Circuit for clamping power output to ground while the computer is deactivated
JPH08329593A (ja) * 1995-05-29 1996-12-13 Toshiba Corp 磁気記録再生装置及び同装置における放電スパーク防止方法
US5691870A (en) * 1995-11-07 1997-11-25 Compaq Computer Corporation Circuit for monitoring and disabling power supply signals to a microprocessor in a computer system utilizing secondary voltage regulators

Also Published As

Publication number Publication date
CN1333322C (zh) 2007-08-22
DE69914059T2 (de) 2004-11-25
NL1010303C2 (nl) 2000-04-17
CA2314147C (en) 2008-12-09
EP1051674A1 (de) 2000-11-15
CN1287635A (zh) 2001-03-14
IL136195A (en) 2005-06-19
AU755671B2 (en) 2002-12-19
ATE257606T1 (de) 2004-01-15
AU6339999A (en) 2000-05-01
US6452771B1 (en) 2002-09-17
IL136195A0 (en) 2001-05-20
JP2002527807A (ja) 2002-08-27
EP1051674B1 (de) 2004-01-07
CA2314147A1 (en) 2000-04-20
WO2000022500A1 (en) 2000-04-20

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee