DE69834948D1 - Coulomb-Blockade-Mehrpegelspeicheranordnung und entsprechende Herstellungs- und Betriebsverfahren - Google Patents
Coulomb-Blockade-Mehrpegelspeicheranordnung und entsprechende Herstellungs- und BetriebsverfahrenInfo
- Publication number
- DE69834948D1 DE69834948D1 DE69834948T DE69834948T DE69834948D1 DE 69834948 D1 DE69834948 D1 DE 69834948D1 DE 69834948 T DE69834948 T DE 69834948T DE 69834948 T DE69834948 T DE 69834948T DE 69834948 D1 DE69834948 D1 DE 69834948D1
- Authority
- DE
- Germany
- Prior art keywords
- storage arrangement
- level storage
- operating methods
- corresponding manufacturing
- coulomb blockade
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B82—NANOTECHNOLOGY
- B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
- B82Y10/00—Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
- G11C11/5621—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
- G11C11/5628—Programming or writing circuits; Data input circuits
- G11C11/5635—Erasing circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
- G11C11/5671—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge trapping in an insulator
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/68—Floating-gate IGFETs
- H10D30/681—Floating-gate IGFETs having only two programming levels
- H10D30/682—Floating-gate IGFETs having only two programming levels programmed by injection of carriers through a conductive insulator, e.g. Poole-Frankel conduction
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/68—Floating-gate IGFETs
- H10D30/688—Floating-gate IGFETs programmed by two single electrons
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C2216/00—Indexing scheme relating to G11C16/00 and subgroups, for features not directly covered by these groups
- G11C2216/02—Structural aspects of erasable programmable read-only memories
- G11C2216/08—Nonvolatile memory wherein data storage is accomplished by storing relatively few electrons in the storage layer, i.e. single electron memory
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Chemical & Material Sciences (AREA)
- Nanotechnology (AREA)
- Physics & Mathematics (AREA)
- Mathematical Physics (AREA)
- Theoretical Computer Science (AREA)
- Crystallography & Structural Chemistry (AREA)
- Semiconductor Memories (AREA)
- Non-Volatile Memory (AREA)
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR9716157A FR2772989B1 (fr) | 1997-12-19 | 1997-12-19 | Dispositif de memoire multiniveaux a blocage de coulomb, procede de fabrication et procede de lecture/ecriture/ effacement d'un tel dispositif |
FR9716157 | 1997-12-19 | ||
PCT/FR1998/002768 WO1999033120A1 (fr) | 1997-12-19 | 1998-12-17 | Dispositif de memoire multiniveaux a blocage de coulomb, procede de fabrication et procede de lecture/ecriture/effacement d'un tel dispositif |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69834948D1 true DE69834948D1 (de) | 2006-07-27 |
DE69834948T2 DE69834948T2 (de) | 2007-01-25 |
Family
ID=9514839
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69834948T Expired - Lifetime DE69834948T2 (de) | 1997-12-19 | 1998-12-17 | Coulomb-Blockade-Mehrpegelspeicheranordnung und entsprechende Herstellungs- und Betriebsverfahren |
Country Status (5)
Country | Link |
---|---|
EP (1) | EP1042818B1 (de) |
JP (1) | JP2001527297A (de) |
DE (1) | DE69834948T2 (de) |
FR (1) | FR2772989B1 (de) |
WO (1) | WO1999033120A1 (de) |
Families Citing this family (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP1120836A1 (de) | 2000-01-28 | 2001-08-01 | STMicroelectronics S.r.l. | Auf einem Halbleiter integrierte Speicherzellenstruktur |
US6320784B1 (en) * | 2000-03-14 | 2001-11-20 | Motorola, Inc. | Memory cell and method for programming thereof |
JP5016164B2 (ja) * | 2001-02-22 | 2012-09-05 | シャープ株式会社 | メモリ膜およびその製造方法、並びにメモリ素子、半導体記憶装置、半導体集積回路および携帯電子機器 |
FR2943832B1 (fr) | 2009-03-27 | 2011-04-22 | Commissariat Energie Atomique | Procede de realisation d'un dispositif memoire a nanoparticules conductrices |
EP2309562B1 (de) * | 2009-10-12 | 2012-12-05 | Hitachi Ltd. | Ladungsträgervorrichtung |
US10553601B2 (en) | 2017-03-16 | 2020-02-04 | Toshiba Memory Corporation | Semiconductor memory including semiconductor oxide |
US10312239B2 (en) | 2017-03-16 | 2019-06-04 | Toshiba Memory Corporation | Semiconductor memory including semiconductor oxie |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB1297899A (de) * | 1970-10-02 | 1972-11-29 | ||
DE3279138D1 (en) * | 1981-12-14 | 1988-11-24 | Ibm | Dual electron injector structure and semiconductor memory device including a dual electron injector structure |
US5731598A (en) * | 1995-06-23 | 1998-03-24 | Matsushita Electric Industrial Co. Ltd. | Single electron tunnel device and method for fabricating the same |
-
1997
- 1997-12-19 FR FR9716157A patent/FR2772989B1/fr not_active Expired - Fee Related
-
1998
- 1998-12-17 JP JP2000525933A patent/JP2001527297A/ja not_active Withdrawn
- 1998-12-17 EP EP98962496A patent/EP1042818B1/de not_active Expired - Lifetime
- 1998-12-17 DE DE69834948T patent/DE69834948T2/de not_active Expired - Lifetime
- 1998-12-17 WO PCT/FR1998/002768 patent/WO1999033120A1/fr active Search and Examination
Also Published As
Publication number | Publication date |
---|---|
DE69834948T2 (de) | 2007-01-25 |
WO1999033120A1 (fr) | 1999-07-01 |
EP1042818A1 (de) | 2000-10-11 |
FR2772989A1 (fr) | 1999-06-25 |
FR2772989B1 (fr) | 2003-06-06 |
JP2001527297A (ja) | 2001-12-25 |
EP1042818B1 (de) | 2006-06-14 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition |