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DE69737573D1 - Redundantes Datenverarbeitungssystem - Google Patents

Redundantes Datenverarbeitungssystem

Info

Publication number
DE69737573D1
DE69737573D1 DE69737573T DE69737573T DE69737573D1 DE 69737573 D1 DE69737573 D1 DE 69737573D1 DE 69737573 T DE69737573 T DE 69737573T DE 69737573 T DE69737573 T DE 69737573T DE 69737573 D1 DE69737573 D1 DE 69737573D1
Authority
DE
Germany
Prior art keywords
data processing
processing system
redundant data
redundant
processing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69737573T
Other languages
English (en)
Other versions
DE69737573T2 (de
Inventor
Nobuyasu Kanekawa
Shinichiro Yamaguchi
Naoto Miyazaki
Naohiro Kasuya
Kazuhiko Kajigaya
Yoshihiro Miyazaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP28639096A external-priority patent/JP3438490B2/ja
Priority claimed from JP01365397A external-priority patent/JP3572844B2/ja
Priority claimed from JP1622897A external-priority patent/JPH10214534A/ja
Priority claimed from JP9066064A external-priority patent/JPH10261762A/ja
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Publication of DE69737573D1 publication Critical patent/DE69737573D1/de
Application granted granted Critical
Publication of DE69737573T2 publication Critical patent/DE69737573T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B9/00—Safety arrangements
    • G05B9/02—Safety arrangements electric
    • G05B9/03—Safety arrangements electric with multiple-channel loop, i.e. redundant control systems
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0796—Safety measures, i.e. ensuring safe condition in the event of error, e.g. for controlling element
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/1629—Error detection by comparing the output of redundant processing systems
    • G06F11/1641—Error detection by comparing the output of redundant processing systems where the comparison is not performed by the redundant processing components
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/004—Error avoidance
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/18—Error detection or correction of the data by redundancy in hardware using passive fault-masking of the redundant circuits
    • G06F11/181—Eliminating the failing redundant component
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/18—Error detection or correction of the data by redundancy in hardware using passive fault-masking of the redundant circuits
    • G06F11/183—Error detection or correction of the data by redundancy in hardware using passive fault-masking of the redundant circuits by voting, the voting not being performed by the redundant components
    • G06F11/184—Error detection or correction of the data by redundancy in hardware using passive fault-masking of the redundant circuits by voting, the voting not being performed by the redundant components where the redundant components implement processing functionality
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/18—Error detection or correction of the data by redundancy in hardware using passive fault-masking of the redundant circuits
    • G06F11/187—Voting techniques
    • G06F11/188—Voting techniques where exact match is not required

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Quality & Reliability (AREA)
  • General Engineering & Computer Science (AREA)
  • Automation & Control Theory (AREA)
  • Hardware Redundancy (AREA)
DE1997637573 1996-10-29 1997-10-27 Redundantes Datenverarbeitungssystem Expired - Lifetime DE69737573T2 (de)

Applications Claiming Priority (8)

Application Number Priority Date Filing Date Title
JP28639096 1996-10-29
JP28639096A JP3438490B2 (ja) 1996-10-29 1996-10-29 冗長システム
JP1365397 1997-01-28
JP01365397A JP3572844B2 (ja) 1997-01-28 1997-01-28 入力インタフェース回路及び入力インタフェース回路を用いた制御システム
JP1622897 1997-01-30
JP1622897A JPH10214534A (ja) 1997-01-30 1997-01-30 スイッチインタフェース、これを使用したフェールセーフシステム
JP9066064A JPH10261762A (ja) 1997-03-19 1997-03-19 メモリを内蔵した多重化マイクロコントローラ
JP6606497 1997-03-19

Publications (2)

Publication Number Publication Date
DE69737573D1 true DE69737573D1 (de) 2007-05-16
DE69737573T2 DE69737573T2 (de) 2008-03-06

Family

ID=27456051

Family Applications (2)

Application Number Title Priority Date Filing Date
DE1997618129 Expired - Lifetime DE69718129T2 (de) 1996-10-29 1997-10-27 Redundantes Datenverarbeitungssystem
DE1997637573 Expired - Lifetime DE69737573T2 (de) 1996-10-29 1997-10-27 Redundantes Datenverarbeitungssystem

Family Applications Before (1)

Application Number Title Priority Date Filing Date
DE1997618129 Expired - Lifetime DE69718129T2 (de) 1996-10-29 1997-10-27 Redundantes Datenverarbeitungssystem

Country Status (2)

Country Link
EP (2) EP0840225B1 (de)
DE (2) DE69718129T2 (de)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2003050624A1 (de) * 2001-12-11 2003-06-19 Continental Teves Ag & Co. Ohg Mehrkerniges redundantes kontrollrechnersystem, rechnerverbund für sicherheitskritische anwendungen in kraftfahrzeugen sowie dessen verwendung
EP1480702B1 (de) 2002-02-25 2009-04-15 Scott Laboratories, Inc. Mit einem pannensicheren modul integriertes sedierung- und analgesiesystem
DE102005037242A1 (de) * 2004-10-25 2007-02-15 Robert Bosch Gmbh Verfahren und Vorrichtung zur Umschaltung und zum Signalvergleich bei einem Rechnersystem mit wenigstens zwei Verarbeitungseinheiten
US20080270746A1 (en) * 2004-10-25 2008-10-30 Bernd Mueller Method and Device for Performing Switchover Operations and for Comparing Signals in a Computer System Having at Least Two Processing Units
US7969229B2 (en) 2009-02-19 2011-06-28 Hitachi, Ltd. On-chip redundancy high-reliable system and method of controlling the same
FR2964210B1 (fr) * 2010-08-24 2012-09-21 Airbus Operations Sas Systeme de traitement de signaux redondants, procede associe, et aeronef comprenant un tel systeme
FR2978585B1 (fr) 2011-07-26 2013-08-16 Airbus Operations Sas Procede et dispositif d'estimation automatique d'un vecteur parametre de vol d'un aeronef, ainsi que methode et ensemble de detection d'une panne affectant un tel vecteur
DE202019100080U1 (de) * 2019-01-09 2020-04-15 WAGO Verwaltungsgesellschaft mit beschränkter Haftung Vorrichtung zur Begrenzung einer Verlustleistung beim Abtasten eines digitalen Signals
CN112782966A (zh) * 2020-12-30 2021-05-11 卡斯柯信号有限公司 一种用于轨道交通信号控制的零散设备驱动系统

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6182201A (ja) * 1984-09-29 1986-04-25 Nec Home Electronics Ltd フエイルセ−フ制御回路
US4868826A (en) * 1987-08-31 1989-09-19 Triplex Fault-tolerant output circuits
JPH0731537B2 (ja) * 1987-09-11 1995-04-10 株式会社日立製作所 多重化制御装置
US4965717A (en) * 1988-12-09 1990-10-23 Tandem Computers Incorporated Multiple processor system having shared memory with private-write capability
GR930100359A (en) * 1993-09-02 1995-05-31 Koloni Sofia & Sia E E Strongly fail safe interface based on concurrent checking.
JP3412349B2 (ja) * 1994-12-28 2003-06-03 株式会社日立製作所 制御装置

Also Published As

Publication number Publication date
EP1291740A3 (de) 2005-03-23
EP0840225A2 (de) 1998-05-06
DE69718129T2 (de) 2003-10-23
DE69718129D1 (de) 2003-02-06
EP0840225B1 (de) 2003-01-02
EP1291740B1 (de) 2007-04-04
DE69737573T2 (de) 2008-03-06
EP1291740A2 (de) 2003-03-12
EP0840225A3 (de) 1999-02-24

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition