DE69511930T2 - Method and device for controlling the power consumption of an electronic device - Google Patents

Abstract

The invention relates to a method for reducing power consumption of an electronic device comprising at least one voltage regulator. The regulating loop of at least one voltage regulator of the electronic device is controlled into a slower mode during periods when normal voltage regulator accuracy is not required, this period being known by the electronic device. The voltage regulator loop is controlled into a slower mode by switching the slew rate into a slower mode with the aid of an auxiliary input (SLEEP) arranged in the voltage regulator's differential amplifier (2) and by decreasing the current flowing through the differential amplifier. The invention is applicable in different electronic devices, particularly in battery powered devices in order to increase the operational time of the battery. For instance, in order to reduce the power consumption the voltage regulator of a mobile telephone can be switched into a slower mode between the control channel messages received from a base station. <IMAGE>

Description

The invention relates to a method and a device for controlling the power consumption of an electronic device with an improved voltage regulator.

A wide variety of battery-powered devices are currently available to consumers. Examples of these devices include mobile phones, portable computers, portable fax machines, portable copiers, portable oscilloscopes, portable hospital equipment, etc. Battery refers to any component that stores electrical energy, such as a rechargeable battery, a disposable battery, or an accumulator.

In order to illustrate the field of application and the advantages of the invention with respect to the state of the art, a mobile phone is now considered as an example of an electronic device.

A small-zone telephone system, such as the GSM (Groupe Speciale Mobile) system, generally comprises a number of base stations, each of which provides service in a predetermined geographic area or cell. Each base station transmits messages to the mobile phones located within the cell area. The mobile phones contain a microprocessor, a transceiver and a decoder controlled by the microprocessor. In battery-operated mobile phones, the battery generally lasts, between charges, for about eight hours when the phone is in idle mode and about one to two hours in talk mode, where the phone is sending and receiving data and/or voice.

The mobile phone and the base station communicate via a radio path assigned to the mobile phone network. The radio path carries both voice and signaling information, which is used to control the operation of the mobile phones and their assignment to the radio path. In the GSM system, for example, two frequency bands of 25 MHz each are reserved for the radio path in the 900 MHz band; the 890-915 MHz band is for uplink communication. in the direction from the mobile phone to the base station (transmitting frequency band), and 935-960 MHz is reserved for the downlink direction from the base station to the phone (receiving frequency band). These frequency bands are divided into 124 frequency channels with an interval of 200 kHz. Each frequency channel is further divided into eight time slots, meaning that the GSM system uses Time Division Multiple Access (TDMA) by allocating a time slot for transmission and reception to each mobile phone, so that each frequency channel of 200 kHz can serve eight phones simultaneously. Thus, the GSM system has a total of 992 channels.

The GSM system based on time division multiple access (TDMA) is not described in more detail here, since it is well known to those skilled in the art, and the system is well specified in the GSM specifications and given, for example, in the article by M. R. L. Hodges: "The GSM radio interface", British Telecom Technological Journal, Vol. 8, No. 1, 1990, pp. 31-43, the contents of which are incorporated herein by reference.

The GSM mobile system specifies the concept of an idle mode in which a mobile phone listens for and reconstructs system information messages sent by the base station and also listens for paging messages that indicate to the phone that a call is waiting. The paging message is a common concept in small-area mobile telephone systems and is transmitted by the base station as a pulse that indicates to the mobile phone that a call is waiting. The mobile phone then responds to the base station to establish a communication link between the mobile phone and the base station.

In mobile phones, a power saving mode is known in which certain circuits, such as the microprocessor circuits controlling the operation of the mobile phone, are switched to a mode in which their energy consumption is reduced. In this power saving mode, the clock frequencies are reduced and some of the clock signals are even stopped. The European patent publication EP 473 465 indicates a way of realizing such a power saving mode.

Since in small-zone mobile systems most of the messages transmitted from a base station to a mobile station are intended for a single mobile station, only a small number of all the messages transmitted by the base station are intended for a specific mobile station. In order to prevent the mobile stations from constantly receiving all the messages transmitted by the base station receive and decode, European patent application EP 473 465 proposes, in order to save energy, that the messages received by the mobile station are sensed to find out whether a received message is intended for another mobile station, and in that case the battery voltage is reduced (the power saving mode is activated) until the next message transmitted by the base station is expected to arrive. Battery energy saving according to publication EP 473 465 is based on the reception of a two-part message, the first part indicating that this message is intended for another mobile station, and the message for this other mobile station containing a second part which, according to publication EP 473 465, does not need to be received if the message is addressed to another mobile station. The mobile station can thus switch a considerable part of its receiving circuitry to the power saving mode until the next message, possibly addressed to this mobile station, is expected to arrive. This energy saving mode is controlled by a scheduling circuit that can be programmed to contain the start time for the expected next message.

Most electronic devices require different supply voltages for different sections of the circuitry and, as a result, voltage regulators are generally used to generate these different supply voltages. A voltage regulator generally operates by using a supply voltage from a voltage source such as a battery. The voltage regulator typically comprises three sections: (i) a reference voltage source which generates a reference voltage, (ii) a differential or error amplifier and (iii) an enable or output element, generally a transistor. A simplified diagram of a voltage regulator is shown in Fig. 1, wherein the reference voltage VRef generated by the reference voltage source 1 is applied to the first input 6 (non-inverting input) of the error amplifier 2. The output 8 of the error amplifier is connected to the base of the output transistor 3 and the emitter of the output transistor 3 is connected as feedback to the second input 7 (inverting input) of the error amplifier 2. The emitter of the output transistor is connected to the supply voltage VBat, which is supplied, for example, by a battery, and the output Vout of the voltage regulator is tapped at a node 4 of a part of the feedback loop between the transistor collector and the feedback of the deviation amplifier, a load 5, which is represented in Fig. 1 by a capacitor 5 is connected between this node 4 and ground (GND).

The energy consumption of a voltage regulator corresponds to the sum of the power consumed by each voltage regulator section:

- The power consumption of the reference voltage source is generally 10-500 pA. If there is more than one voltage regulator, all voltage regulators generally share a common reference voltage source.

- The base current of the output transistor, which is generally of the order of magnitude of the voltage regulator output current divided by the transistor gain. Thus, this current depends mainly on the current consumed by the load connected to the voltage regulator output.

- The energy consumption of the deviation amplifier.

The output current in the output line Vout also depends on the energy consumption of the buffer stage of the error amplifier.

A single voltage regulator can consume a significant portion of the power during operation. However, since electronic devices generally have multiple voltage regulators to produce multiple, different voltages, the combined power consumption of these voltage regulators is becoming an increasingly significant contributor to the overall power consumption of the electronic device. This is particularly evident in idle mobile phones, where the rest of the circuitry within the phone operates in a power saving mode. As the majority of the circuitry within the phone becomes more efficient, the need for power saving modes exists in increasingly diverse components.

According to a first aspect of the invention there is provided: a voltage regulator for providing a regulated output voltage from a voltage source, having an input for the voltage source, an output for providing the regulated output voltage and a feedback loop for controlling the input voltage to the regulated output voltage, characterized in that the voltage regulator further comprises an auxiliary input and means for controlling the response time of the feedback loop in accordance with a signal input to the auxiliary input, and according to a second aspect of the invention there is provided a method for controlling a voltage regulator having a feedback loop by controlling the response time of the feedback loop in accordance with a signal input to an auxiliary input of the feedback loop.

A method and device according to the invention show the advantage that greater control over the voltage regulator is achieved so that the power consumption of an electronic device, preferably a battery-operated device, can be reduced to increase the operating time of the battery. The method and device according to the invention are based on the idea of reducing the power consumption of the voltage regulator by switching the voltage regulator feedback loop to a slower or less accurate mode when the device containing the voltage regulator is switched on and operating in a passive mode. The advantage of being able to operate with lower accuracy instead of switching off the switching action of the voltage regulator is that it is possible to quickly restore the active operating state of the circuits to which the voltage regulator supplies voltages. If the supply voltage were removed from these circuits, it would be necessary to reset them before use and RAM memories would lose their stored data.

In a preferred embodiment, an operating current is provided for the feedback loop and the means for controlling the response time comprises means for controlling the operating current.

An advantage of this embodiment and the associated method is that by reducing the operating current at certain times, less power is consumed by the device containing the voltage regulator. Suitably, reducing the operating current results in reducing the response time of the feedback loop and increasing the operating current results in increasing the response time of the feedback loop.

In a preferred embodiment, the feedback loop comprises a differential amplifier and the operating current is the operating current of this differential amplifier.

Suitably, the tilting speed associated with the differential amplifier depends on the magnitude of the operating current, and accordingly the response time of the feedback loop shows a corresponding dependence.

The pull-down speed of the differential amplifier depends on the supply current of the differential stage, so that the pull-down speed decreases when this current is reduced. The speed of the control loop of the voltage regulator correspondingly depends on the pull-down speed of the deviation amplifier, so that when the current of the differential amplifier in the voltage supply differential stage is reduced, the speed of the control loop of the voltage regulator is reduced, so that the accuracy of the output voltage of the voltage regulator is reduced.

The inactive state, sleep mode, is an example of a mode in which the electronic device is switched on but functionally in a passive state. The power saving mode given above is an example of an inactive state where the aim is to reduce energy consumption without turning off the circuits. For example, a mobile phone can be switched to the inactive state between receiving control channel messages in the GSM system. These messages from the base station arrive at the mobile phone at certain intervals (approximately 2 to 10 seconds), which makes it known to the mobile phone that it can be switched to the inactive state between them, or can be excited to receive a control channel message (on a control channel BCCH, Broadcast Control Channel, reserved for this purpose). Another similar situation occurs when the mobile phone enters a bad area and cannot contact the base station. Then the mobile phone is temporarily switched to the idle state to save power and the mobile phone is energized at intervals to test whether a connection to the base station can be established. In the analog NMT mobile phone system, the corresponding state is the battery saver mode in which the mobile phone, according to information received from the base station, knows that it can switch to the idle state for a certain period.

In general, the voltage regulator can be switched to a slower mode (i.e. lower accuracy) when the device (the mobile phone, the computer, the measuring equipment, etc.) is switched on but is functionally in a passive state (or not performing the actual functions of the device), but it is not desirable to switch off the supply voltages of the circuits.

Embodiments of the invention will now be described by way of example with reference to the accompanying drawings.

Fig. 1 is a block diagram of a known voltage regulator;

Fig. 2 is a block diagram of a voltage regulator according to the invention;

Fig. 3 is a circuit diagram of a differential amplifier used in voltage regulators;

Fig. 4 is a control circuit for use with the differential amplifier of Fig. 3 according to the invention;

Fig. 5 is a modified version of the control circuit of Fig. 4 according to the invention;

Fig. 6 is another embodiment of the voltage regulator control circuit according to the invention;

Fig. 7a is a block diagram of a first arrangement used to generate a control signal according to the invention;

Fig. 7b is a block diagram of a second arrangement used to generate a control signal according to the invention; and

Fig. 7c is a block diagram of a third arrangement used to generate a control signal according to the invention.

Fig. 1 has already been described in connection with the description of the prior art.

Fig. 2 shows a block diagram of a voltage regulator according to the invention. A reference voltage VRef generated by the reference voltage source 1 is applied to the first input 6 (non-inverting input) of the deviation amplifier 2. The output 8 of the deviation amplifier is connected to the base of the output transistor 3 (here a pnp transistor) and the collector of the output transistor 3 is connected as part of a feedback loop to the second input 7 (inverting input) of the deviation amplifier 2. The supply voltage VBat to be regulated is supplied by a battery to the emitter of the output transistor. The output signal Vout of the voltage regulator is obtained at node 4 of the output from the transistor collector and the feedback of the deviation amplifier. ten, generally a load 5, represented by capacitor 5 in Fig. 2, is connected between node 4 and ground GND to stabilize the output coupling so that it does not oscillate. In a voltage regulator according to the invention, the error amplifier 2 is supplied with an auxiliary intermediate input signal SLEEP to receive a control signal by which the voltage regulator feedback loop can be controlled to have a slower response time, resulting in a reduction in its power consumption. The response time relates to the maximum speed with which the system can respond to an input signal. By a separate control signal received at the auxiliary intermediate input SLEEP, the voltage regulator can be switched back to the original speed at which it has normal power consumption.

In Fig. 2, the deviation amplifier (differential amplifier) is an operational amplifier that drives an external bipolar transistor, e.g. a pnp transistor, which acts as the output transistor 2 of the voltage regulator in Fig. 2. Accordingly, the voltage source supplies a current via the output transistor 3 that is regulated by the output of the operational amplifier, thereby providing a regulated voltage.

Fig. 3 is a circuit diagram of a differential amplifier, normally an operational amplifier. It comprises a differential amplifier stage in which MOS transistors form a differential pair M1, M2 and a current mirror M3, M4, with a current source transistor M5. A current source IBIAS is created by a transistor M6 which, in combination with the transistor M5, forms a current mirror which mirrors the bias current Ibias supplied by the bias supply to the differential stage, and there is a compensation capacitor Cc. The operational amplifier circuit shown in Fig. 3 is known to those skilled in the art. The operational amplifier may further comprise as an output stage, for example, an inverter of the push-pull type in a known manner.

The rollover speed (SR) of the differential amplifier depends on the current ISS flowing in the current source transistor M5 and the capacitance % of the compensation capacitor according to the equation SR = ISS/CC, where the unit of SR is generally given as V/us. The rollover speed (SR) of the differential amplifier determines the speed of the voltage regulator feedback loop and, accordingly, the accuracy of the voltage regulator output voltage Vout. As can be seen from the above formula As can be seen, the switchover speed (SR) of the differential amplifier falls as the current ISS flowing in the current source transistor M5 decreases, and accordingly the speed of the feedback loop of the current regulator is lower when the current ISS is smaller.

The tilt speed SR or the current ISS can be controlled according to the invention in at least two different ways, firstly by controlling the bias current Ibias as shown in Fig. 3, or secondly by varying the currents Ibias and ISS. An example of an embodiment of the first control method is shown in Figs. 4 and 5, and an example of an embodiment of the second control method is shown in Fig. 6.

Fig. 4 shows a circuit diagram of a voltage regulator control circuit according to the invention, wherein the bias current (Ibias, as shown in Fig. 3) of the differential amplifier of the voltage regulator is controlled. (The width/length ratio (or W/L ratio) of the transistors M5 and M6 shown in Fig. 3 is unchanged.) The bias current Ibias of the operational amplifier controls, via the current mirror formed by the transistors M5 and M6, the current ISS flowing into the differential amplifier stage. The current generator of Fig. 4 is located in the place of the current source IBIAS shown in Fig. 3, that is, the current generator according to Fig. 4 is connected to the point 9 in Fig. 3. The current generator in Fig. 4 consists of a transistor M7 operating as a controlled switch and two resistors R1 and RIS which, as shown, are connected to the supply voltage VDD (e.g. +5 V, which can be directly the battery voltage). Depending on whether the transistor M7 is conducting or not, either the one resistor R1 or the parallel connection of the resistors R1 and RIS is connected in series with the transistor M6. The circuit of Fig. 4 can be realized by an integrated circuit using MOS technology (as shown in Fig. 5) using two MOS transistors MR1 and MRIS acting as the two resistors R1 and RlS. In Figs. 4 and 5, the control input SLEEP is connected to the gate of the transistor M7. When the electronic device is in normal operation, the input SLEEP receives the supply voltage VDD, which switches the NMOS transistor M7 into the conducting mode and the bias current 1bias is then determined by the parallel connection of the resistors R1 (MR1) and RIS (MRIS), giving the following result: Ibias = (VDD/RIS) + (VDD/R1) = {(1/RIS) + (1/R1)} VDD. If it is desired to drive the voltage regulator to a slower state, a supply voltage below VDD, or in this case the ground potential GND, is connected to the SLEEP input, so that the NMOS transistor M7 is switched to the off state and the bias current Ibias is determined only by the resistor R1 (MR1), that is, the bias current Ibias = VDD/R1 = (1/R1)VDD is obtained, which is lower than in normal operation.

Fig. 6 shows the circuit diagram of the second voltage regulator control circuit according to the invention, in which the ratio of the bias current = bias of the differential amplifier of the voltage regulator and the current ISS flowing in the differential stage is controlled. The current mirror formed by the transistors M5 and M6 shown in Fig. 3 provides the differential stage current ISS as a mirror image of the bias current Ibias in accordance with the W/L ratio (width/length ratio) of the transistors M5 and M6 in the following way: IS5/Ibias = (WM5/LM5)/(WM6/LM6) = (LM6WM5)/(WM6LMB), or the current of the differential stage has the value ISS = {(LM6WM5)/(WM6LM5)}Ibias. Here it can be seen that a reduction in the W/L ratio for the gate of the transistor M5 reduces the current ISS in the differential stage. The W/L ratio can be changed by connecting another transistor M5S in parallel with transistor M5, as shown in Fig. 6. Points 10 and 11 plotted in Fig. 6 correspond to points 10 and 11 plotted in Fig. 3. When transistor M5S is connected in parallel with transistor M5, their combination corresponds to a single transistor M5' with gate dimensions formed by the sum of the gate dimensions of transistors M5 and M5S, with (WMBI/LM5') = (WM5/LM5) (WM5S/LM5S) A transistor such as the NMOS transistor in Figs. 4 and 5 can be used as switch 51 in Fig. 6, and when the electronic device is in normal operation, the SLEEP input receives the supply voltage VDD, causing switch 51 to be closed or conducting. Here, there is a parallel connection of the resistors M5 and MSS, which results in a higher W/L ratio. When the voltage regulator is controlled to a slower or lower power consumption state, a supply voltage below VDD, or in this case the ground potential GND, is applied to the SLEEP input, which opens the switch 51 and the current ISS flows only through the transistor M5. A lower W/L ratio is obtained, and so a smaller current ISS flows through the differential stage than in normal operation.

If the electronic device has several voltage regulators, a common current generator, such as the current generator in Fig. 4 or 5, can be used for all voltage regulators, particularly for their differential stages. All voltage regulators can then be controlled into either the normal operation or the lower speed state simply by using a single common control and a single common resistor RIS or transistor MRIS in the solution in Figs. 4 and 5. When the solution in Fig. 6 is used, a transistor M5S must be connected in parallel with the current source transistor M5 in the differential stage of each voltage regulator. However, if all transistors M5S are of the same type, their control can be combined as a single common input line SLEEP. An advantage of the solution in Figs. 4 and 5 is that since the bias current Ibias is controlled, a lower bias current Ibias is supplied by the current generator in addition to a lower differential stage current ISS.

The SLEEP signal can be supplied to the voltage regulator in two different ways. In the first alternative, the SLEEP signal can be supplied as a digital signal from an external source to the circuit containing the voltage regulator. The signal can be supplied, for example, by the microcontroller 12 of the electronic device or by any corresponding circuit 13 controlling the functions of the device, as shown in Figs. 7a and 7b. Other circuits (19) of the electronic device (which can be a mobile phone) to which the voltage regulator supplies the regulated supply voltages can also be controlled by the microcontroller 12 or the circuit 13. Within the integrated circuit containing the voltage regulator, the SLEEP signal can be buffered in a buffer 14 if necessary so that it is supplied at a suitable level for the switch M7 or Sl.

As a second alternative, the signal SLEEP can be generated within the circuit IC containing the voltage regulator. If the voltage regulator has to supply a current according to a regular event, e.g. in a digital mobile phone in synchronism with the transmitter pulse train 16 (which can be e.g. 50 Hz or 200 Hz), or in synchronism with the battery charging pulse train 15 during a buffer charging process (with e.g. a frequency of 1 Hz), the signal SLEEP can be generated by the state machine 17 by means of the above-mentioned pulses or any corresponding pulses. Such a state machine 17 requires information e.g. on the transmission start point 18, whereupon it can itself synchronize the signal SLEEP by means of the pulse trains or any corresponding signals. Fig. 7c shows how a state machine as part of the circuit IC containing the voltage regulator containing circuit IC and the SLEEP signal is generated for the voltage regulator. As in the case of the external connection, the state machine 17 provides an output signal that can be buffered to a suitable level.

The power consumption of an electronic device containing at least one voltage regulator can be reduced simply by switching the voltage regulator's control loop to a slower state during periods when the normal voltage regulator accuracy is not required. A situation like this can occur when the device is generally operated in the passive state, but also when a circuit receiving its supply voltage from a particular voltage regulator is in a state where its supply voltage does not need to have the normal accuracy. One such circuit is, for example, the oscillator, by which the voltage regulator providing the supply voltage to the oscillator can be switched to lower accuracy, for example in a radio telephone which neither transmits nor receives, information about which is then available to the microcontroller 12 or other circuit 13 controlling the functions of the radio telephone.

In view of the above description, it will be apparent to those skilled in the art that various modifications can be made within the scope of the invention. For example, instead of the operational amplifier in Figures 1 and 2, a component with similar properties could be used.

The scope of the invention includes any novel features or combinations of features as explicitly or implicitly disclosed herein, or any generalization thereof, whether or not related to the claimed invention or whether or not it alleviates all of the problems addressed by the invention. Applicant hereby indicates that new claims for such features may be formulated during the prosecution of this application or any further application derived herefrom.

Claims (13)

1. Voltage regulator for supplying a regulated output voltage (Vout) from a voltage source (VBat), having an input for the voltage source (VBat), an output for supplying the regulated output voltage (Vout) and a feedback loop for controlling the input voltage towards the regulated output voltage (Vout), characterized in that the voltage regulator further comprises an auxiliary input (SLEEP) and means (M7, RIS; M7, MRIS; S1) for controlling the response time (SR) of the feedback loop in accordance with a signal (SLEEP) input at the auxiliary input (SLEEP). 2. A voltage regulator according to claim 1, wherein an operating current (ISS) is supplied to the feedback loop and the means for controlling the response time comprises means (M7, RIS; M7, MRIS; 51) for controlling the operating current. 3. Voltage regulator according to claim 2, wherein a reduction in the operating current (ISS) leads to a reduction in the response time (SR) of the feedback loop and an increase in the operating current leads to an increase in the response time of the feedback loop. 4. Voltage regulator according to claim 2 or 3, wherein the feedback loop comprises a differential amplifier (2) and the operating current is the operating current (ISS) of the differential amplifier. 5. Voltage regulator according to claim 4, in which a tilt speed (SR) applicable to the differential amplifier (2) depends on the strength of the operating current and accordingly the response time of the feedback loop is correspondingly dependent. 6. Voltage regulator according to one of the preceding claims, further comprising a transistor (3) with a first node acting as an input for the voltage source (VBat), a second node acting as an output for the regulated voltage (Vout), and a third node acting as a feedback of the feedback loop. 7. Voltage regulator according to claim 4, wherein the differential amplifier comprises a current mirror in which the operating current and a bias current mirror each other, so that the means for controlling the operating current of the differential amplifier comprises means for controlling the bias current. 8. Voltage regulator according to claim 4, wherein the differential amplifier has a current mirror in which the operating current and a bias current mirror each other, so that the device for controlling the operating current of the differential amplifier has a device for controlling the ratio of the operating current and the bias current in the current mirror. 9. Electronic device with the voltage regulator claimed by any one of claims 1 to 6. 10. A method of controlling a voltage regulator having a feedback loop by controlling the response time of the feedback loop in accordance with a signal input to an auxiliary input of the feedback loop. 11. The method of claim 10, wherein the step of controlling the response time comprises controlling the output current of the feedback loop. 12. The method of claim 11, wherein the operating current is increased to increase the response time and the operating current is decreased to decrease the response time. 13. Method according to one of claims 10 to 12, in which the voltage regulator is built into an electronic component and the signal input at an auxiliary input has its origin in the electronic device.