DE69428949T2 - Procedure for discovering adjacent answering devices - Google Patents

Description

FIELD OF INVENTION

This invention relates to a method for interrogating remotely located transponders. The invention further relates to an arrangement for interrogating remotely located transponders of the type defined in the preamble of claim 10 and to an interrogation device as defined in the preamble of claim 15.

BACKGROUND OF THE INVENTION

Transponder arrangements of the above-mentioned type are disclosed in EP-A-0 600 374 and EP-A-0 301 172.

There is a great need for devices or equipment that enable the identification or detection of objects that are connected to such devices or equipment in a contactless manner and over a certain distance, in relation to their presence at a certain location. An additional requirement is that they must be able to determine whether two or more transponders are adjacent.

SUMMARY OF THE INVENTION

In accordance with the present invention, the presence of neighboring transponders is detected by measuring the duration of the response signal from the transponders. In the transponder arrangements described in U.S. Patent No. 5,053,774 (which is equivalent to EP-A-0 301 127) and in Patent Application No. 07/981,635 (which is equivalent to EP-A-0 600 374), both assigned by Josef H. Schuermann to Texas Instruments, the normal time interval for response to an RF interrogation is about 20 ms, during which the transponder is normally operational to provide a 128-bit response message. After this 20 ms time interval, the output of the transponder is squelched. The squelch of the response signal is performed by a transponder timer, which is controlled by the burst end (with the end of the excitation signal). This timer counts up to 128 (bits) and then discharges the transponder charging capacitor.

The present invention is the first to use coupling between adjacent transponders to determine whether two or more transponders are adjacent. When two transponders are adjacent, they are both charged and respond individually to an RF interrogation. Thus, when one transponder transmits a response signal, its field strength radiates into the other transponder. This radiated signal interferes with the oscillation maintained in the resonant circuit of the other transponder. The interference from the cross-coupled responses causes a beat in the resonant circuit of both transponders. This "beat" is similar to the phenomenon heard by musicians when they tune two out-of-tune instruments. Because the instruments have different frequencies, a time-varying pattern of constructive interference (where the acoustic signals are in phase and increase the sound intensity) and destructive interference (where the acoustic signals are 180º out of phase and decrease the sound intensity) can be heard. This time-varying pattern is called "beat."

This beating effect can occur in both transponders. Time intervals of destructive interference simulate the end of burst effect for each transponder, which resets the timer in a repetitive manner (since each end of burst resets the timer). Resetting the timer opens a new 128 ms window for the logic and transponder to transmit a data signal. Therefore, the transponder's discharge function is disabled by this beating effect in a repetitive manner, with the transponder transmitting until the charging capacitor is completely discharged.

A beat effect can also occur between the transponder according to the present invention and other transponders such as those manufactured by manufacturers other than the assignee of the present invention. Interference from another type of transponder also causes a beat in the resonant circuit and a repeated resetting of the timer.

According to various aspects of the present invention, a method and an apparatus according to the claims are provided.

SHORT DESCRIPTION OF THE DRAWING

In the drawing:

Figure 1 is a block diagram of a preferred interrogator and base unit;

Fig. 2 is a block diagram of a preferred transponder;

Fig. 3 is a more general block diagram of the preferred arrangement showing its salient features; and

Fig. 4 shows waveform representations for antenna signals for a normal transponder response without interference from neighboring transponders and for a transponder response when another transponder is in close proximity.

In the different figures, like reference numerals and symbols designate like parts unless otherwise indicated.

DETAILED DESCRIPTION OF PREFERRED EMBODIMENTS

In Fig. 1, the transponder arrangement to be described comprises an interrogator 10 and a transponder 12. The interrogator 10 is preferably designed to be hand-held by an operator and to transmit an RF interrogation pulse upon actuation of a button 14. This interrogator 10 also has the ability to receive RF signals and to detect information contained in the signals. The RF signals come from the transponder 12, which in this embodiment responds to the transmission of an RF interrogation pulse by sending back the RF signal, which preferably has the same frequency as the interrogation pulse. Preferably, the RF signal is modulated by the transponder 12 using frequency shift keying (FSK) frequency modulation. keying = FSK). The interrogator 10 is assigned a base unit 16, which is designed as a stationary unit. The functions of the interrogator 10, the transponder 12 and the base unit 16 and their interaction are described in more detail below. First, the structure of these units is explained.

The interrogator 10 contains a microprocessor 18 as a central control unit, which is responsible for controlling the functional sequences. An RF oscillator 20 generates RF oscillations as soon as it is activated by a signal at the output 22 of the microprocessor 18. The output signal of the RF oscillator 20 can be supplied to a coupling coil 32 either via a switch 24 and an amplifier 26 or via a switch 28 and an amplifier 30. The switches 24 and 28 are controlled by the microprocessor with the aid of signals sent to its outputs 34 and 36, respectively. A coil 38 of a resonant circuit consisting of the coil 38 and the capacitor 40 is coupled to the coupling coil 32. A resistor 44, which can be bridged by a switch 42, is connected in series with the coil 38 and the capacitor 40, with a further switch 46 between the resistor 44 and ground. The switches 42 and 46 are controlled by the microprocessor, which sends corresponding control signals to its outputs 48 and 50. When the switch 46 is closed, the resonant circuit with the coil 38 and the capacitor 40 acts as a parallel resonant circuit, while when the switch 46 is open, it acts as a series resonant circuit. The coil 38 serves as a transmitting and receiving coil, transmitting the RF interrogation pulse delivered to it by the oscillator 20 and receiving the RF signal sent back by the transponder 12.

The RF signals received by the resonant circuit are supplied to two amplifiers 52, 54 designed to amplify and limit the received RF signals for pulse shaping. A parallel resonant circuit 56 is connected to the amplifiers to ensure the required reception selectivity. The output of the amplifier 54 is connected to a clock generator 58 which generates a clock signal from the signal supplied to it and sends it to the input 60 of the microprocessor 18.

In addition, the output signal of the amplifier 54 is sent to a demodulator 62, which demodulates the signal applied to it and sends it to the input 64 of the microprocessor 18.

The information contained in the received RF signal is sent, after demodulation in the demodulator 62, via the microprocessor 18 to a random access memory 66 so that it can be stored therein. A bidirectional connection 68 is provided between the microprocessor 18 and the random access memory 66, which enables information to be input from the microprocessor 18 into the random access memory 66 and also enables information to be transferred in the opposite direction. The information stored in the random access memory 66 can be read at a socket 70.

A display unit 72 fed by the microprocessor 18 enables the operator to view the information contained in the received RF signal.

Since the interrogator 10 is a portable device, a rechargeable battery 74 is provided as a power supply. The output voltage of the battery 74 is applied to the terminals marked "+" of selected chips in the interrogator 10 after closing a switch 76. However, the supply voltage is applied to the two amplifiers 52, 54, the clock generator 58 and the demodulator 62 via a separate switch 78 which is controlled by the microprocessor 18. This makes it possible to supply those circuit elements with voltage and thus activate them only during a predetermined time interval within the entire operating cycle.

The battery 74 can be charged by a voltage that is induced in a coil 80, rectified in a rectifier 82 and smoothed by a capacitor 84. Preferably, the voltage is induced in the coil 80 via a coil 112 in the base unit 1b. A charge sensor 86 detects when a charging voltage is induced in the coil 80, ie when a charging process of the battery 74 takes place. It then sends a corresponding message signal to the input 88 of the microprocessor 18.

Another switch 90, controlled by a signal from the output 92 of the microprocessor 18, can, when closed, provide the output signals of the RF oscillator 20 via an amplifier 94 to a coupling coil 96. The switch 90 is typically used to activate the transmission of an RF interrogation pulse to a transponder 12 to initiate data transmission to or from it.

The RF oscillator 20 can be modulated by means of a modulator 98. The modulation signal required for this purpose is supplied to the modulator 98 by the microprocessor 18 via a switch 100 controlled by a signal from its output 102. The modulation signal from the microprocessor 18 is also supplied to a coupling coil 104 when the switch 100 is closed.

The base unit 16, also shown in Fig. 1, is a stationary unit that is connected to the mains supply network via a socket 106. In a power supply 108, the working voltage is generated for a charging voltage generator 110, the output signal of which is fed to a coil 112. A switch 114 is inserted between the power supply 108 and the charging voltage generator 110. The switch 114 is always closed when the interrogator 10 is arranged on the base unit 16. This is symbolically shown in Fig. 1 by a type of setting switch 116 on the boundary line of the interrogator 10. The coils 112 and 80 are spatially arranged in the base unit 16 and the interrogator 10 in such a way that when the interrogator 10 is arranged on the base unit 16, they work like the primary winding and the secondary winding of a transformer. In this way, the battery 74 can be charged as often as necessary without contact. The coils 96 and 104 in the interrogation device 10 are arranged so that they are spatially very close to a coil 118 when the interrogation device 10 is arranged on the base unit 16. In this way, a contactless signal transmission is possible between the coil 96 and the coil 104 on the one hand and the coil 118 on the other. A demodulator 120 is used to demodulate the signals coming from the coil 118.

The transponder 12 of the preferred embodiment shown in Fig. 2 includes a parallel resonant circuit 130 having a coil 132 and a capacitor 134 for receiving the RF interrogation pulse. A capacitor 136 is connected to the parallel resonant circuit 130 and serves as an energy accumulator. In addition, the parallel resonant circuit 130 is connected to an RF bus 138. The resonant circuit 130 functions as a receiver and as a transmitter in a manner known per se. A clock regenerator circuit receives the RF signal from the RF bus 138 and regenerates a clock signal 139 having a substantially rectangular waveform. A burst end detector 142 connected to the RF bus functions to monitor the power level of an RF carrier on the RF bus 138. Such an RF carrier appears on the RF bus 138 whenever the parallel resonant circuit 130 receives an RF interrogation pulse from the interrogator 10. The end of burst detector 142 sends an RF threshold signal of a predetermined value at its output as soon as the power level of the RF carrier on the RF bus 138 falls below a predetermined threshold value. By connecting a diode 144 to the RF bus 138, the RF carrier is rectified, with the result that the capacitor 136 is charged. The energy stored in the capacitor 136 is proportional to the energy contained in the RF interrogation pulse. Thus, after the RF interrogation pulse has been received, a DC voltage can be taken from the capacitor 136. A zener diode function 146 connected to capacitor 136 ensures that the DC voltage that can be tapped does not exceed a value defined by the zener voltage of diode 146, which zener diode function 146 can be fulfilled in actual implementations such as in an integrated circuit by various voltage limiting circuits well known in the art. A zener diode function 146 fulfills a similar function to prevent the voltage on RF bus 138 from becoming too high. In response to an interrogation from transponder 12, interrogator 10 initially sends an RF signal to transponder 12 for the express purpose of charging it. This is referred to as the charging phase.

A POR circuit (POR = Power-On-Reset), not shown, supplies a POR signal to a start detection circuit 154. This POR Circuit monitors the Vcc level and is activated when it rises from a level below a certain DC threshold to a level above a certain DC threshold. Typically, the POR signal occurs during the charging phase of the transponder. POR circuits are well known in the art; in fact, they are commonly used in most circuits in the class of circuits known as "state machines" that can be initialized to a known state. After receiving the POR signal, starter detection circuit 154 then monitors output 150 of end of burst detection circuit 142. An end of burst (EOB) signal is provided at output 150. After receiving a valid EOB following a valid POR signal, starter detection circuit 154 turns on clock regenerator circuit 140 via switch 156. The clock regenerator circuit 140 conditions the signal from the resonant circuit 130 and provides a regenerated RF clock that preferably corresponds to a square wave. The output of the start detection circuit 154 remains positive until a subsequent POR is received. All parts of the transponder other than the clock regenerator 140 are constantly supplied with Vcc, but consume a negligible amount of power in their inactive state (ie, when the clock regenerator 140 is inactive) due to the use of low power CMOS technology.

In Fig. 2, a divider 158 receives a clock signal 139 and preferably divides its frequency by eight. A plucking circuit 192 preferably sends a short pulse whenever it is triggered by the divided clock signal it receives from divider 158. This plucking circuit 192 maintains the oscillation of the resonant circuit 130 by momentarily turning on the field effect transistor or FET 190, thereby establishing a conductive path between the resonant circuit 130 and ground via the RF bus 138 so that the resonant circuit derives electrical energy from the storage capacitor 136. This plucking circuit 192 is named metaphorically to describe that it maintains the oscillation of the resonant circuit 130 in the same way that plucking a guitar string maintains its oscillation. Although this "plucking" action temporarily lowers the voltage on the RF bus 138, the duration of the pulse is sufficient the given channel resistance of the FET 190 is not sufficient to reduce the voltage below the threshold at which activation of the burst end detection circuit 142 is triggered. A second divider 160 divides the clock signal 139 by two again so that the clock frequency at the output of the divider 160 is 1/16 of the original clock frequency.

With continued reference to Fig. 2, the read circuitry for the preferred embodiment will now be described. Connected to the output of the second divider 160 is the shift clock input 176 of an output shift register 172 so that data is shifted through this register 172 at 1/16 of the original clock frequency. The output shift register 172, after receiving a "load" signal from the output of the starter detection circuit 154 at its shift/load input 174, receives a parallel load from the memory 168 or other source via the data bus 220. Following loading of the output shift register 172, the signal from the starter detection circuit 154 is driven positive and a "shift" signal is received at the shift/load input 174 of the register 172. When the "shift" signal is positive, the data is shifted through the output shift register in response to the clock signal received at shift clock input 176 at 1/16 of the original clock frequency. As shown in the figure, the data is fed back through the output shift register 172 via data path 182 and is also fed to the gate of the FET or modulator 200 via data path 182. Preferably, the output shift register data is low for a certain time (pre-bit time) and is high or low depending on the data loaded therein. The pre-bit time is used in this embodiment to allow the interrogator receiver coil 38 time to recover from the power burst overload (load phase) and to distinguish the read function from the write function, as described below. When the output of the output shift register 172 is low, the FET 200 is turned off. When the output of the output shift register 172 is high, the FET 200 turns on, thereby connecting the capacitor 198 to the resonant circuit 130 and lowering its resonant frequency. The FET 200 serves primarily as a switch under the control of the output shift register 172, which connecting or leaving unconnected the capacitor 198 which modulates the frequency of the resonant circuit 130. In this manner, frequency modulation of the resonant or carrier frequency of the resonant circuit 130 is performed in response to data applied to the FET 200. A low or "zero" signal is reproduced when the original resonant frequency of the resonant circuit 130 is maintained during a bit period. A high or "one" signal is reproduced when the new resonant frequency of the parallel combination of the original resonant circuit 130 and the parallel capacitor 198 occurs within a bit period.

Referring again to Fig. 2, the operation of a discharge logic circuit will now be described. A timer 184 receives the output of divider 160 at its input 186 and divides the clock signal again by 128. The divisor of timer 184 is 128 in this case due to the preferred data transmission bit length of 128. If this bit length is to be changed, the divisor of timer 184 preferably changes accordingly. A diode 210 maintains the unidirectional flow of current from timer 184 into a parallel RC combination of capacitor 212 and resistor 214, which maintains the charge on the gate of a field effect transistor or FET 216 for a given duration. The capacitor 212 can be charged by the timer 184 through the diode 210, but it must be discharged through the resistor 214. The FET 216 serves to provide a low resistance discharge path for the storage capacitor 136 to ground when the gate of the FET 216 is held above a threshold voltage by the parallel combination of the resistor 214 and the capacitor 216. In this way, the energy remaining in the transponder 12 after the transmission of a complete data frame, in this case 128 bits (read phase), from the transponder 12 to the interrogator 10 is normally removed by shorting the charge capacitor 136. This action ensures that the transponder is correctly triggered during the next charging phase and does not remain in an undefined or incorrect state, which could block subsequent charging. In addition, thanks to this function, every transponder 12 in the area of the interrogator 10 has the same starting condition.

Referring again to Fig. 2, the circuit arrangement of the transponder 12 shown therein, with which data can be written to it (write function), will now be described. In a preferred embodiment of the invention, the interrogator 10 can subject the RF interrogation pulse to pulse pause modulation (PPM), as shown in Fig. 4. This signal is reflected onto the RF bus 138. As is known per se, a pulse pause modulation system operates by alternately activating and deactivating a carrier wave. During the time interval in which the carrier is deactivated, the end of burst detector 142 detects a decrease in RF energy and is activated. After the start detection circuit 154 is enabled by the POR signal, it is activated by the first EOB signal triggered by the start bit (see Fig. 4). Although a start bit is used in this preferred embodiment because each data bit state is transmitted by the presence or absence of a carrier wave off phase, as will be described in more detail below, other embodiments are possible in which no start bit needs to be transmitted. The duration of the time interval known as the "off" phase during which the carrier is deactivated is less than the pre-bit time of the read phase. This particular requirement is imposed in this embodiment because the output shift register 172 begins shifting during the off phase. However, since the pre-bit time is longer than the off phase, the output shift register can only shift out zeros, so that the FET 198 is never actually activated and inverted and no unwanted modulation of the carrier 138 occurs. The EOB signal is then deactivated when the carrier returns. The activations and deactivations of the EOB signal serve to provide a data stream to the input 266 of the input shift register 228. Regardless of the EOB transitions, the start capture circuit 154 maintains its output activity until a new POR signal is received, thereby maintaining the power to the clock regenerator circuit 140 via switch 156.

A fourth divider 162 is provided which receives the clock signal from the second divider 160 and divides it again by 16 to provide an input clock signal to the clock input 227 of the input shift register 228. In the preferred embodiment, the write data rate is then 1/256 of the Resonant frequency or receive clock frequency. Care must be taken to ensure that the data is shifted into the input shift register 228 while the data is stable. This can be ensured in the following manner. The fourth divider 162 is activated by the start detection circuit 154 through the AND gate 155. Each subsequent "zero" bit or "low" bit received by the end of burst detection circuit 142 drives the output 150 of the burst detection circuit 142 to a positive level. The positive level signal is then received by the negative logic input of the AND gate 155. The negative logic input is indicated by a "bubble" at the input of the AND gate 155, as is well known. By definition of the AND function, the output of the AND gate 155 is then positive, enabling the fourth divider 162 and synchronizing the input clock with the input data.

The end detection circuit 234 detects the end of a data frame when a particular bit combination is contained in the input shift register 228 and then activates the programming logic 232 if a programming command was previously received from the command decoder 230. The data is then transferred from the input shift register 228 to the memory 168 or to another memory via a parallel data bus 220. Preferably, the memory to which the data is transferred is an electrically erasable read only memory (EEPROM).

The end-of-burst detector 142 generally serves as a PPM demodulator. Many other modulation schemes for radio communications are known in the art, and for those schemes, a different demodulator could be used instead of the end-of-burst detector.

In this preferred embodiment, it is also provided to initiate a test sequence via a test logic 236. The test logic 236 receives signals from the instruction decoder 230 and data from the data bus 220 and can initiate numerous test routines as are commonly implemented in the field of logic circuit design. The results of these test routines can then be placed on the data bus 220 and output by the shift register 172 via the field effect transistor 200 to the modulation circuitry.

In the preferred embodiment of the invention, a programmable tuning network 238 is provided. This programmable tuning network 238 operates by switching a network of parallel capacitors 240, each capacitor 240 being connected to ground through a field effect transistor 242. Each field effect transistor is connected to a latch 244 which receives and latches data from the memory 168 or from the instruction decoder 230 via the data bus 220 under the control of a latch signal 246 from the instruction decoder 230. By switching a field effect transistor 242 to a conducting "ON" state, its associated capacitor 240 is connected in parallel with the parallel resonant circuit 130. This additional capacitance lowers the resonant frequency of the parallel resonant circuit 130. By switching a field effect transistor 242 to a blocking "OFF" state, its associated capacitor 240 is electrically isolated and has no effect on the parallel resonant circuit 130. A network 238 of FET/capacitor pairs 240, 242 can provide different values for the additional capacitances depending on the combinations of the relative values of the individual capacitors 240, as is well known. Alternatively, the latch 244 could be a one-time programmable (OTP) memory so that the data is permanently stored therein and the device can be permanently programmed to determine the value of the programmable tuning network 238.

The divisors of the dividers disclosed in the embodiments and listed here are chosen to suit the specifics of each design. In any case, the divisors should be chosen to best perform the task for which they were designed.

Referring to Fig. 3 in conjunction with Figs. 1 and 2, it is assumed that there are at least two transponders 12, 12a in the region of the coil 38 which transmits the RF interrogation pulse. A power/Xmit circuit arrangement 300 is provided for energizing the coil 38. As an alternative configuration, a separate antenna 39 could be provided as a "transmit" antenna, and the coil 38 could be used as the "receive" antenna 38. Preferably, the coil 38 would however, serve as both a "transmit" antenna and a "receive" antenna. The power/Xmit circuitry 300 could preferably include the oscillator 20 and amplifier 26 of the interrogator 10 of Fig. 1 according to the preferred embodiment. The coil 132 of the parallel resonant circuit 130 (Fig. 2) of the transponder 12, 12a then receives this RF interrogation pulse to cause the resonant circuit 130 to oscillate. The rectifier diode 144 rectifies the RF oscillation in the portion 138a of the RF bus 138, charging the capacitor 136 with DC current. Only the energy stored in the capacitor 136 is then used to power the transponders 12, 12a. A "read" circuit 302 is then provided to receive the transponder's response. The "Read" circuit 302 preferably includes clock generator 58 which could also provide a carrier detect signal (CD signal) to the microprocessor; otherwise, microprocessor 18 could interpret the absence or presence of a clock signal as a carrier detection. A timer 304 would preferably be provided in microprocessor 18 of interrogator 10. Timer 304 would then measure the duration of the presence of a clock signal. From the data signal from "read" circuit 302 and the output of timer 304, decoder 306 could determine whether a) the read was successful, such that the data was valid and CD was less than or equal to 20 ms, b) the read was unsuccessful, such that CD was not detected, and c) CD was greater than or equal to 20 ms, thus more than two transponders are present in the interrogator's vicinity. The functions of the decoder 306 are preferably performed by the microprocessor 18 of the preferred interrogator 10.

Referring to Fig. 4, the RF level on the RF bus 138 begins to drop as the reception of the RF interrogation pulse ceases. The end of burst detector 142 detects this drop and sends an EOB signal of a predetermined value at its output 150 when the power level drops below a predetermined level. The timer 184 is reset by EOB.

After the excitation pulse at the output of the plucking circuit 192 has ended, the field effect transistor 190 is blocked so that no more current can flow through the coil 132 However, since the parallel resonant circuit 130 is of high quality, the RF carrier oscillation does not stop immediately, but the resonant circuit continues to oscillate with a damped oscillation. The divider 158, which divides the frequency of the RF carrier wave by two, sends a signal to the monostable multivibrator 192 after the second oscillation period, which is thereby triggered. The monostable multivibrator 192 applies a sustain pulse to the field effect transistor 190 for the duration of its hold time. The sustain pulse from the plucking circuit 192 for the duration of the hold time causes a current to flow through the coil 132, which means that energy is "pumped" into the RF carrier wave generator for a short time. The pumping effect occurs after every nth oscillation period of the RF carrier wave due to the use of the divider 158.

It is assumed that the data in the memory 168 is permanently stored and is exclusively assigned to the transponders 12, 12a. The data can consist of 128 bits, for example. The information in the memory 168 is transferred to the output shift register 172 at the rate of the clock signals applied to the clock input 176. 128 pulses are required for this transfer process so that all 128 data bits of information are then contained in the shift register 172. By additionally counting the clock pulses, the timer 184 determines when the transfer of data is complete. After receiving 128 pulses, timer 184 sends a signal at its output 188 through diode 210 to FET 216. The divisor of timer 184 is 128 in this case due to the preferred data transmission bit length of 128. If this bit length is to be changed, the divisor of the third timer 184 preferably changes accordingly. Diode 210 maintains unidirectional current flow from timer 184 into a parallel RC combination of capacitor 212 and resistor 214, which maintains the charge on the gate of a field effect transistor or FET 216 for a given duration. Capacitor 212 can be charged by timer 184 through diode 210, but must be discharged through resistor 214. The FET 216 serves to create a low-resistance discharge path for the storage capacitor to ground. In this way, after the transmission of a complete data frame, in this case 128 bits (read phase), from the transponder 12 to the interrogator 10, the energy remaining in the transponder 12 is normally removed by shorting the charging capacitor 136. This action ensures that the transponder is correctly triggered during the next charging phase and does not remain in an undefined or incorrect state, which could block subsequent charging.

In this case, when two or more transponders 12, 12a are adjacent, the interrogator 10 shall detect such a condition to prevent the overlapping signals from the transponder 12, 12a from being considered as valid data. To utilize the result of crosstalk between adjacent transponders 12, 12a, the interrogator 10 may sense the presence of adjacent transponders 12, 12a. When such a condition has been detected, the interrogator 10 may take an action such as more stringent or selective addressing of the transponders 12, 12a or notifying the user. In the case of two adjacent transponders 12, 12a, both are charged, responding as a single transponder 12 would, with its field strength radiating into the other transponder because of the close mutual coupling. This close coupling causes a "beat" in the resonant circuit 130 of each transponder because their frequencies differ slightly. This "beat" during time intervals of destructive interference (e.g., the signal in the resonant circuit 130 of one transponder 12 may be 180º out of phase with the coupled signal from the other transponder 12a) causes the end of burst detector 142 to reset the timer 184. Resetting the timer 184 opens a new 128-bit window for the response. This always occurs in both transponders 12, 12a. Thus, instead of the signal oscillation energy being damped in the resonant circuit 130 after 20 ms, the natural oscillation is allowed to decay with the normal parasitic damping effects. In practical examples, this new time interval is about 40 ms.

It can also be determined whether another type of transponder, other than the transponder described here as the preferred embodiment, is present in the vicinity of the preferred transponder 12. In such a case, the transponder 12 will give off more energy from its own oscillation to the neighboring transponder and will discharge more quickly because the other transponders have higher losses (e.g., operate with lower Q factors and consume more energy from the preferred transponder 12 during operation). Thus, in a practical example, the transponder may now discharge in about 30 ms instead of 40 ms. In any case, the discharge period is greater than the 20 ms if the oscillation has been dampened as in a normal interrogation cycle.

For example, in certain contexts the term "microcomputer" is used, indicating that a microcomputer requires memory, but a microprocessor does not. Here, however, these terms are considered synonymous and refer to the same thing. The term "processing circuitry" or "control circuitry" includes ASICs (application specific integrated circuits), PALs (programmable array logic), PLAs (programmable logic arrays), decoders, memories, non-software-based processors, or other circuitry or digital computers including microprocessors and microcomputers of any architecture or combinations thereof. Memory devices include SRAM (static random access memory), DRAM (dynamic random access memory), pseudo-static RAM buffers, EEPROM (electrically-erasable programmable read-only memory), EPROM (erasable programmable read-only memory), registers, or any other memory devices known in the art. The terms included are not exhaustive with respect to the scope of the invention.

The design can be implemented in full-duplex transponder arrangements or in half-duplex transponder arrangements. Possible data modulation schemes include FSK modulation (FSK = frequency shift keying) as well as pulse-pause modulation, ASK modulation (ASK = amplitude shift keying), QAM modulation (QAM = quadrature AM), QPSK modulation (QPSK = quadrature phase shift keying) or some other modulation. Various types of multiplexing such as time or frequency modulation can be implemented to avoid cross signal interference. Implementation is contemplated in discrete components or in fully integrated circuits of the silicon, gallium arsenide or other electronic material families, as well as in optical-based or other technology-based forms and embodiments. Of course, various embodiments of the invention may be implemented in or embodied in hardware, software or microcoded firmware.

Claims (15)

1. A method for interrogating remotely located transponders, comprising the following steps: a) transmitting an RF interrogation pulse from an interrogator (10); b) receiving the RF interrogation pulse by a first transponder (12) and a second transponder (12a); c) Terminating the RF interrogation pulse; d) detecting the termination of the interrogation pulse in the first transponder (12); e) starting an RF response of selected duration in the first transponder (12); f) detecting RF signals from the second transponder (12a) in the first transponder (12); and g) modifying the duration of the RF response in the first transponder (12) upon detection of the RF signals from the second transponder (12a); characterized in that h) the interrogation device (10) measures the duration of the transponder response signal and thereby detects more than one transponder in the vicinity of the interrogation device (10). 2. The method of claim 1, further comprising the step of selectively addressing the first transponder (12) or the second transponder (12a) by the interrogator. 3. The method of claim 1 or claim 2, wherein the first transponder (12) is a half-duplex transponder. 4. The method of any preceding claim, further comprising the second transponder (12a) being a half-duplex transponder. 5. The method according to any one of claims 1 to 3, further comprising the second transponder (12a) being a full-duplex transponder. 6. A method according to any preceding claim, further comprising providing the first transponder (12) with a resonant circuit (130) for receiving the interrogation pulse and for establishing oscillations in the resonant circuit (130) in response to the interrogation. 7. The method of claim 6, wherein detecting the signals from the second transponder (12a) in the first transponder (12) is achieved by detecting destructive interference between the oscillations built up in the resonant circuit (130) of the first transponder (12) and the signals from the second transponder (12a). 8. A method according to any preceding claim, further comprising selecting the duration by a counter (184) that counts up to a preselected number of oscillations in the resonator. 9. A method for interrogating remotely located transponders, comprising the following steps: a) transmitting an RF interrogation pulse from an interrogator (10); b) providing a first transponder (12) and a second transponder (12a) in the vicinity of the interrogation device (10), the two transponders (12, 12a) each having a resonance circuit (130) which contains the parallel circuit of a coil (132) and a capacitor (134); c) receiving the RF interrogation pulse by the coil (132) of each of the transponders (12, 12a); d) establishing oscillations in each resonant circuit (130) of each of the transponders (12, 12a), the oscillations being established by coupling the signal energy from the RF interrogation pulse into the resonant circuit (130); e) terminating the RF interrogation pulse from the interrogator (10); f) detecting the termination of the RF interrogation pulse in the first transponder (12); g) starting an RF response of selected duration in the first transponder (12); h) detecting destructive interference between the oscillations established in the resonant circuit (130) of the first transponder (12) and the RF signals from the second transponder (12a) in the first transponder (12); i) modifying the duration of the RF response in the first transponder (12) in response to the detection; j) receiving the RF response by the interrogator (10); characterized in that the interrogator (10) analyzes the duration of the RF response to determine that the first transponder (12) and the second transponder (12a) are in the vicinity of the interrogator. 10. HF-ID system, with: an interrogator (10) that transmits an RF interrogation pulse and terminates the interrogation pulse after a predetermined duration and receives a transponder response in response thereto; a first transponder (12) and a second transponder (12a) which receive the interrogation pulse, detect the termination of the RF interrogation pulse and, in response thereto, transmit a transponder response having a predetermined duration; wherein the first transponder (12) and the second transponder (12a) modify the duration of the transponder response in response to the detection of RF signals from the second transponder (12a) in the first transponder (12) and to the detection of RF signals from the first transponder (12) in the second transponder (12a); characterized in that the interrogation device (10) measures the duration of the received transponder response signals and thereby detects more than one transponder in the vicinity of the interrogation device (10). 11. Arrangement according to claim 10, in which the interrogation device (10) has an antenna (38) for receiving the responses. 12. The arrangement of claim 11, wherein the interrogator (10) further comprises a "read" circuit (302) electrically connected to the antenna (38) for detecting valid data returned by the transponders (12, 12a). 13. The arrangement of claim 12, wherein the interrogator (10) further comprises a timer circuit (304) electrically connected to the antenna (38) for measuring the duration of the response from the first transponder (12). 14. The arrangement of claim 13, wherein the interrogator (10) further comprises a decoder (306) electrically connected to the "read" circuitry (302) and to the timing circuit (304). 15. An interrogator for determining whether an interrogation of the interrogator has been received from more than one transponder, the interrogator comprising: a "transmit" antenna (39) which sends an interrogation pulse to transponders (12, 12a); a "receive" antenna (38) that receives a response from at least one of the transponders (12, 12a); and a "read" circuit (302) electrically connected to the "receive" antenna (38), the read circuitry (302) operable to extract a data signal from the response; the interrogator being characterized by a timer (304) electrically connected to the "receive" antenna (38) and operable to measure the duration of the response; and a decoder (306) electrically connected to the reading circuitry (302) and to the timer (304) and operable to interpret, based on the signals received from the reading circuitry (302) and from the timer (304), whether a valid response was received from a single transponder without being interfered with by another transponder.