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DE69229195D1 - Verfahren zum reaktiven Ionenätzen - Google Patents

Verfahren zum reaktiven Ionenätzen

Info

Publication number
DE69229195D1
DE69229195D1 DE69229195T DE69229195T DE69229195D1 DE 69229195 D1 DE69229195 D1 DE 69229195D1 DE 69229195 T DE69229195 T DE 69229195T DE 69229195 T DE69229195 T DE 69229195T DE 69229195 D1 DE69229195 D1 DE 69229195D1
Authority
DE
Germany
Prior art keywords
reactive ion
ion etching
etching
reactive
ion
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69229195T
Other languages
English (en)
Other versions
DE69229195T2 (de
Inventor
Tetsuya Tatsumi
Shingo Kadomura
Tetsuji Nagayama
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Publication of DE69229195D1 publication Critical patent/DE69229195D1/de
Application granted granted Critical
Publication of DE69229195T2 publication Critical patent/DE69229195T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321—After treatment
    • H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • H01L21/32133—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only
    • H01L21/32135—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only
    • H01L21/32136—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only using plasmas
    • H01L21/32137—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only using plasmas of silicon-containing layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/3065—Plasma etching; Reactive-ion etching

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Plasma & Fusion (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Drying Of Semiconductors (AREA)
  • ing And Chemical Polishing (AREA)
DE69229195T 1991-01-22 1992-01-21 Verfahren zum reaktiven Ionenätzen Expired - Fee Related DE69229195T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP02036091A JP3220992B2 (ja) 1991-01-22 1991-01-22 ドライエッチング方法

Publications (2)

Publication Number Publication Date
DE69229195D1 true DE69229195D1 (de) 1999-06-24
DE69229195T2 DE69229195T2 (de) 1999-11-18

Family

ID=12024931

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69229195T Expired - Fee Related DE69229195T2 (de) 1991-01-22 1992-01-21 Verfahren zum reaktiven Ionenätzen

Country Status (5)

Country Link
US (1) US5354421A (de)
EP (1) EP0498209B1 (de)
JP (1) JP3220992B2 (de)
KR (1) KR100238691B1 (de)
DE (1) DE69229195T2 (de)

Families Citing this family (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5242538A (en) * 1992-01-29 1993-09-07 Applied Materials, Inc. Reactive ion etch process including hydrogen radicals
JP3198586B2 (ja) * 1992-02-14 2001-08-13 ソニー株式会社 ドライエッチング方法
JP3239460B2 (ja) * 1992-09-08 2001-12-17 ソニー株式会社 接続孔の形成方法
US5702567A (en) * 1995-06-01 1997-12-30 Kabushiki Kaisha Toshiba Plurality of photolithographic alignment marks with shape, size and spacing based on circuit pattern features
US5705433A (en) * 1995-08-24 1998-01-06 Applied Materials, Inc. Etching silicon-containing materials by use of silicon-containing compounds
DE19654113A1 (de) * 1996-12-23 1998-06-25 Asea Brown Boveri Verfahren zum Herstellen eines MOS-gesteuerten Leistungshalbleiterbauelements
US5965463A (en) * 1997-07-03 1999-10-12 Applied Materials, Inc. Silane etching process
US6251791B1 (en) * 1999-07-20 2001-06-26 United Microelectronics Corp. Eliminating etching microloading effect by in situ deposition and etching
JP4382926B2 (ja) * 1999-09-29 2009-12-16 東京エレクトロン株式会社 プラズマ処理方法
JP2002110644A (ja) * 2000-09-28 2002-04-12 Nec Corp エッチング方法
US6835663B2 (en) * 2002-06-28 2004-12-28 Infineon Technologies Ag Hardmask of amorphous carbon-hydrogen (a-C:H) layers with tunable etch resistivity
US6886573B2 (en) * 2002-09-06 2005-05-03 Air Products And Chemicals, Inc. Plasma cleaning gas with lower global warming potential than SF6
KR100789393B1 (ko) 2004-03-15 2007-12-28 마츠시다 덴코 가부시키가이샤 반도체 장치의 제조 방법
JP4556454B2 (ja) 2004-03-15 2010-10-06 パナソニック電工株式会社 半導体装置の製造方法
JP4635626B2 (ja) * 2005-01-31 2011-02-23 Ｔｄｋ株式会社 軟磁性膜の製造方法及び磁気ヘッドの製造方法
US7645707B2 (en) 2005-03-30 2010-01-12 Lam Research Corporation Etch profile control
CN100435272C (zh) * 2005-07-01 2008-11-19 北京大学 在感应耦合等离子体刻蚀中保护刻蚀结构的方法
US7682977B2 (en) * 2006-05-11 2010-03-23 Micron Technology, Inc. Methods of forming trench isolation and methods of forming arrays of FLASH memory cells
KR101528947B1 (ko) 2007-09-27 2015-06-15 램 리써치 코포레이션 유전체 에칭에서의 프로파일 제어
US8158524B2 (en) 2007-09-27 2012-04-17 Lam Research Corporation Line width roughness control with arc layer open
CN104211010A (zh) * 2013-06-03 2014-12-17 中国科学院微电子研究所 一种刻蚀方法

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5856249B2 (ja) * 1978-09-07 1983-12-14 松下電子工業株式会社 プラズマ反応による薄膜の製造方法
JPS5751265A (en) * 1980-09-10 1982-03-26 Hitachi Ltd Microwave plasma etching device
US4350578A (en) * 1981-05-11 1982-09-21 International Business Machines Corporation Cathode for etching
JPS58204537A (ja) * 1982-05-24 1983-11-29 Hitachi Ltd プラズマエツチング方法
US4603195A (en) * 1983-12-30 1986-07-29 International Business Machines Corporation Organosilicon compound and use thereof in photolithography
US4615764A (en) * 1984-11-05 1986-10-07 Allied Corporation SF6/nitriding gas/oxidizer plasma etch system
US4711698A (en) * 1985-07-15 1987-12-08 Texas Instruments Incorporated Silicon oxide thin film etching process
DE3752140T2 (de) * 1986-09-05 1998-03-05 Hitachi Ltd Trockenes Ätzverfahren
JPS63122178A (ja) * 1986-11-11 1988-05-26 Toppan Printing Co Ltd アモルフアスシリコン薄膜トランジスタ−の作成方法
JPS63166979A (ja) * 1986-12-26 1988-07-11 Kyocera Corp ガスエツチング方法
US4956043A (en) * 1987-05-25 1990-09-11 Hitachi, Ltd. Dry etching apparatus
US4956314A (en) * 1989-05-30 1990-09-11 Motorola, Inc. Differential etching of silicon nitride
JP2964605B2 (ja) * 1990-10-04 1999-10-18 ソニー株式会社 ドライエッチング方法
JP3018532B2 (ja) * 1991-02-26 2000-03-13 ソニー株式会社 ドライエッチング方法

Also Published As

Publication number Publication date
JP3220992B2 (ja) 2001-10-22
EP0498209A1 (de) 1992-08-12
EP0498209B1 (de) 1999-05-19
JPH04237124A (ja) 1992-08-25
DE69229195T2 (de) 1999-11-18
KR100238691B1 (ko) 2000-01-15
US5354421A (en) 1994-10-11

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee