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DE69132642D1 - Treiberschaltkreis - Google Patents

Treiberschaltkreis

Info

Publication number
DE69132642D1
DE69132642D1 DE69132642T DE69132642T DE69132642D1 DE 69132642 D1 DE69132642 D1 DE 69132642D1 DE 69132642 T DE69132642 T DE 69132642T DE 69132642 T DE69132642 T DE 69132642T DE 69132642 D1 DE69132642 D1 DE 69132642D1
Authority
DE
Germany
Prior art keywords
driver circuit
driver
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69132642T
Other languages
English (en)
Other versions
DE69132642T2 (de
Inventor
Thomas Dale Fletcher
Emil Norman Hahn
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Koninklijke Philips NV
Original Assignee
Koninklijke Philips Electronics NV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Koninklijke Philips Electronics NV filed Critical Koninklijke Philips Electronics NV
Application granted granted Critical
Publication of DE69132642D1 publication Critical patent/DE69132642D1/de
Publication of DE69132642T2 publication Critical patent/DE69132642T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0175—Coupling arrangements; Interface arrangements
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/01—Modifications for accelerating switching
    • H03K19/013—Modifications for accelerating switching in bipolar transistor circuits
    • H03K19/0136—Modifications for accelerating switching in bipolar transistor circuits by means of a pull-up or down element
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0008—Arrangements for reducing power consumption
    • H03K19/001—Arrangements for reducing power consumption in bipolar transistor circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/003—Modifications for increasing the reliability for protection
    • H03K19/00346—Modifications for eliminating interference or parasitic voltages or currents
    • H03K19/00353—Modifications for eliminating interference or parasitic voltages or currents in bipolar transistor circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Logic Circuits (AREA)
  • Electronic Switches (AREA)
  • Dc Digital Transmission (AREA)
DE69132642T 1990-07-27 1991-07-18 Treiberschaltkreis Expired - Fee Related DE69132642T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/558,935 US5132564A (en) 1990-07-27 1990-07-27 Bus driver circuit with low on-chip dissipation and/or pre-biasing of output terminal during live insertion

Publications (2)

Publication Number Publication Date
DE69132642D1 true DE69132642D1 (de) 2001-07-26
DE69132642T2 DE69132642T2 (de) 2002-04-18

Family

ID=24231604

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69132642T Expired - Fee Related DE69132642T2 (de) 1990-07-27 1991-07-18 Treiberschaltkreis

Country Status (5)

Country Link
US (1) US5132564A (de)
EP (1) EP0468583B1 (de)
JP (1) JP3308564B2 (de)
KR (1) KR100264497B1 (de)
DE (1) DE69132642T2 (de)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE4133764C1 (de) * 1991-10-11 1993-02-18 Texas Instruments Deutschland Gmbh, 8050 Freising, De
JP3025118B2 (ja) * 1992-10-26 2000-03-27 株式会社日立製作所 半導体集積回路装置と情報処理システム
DE69434906T2 (de) * 1993-11-29 2007-08-30 Fujitsu Ltd., Kawasaki Integrierte Halbleiterschaltung und Abschlussvorrichtung
JP3102253B2 (ja) * 1994-03-18 2000-10-23 株式会社日立製作所 メモリシステム
JP3598530B2 (ja) * 1994-04-21 2004-12-08 株式会社日立製作所 活栓挿抜装置
US5574865A (en) * 1994-12-01 1996-11-12 Unisys Corporation System for data transfer protection during module connection/disconnection onto live bus
US5485107A (en) * 1995-01-09 1996-01-16 Unisys Corporation Backplane driver circuit
US5696773A (en) * 1996-04-25 1997-12-09 Credence Systems Corporation Apparatus for performing logic and leakage current tests on a digital logic circuit
US5959481A (en) * 1997-02-18 1999-09-28 Rambus Inc. Bus driver circuit including a slew rate indicator circuit having a one shot circuit
JPH10326131A (ja) * 1997-05-26 1998-12-08 Nec Corp バスドライバ
US6163202A (en) * 1998-10-05 2000-12-19 Lucent Technologies Inc. Temperature compensation circuit for semiconductor switch and method of operation thereof
US6600356B1 (en) * 1999-04-30 2003-07-29 Analog Devices, Inc. ESD protection circuit with controlled breakdown voltage
US6380772B1 (en) 2000-05-17 2002-04-30 Marvell International, Ltd. Self-limiting pad driver

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3614467A (en) * 1970-06-22 1971-10-19 Cogar Corp Nonsaturated logic circuits compatible with ttl and dtl circuits
US4263645A (en) * 1979-04-30 1981-04-21 Gte Automatic Electric Laboratories, Inc. Self-starting carrier subscriber power supply
US4415817A (en) * 1981-10-08 1983-11-15 Signetics Corporation Bipolar logic gate including circuitry to prevent turn-off and deep saturation of pull-down transistor
JPS60177723A (ja) * 1984-02-24 1985-09-11 Hitachi Ltd 出力回路
US4746818A (en) * 1985-03-12 1988-05-24 Pitney Bowes Inc. Circuit for maintaining the state of an output despite changes in the state of input
GB2185648A (en) * 1985-12-04 1987-07-22 Plessey Co Plc Electronic interface circuit
JPS62154917A (ja) * 1985-12-27 1987-07-09 Hitachi Ltd デジタル回路
US4682050A (en) * 1986-01-08 1987-07-21 International Business Machines Corporation Small signal swing driver circuit
FR2598871B1 (fr) * 1986-05-14 1988-09-30 Bendix Electronics Sa Circuit d'interface bidirectionnel presentant un acces unipolaire et un acces bipolaire pour des signaux logiques
JPS63112893A (ja) * 1986-10-28 1988-05-17 Mitsubishi Electric Corp 半導体集積回路
KR960009249B1 (ko) * 1987-04-24 1996-07-16 미다 가쓰시게 반도체 메모리
JPH01251655A (ja) * 1988-03-30 1989-10-06 Matsushita Electron Corp 半導体集積回路
US4918329B1 (en) * 1988-07-25 1993-06-01 Data transmission system
US5028809A (en) * 1989-03-07 1991-07-02 Hewlett-Packard Company Computer bus structure permitting replacement of modules during operation

Also Published As

Publication number Publication date
DE69132642T2 (de) 2002-04-18
KR920003660A (ko) 1992-02-29
JPH04298117A (ja) 1992-10-21
US5132564A (en) 1992-07-21
EP0468583B1 (de) 2001-06-20
KR100264497B1 (ko) 2000-09-01
EP0468583A1 (de) 1992-01-29
JP3308564B2 (ja) 2002-07-29

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee