DE69120305D1 - Mosfet mit Substrat-Source-Kontakt - Google Patents
Mosfet mit Substrat-Source-KontaktInfo
- Publication number
- DE69120305D1 DE69120305D1 DE69120305T DE69120305T DE69120305D1 DE 69120305 D1 DE69120305 D1 DE 69120305D1 DE 69120305 T DE69120305 T DE 69120305T DE 69120305 T DE69120305 T DE 69120305T DE 69120305 D1 DE69120305 D1 DE 69120305D1
- Authority
- DE
- Germany
- Prior art keywords
- mosfet
- substrate
- source contact
- source
- contact
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/64—Double-diffused metal-oxide semiconductor [DMOS] FETs
- H10D30/66—Vertical DMOS [VDMOS] FETs
- H10D30/668—Vertical DMOS [VDMOS] FETs having trench gate electrodes, e.g. UMOS transistors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D10/00—Bipolar junction transistors [BJT]
- H10D10/40—Vertical BJTs
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/74—Making of localized buried regions, e.g. buried collector layers, internal connections substrate contacts
- H01L21/743—Making of internal connections, substrate contacts
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/01—Manufacture or treatment
- H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
- H10D30/025—Manufacture or treatment of FETs having insulated gates [IGFET] of vertical IGFETs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/64—Double-diffused metal-oxide semiconductor [DMOS] FETs
- H10D30/66—Vertical DMOS [VDMOS] FETs
- H10D30/664—Inverted VDMOS transistors, i.e. source-down VDMOS transistors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/17—Semiconductor regions connected to electrodes not carrying current to be rectified, amplified or switched, e.g. channel regions
- H10D62/393—Body regions of DMOS transistors or IGBTs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/20—Electrodes characterised by their shapes, relative sizes or dispositions
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
- H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
- H10D84/0128—Manufacturing their channels
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
- H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
- H10D84/0144—Manufacturing their gate insulating layers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
- H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
- H10D84/0147—Manufacturing their gate sidewall spacers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/20—Electrodes characterised by their shapes, relative sizes or dispositions
- H10D64/27—Electrodes not carrying the current to be rectified, amplified, oscillated or switched, e.g. gates
- H10D64/311—Gate electrodes for field-effect devices
- H10D64/411—Gate electrodes for field-effect devices for FETs
- H10D64/511—Gate electrodes for field-effect devices for FETs for IGFETs
- H10D64/514—Gate electrodes for field-effect devices for FETs for IGFETs characterised by the insulating layers
- H10D64/516—Gate electrodes for field-effect devices for FETs for IGFETs characterised by the insulating layers the thicknesses being non-uniform
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/168—V-Grooves
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
- Electrodes Of Semiconductors (AREA)
- Element Separation (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US07/471,899 US5023196A (en) | 1990-01-29 | 1990-01-29 | Method for forming a MOSFET with substrate source contact |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69120305D1 true DE69120305D1 (de) | 1996-07-25 |
DE69120305T2 DE69120305T2 (de) | 1997-01-30 |
Family
ID=23873428
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69120305T Expired - Fee Related DE69120305T2 (de) | 1990-01-29 | 1991-01-28 | Mosfet mit Substrat-Source-Kontakt |
Country Status (6)
Country | Link |
---|---|
US (1) | US5023196A (de) |
EP (1) | EP0440394B1 (de) |
JP (1) | JP3130323B2 (de) |
KR (1) | KR910014993A (de) |
DE (1) | DE69120305T2 (de) |
SG (1) | SG43147A1 (de) |
Families Citing this family (44)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH04368182A (ja) * | 1991-06-17 | 1992-12-21 | Mitsubishi Electric Corp | 半導体装置およびその製造方法 |
US5134448A (en) * | 1990-01-29 | 1992-07-28 | Motorola, Inc. | MOSFET with substrate source contact |
JPH05304297A (ja) * | 1992-01-29 | 1993-11-16 | Nec Corp | 電力用半導体装置およびその製造方法 |
US5385853A (en) * | 1992-12-02 | 1995-01-31 | International Business Machines Corporation | Method of fabricating a metal oxide semiconductor heterojunction field effect transistor (MOSHFET) |
US5349224A (en) * | 1993-06-30 | 1994-09-20 | Purdue Research Foundation | Integrable MOS and IGBT devices having trench gate structure |
JPH07164238A (ja) * | 1993-12-14 | 1995-06-27 | Ikeda:Kk | パイプカッター |
US5471075A (en) * | 1994-05-26 | 1995-11-28 | North Carolina State University | Dual-channel emitter switched thyristor with trench gate |
US5488236A (en) * | 1994-05-26 | 1996-01-30 | North Carolina State University | Latch-up resistant bipolar transistor with trench IGFET and buried collector |
JPH0878533A (ja) * | 1994-08-31 | 1996-03-22 | Nec Corp | 半導体装置及びその製造方法 |
US5904515A (en) * | 1995-01-27 | 1999-05-18 | Goldstar Electron Co., Ltd. | Method for fabricating a thin film transistor with the source, drain and channel in a groove in a divided gate |
JP3291958B2 (ja) * | 1995-02-21 | 2002-06-17 | 富士電機株式会社 | バックソースmosfet |
US5557127A (en) * | 1995-03-23 | 1996-09-17 | International Rectifier Corporation | Termination structure for mosgated device with reduced mask count and process for its manufacture |
US5592005A (en) | 1995-03-31 | 1997-01-07 | Siliconix Incorporated | Punch-through field effect transistor |
DE19638439C2 (de) | 1996-09-19 | 2000-06-15 | Siemens Ag | Durch Feldeffekt steuerbares, vertikales Halbleiterbauelement und Herstellungsverfahren |
DE19638438A1 (de) * | 1996-09-19 | 1998-04-02 | Siemens Ag | Durch Feldeffekt steuerbares, vertikales Halbleiterbauelement |
KR100218260B1 (ko) * | 1997-01-14 | 1999-09-01 | 김덕중 | 트랜치 게이트형 모스트랜지스터의 제조방법 |
DE19801313C2 (de) * | 1998-01-15 | 2001-01-18 | Siemens Ag | FET mit Source-Substratanschluß |
US6084264A (en) * | 1998-11-25 | 2000-07-04 | Siliconix Incorporated | Trench MOSFET having improved breakdown and on-resistance characteristics |
DE10004984A1 (de) * | 2000-02-04 | 2001-08-16 | Infineon Technologies Ag | Vertikales Halbleiterbauelement mit Source-Down-Design und entsprechendes Herstellungsverfahren |
US6445037B1 (en) * | 2000-09-28 | 2002-09-03 | General Semiconductor, Inc. | Trench DMOS transistor having lightly doped source structure |
US6580107B2 (en) * | 2000-10-10 | 2003-06-17 | Sanyo Electric Co., Ltd. | Compound semiconductor device with depletion layer stop region |
US6627484B1 (en) * | 2000-11-13 | 2003-09-30 | Advanced Micro Devices, Inc. | Method of forming a buried interconnect on a semiconductor on insulator wafer and a device including a buried interconnect |
US7132712B2 (en) | 2002-11-05 | 2006-11-07 | Fairchild Semiconductor Corporation | Trench structure having one or more diodes embedded therein adjacent a PN junction |
US6777745B2 (en) * | 2001-06-14 | 2004-08-17 | General Semiconductor, Inc. | Symmetric trench MOSFET device and method of making same |
US7061066B2 (en) * | 2001-10-17 | 2006-06-13 | Fairchild Semiconductor Corporation | Schottky diode using charge balance structure |
US7576388B1 (en) | 2002-10-03 | 2009-08-18 | Fairchild Semiconductor Corporation | Trench-gate LDMOS structures |
US7352036B2 (en) | 2004-08-03 | 2008-04-01 | Fairchild Semiconductor Corporation | Semiconductor power device having a top-side drain using a sinker trench |
US7439580B2 (en) * | 2004-09-02 | 2008-10-21 | International Rectifier Corporation | Top drain MOSgated device and process of manufacture therefor |
DE102004045966B4 (de) | 2004-09-22 | 2006-08-31 | Infineon Technologies Austria Ag | Vertikal-Feldeffekttransistor in Source-Down-Struktur |
US7456470B2 (en) * | 2004-10-01 | 2008-11-25 | International Rectifier Corporation | Top drain fet with integrated body short |
KR20120127677A (ko) | 2005-04-06 | 2012-11-22 | 페어차일드 세미컨덕터 코포레이션 | 트랜치-게이트 전계효과 트랜지스터 및 그 형성 방법 |
CN101208803B (zh) * | 2005-05-24 | 2012-05-30 | 维税-希力康克斯公司 | 沟槽金属氧化物半导体场效应晶体管 |
DE102005055838B4 (de) * | 2005-11-23 | 2007-10-04 | Infineon Technologies Ag | Verfahren und Vorrichtung zum ermöglichen tiefliegender Halbleiterkontakte |
US7768075B2 (en) * | 2006-04-06 | 2010-08-03 | Fairchild Semiconductor Corporation | Semiconductor die packages using thin dies and metal substrates |
US8471390B2 (en) | 2006-05-12 | 2013-06-25 | Vishay-Siliconix | Power MOSFET contact metallization |
US7319256B1 (en) * | 2006-06-19 | 2008-01-15 | Fairchild Semiconductor Corporation | Shielded gate trench FET with the shield and gate electrodes being connected together |
JP2008078604A (ja) * | 2006-08-24 | 2008-04-03 | Rohm Co Ltd | Mis型電界効果トランジスタおよびその製造方法 |
US10205017B2 (en) * | 2009-06-17 | 2019-02-12 | Alpha And Omega Semiconductor Incorporated | Bottom source NMOS triggered Zener clamp for configuring an ultra-low voltage transient voltage suppressor (TVS) |
JP5597963B2 (ja) * | 2009-10-09 | 2014-10-01 | 富士電機株式会社 | 半導体装置 |
US20110198689A1 (en) * | 2010-02-17 | 2011-08-18 | Suku Kim | Semiconductor devices containing trench mosfets with superjunctions |
US9257517B2 (en) * | 2010-11-23 | 2016-02-09 | Microchip Technology Incorporated | Vertical DMOS-field effect transistor |
US8487371B2 (en) | 2011-03-29 | 2013-07-16 | Fairchild Semiconductor Corporation | Vertical MOSFET transistor having source/drain contacts disposed on the same side and method for manufacturing the same |
US8471331B2 (en) | 2011-08-15 | 2013-06-25 | Semiconductor Components Industries, Llc | Method of making an insulated gate semiconductor device with source-substrate connection and structure |
US8816503B2 (en) | 2011-08-29 | 2014-08-26 | Infineon Technologies Austria Ag | Semiconductor device with buried electrode |
Family Cites Families (21)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3975221A (en) * | 1973-08-29 | 1976-08-17 | American Micro-Systems, Inc. | Low capacitance V groove MOS NOR gate and method of manufacture |
US4398339A (en) * | 1977-04-15 | 1983-08-16 | Supertex, Inc. | Fabrication method for high power MOS device |
JPS605228B2 (ja) * | 1977-10-17 | 1985-02-08 | 株式会社日立製作所 | 半導体装置 |
GB2034114A (en) * | 1978-10-06 | 1980-05-29 | Gen Electric | Method of manufacturing a V- groove IGFET |
DE2930780C2 (de) * | 1979-07-28 | 1982-05-27 | Deutsche Itt Industries Gmbh, 7800 Freiburg | Verfahren zur Herstellung eines VMOS-Transistors |
US4374455A (en) * | 1979-10-30 | 1983-02-22 | Rca Corporation | Method for manufacturing a vertical, grooved MOSFET |
JPS5683944A (en) * | 1979-12-12 | 1981-07-08 | Chiyou Lsi Gijutsu Kenkyu Kumiai | Manufacturing of semiconductor device |
FR2487583A1 (fr) * | 1980-07-25 | 1982-01-29 | Thomson Csf | Procede de fabrication d'un transistor a effet de champ a rainure |
US4738936A (en) * | 1983-07-01 | 1988-04-19 | Acrian, Inc. | Method of fabrication lateral FET structure having a substrate to source contact |
JPS60175457A (ja) * | 1984-02-20 | 1985-09-09 | Matsushita Electronics Corp | 電界効果トランジスタの製造方法 |
JPH0654811B2 (ja) * | 1984-02-29 | 1994-07-20 | 松下電子工業株式会社 | 電界効果トランジスタの製造方法 |
JPS6126261A (ja) * | 1984-07-16 | 1986-02-05 | Nippon Telegr & Teleph Corp <Ntt> | 縦形mos電界効果トランジスタの製造方法 |
US4824793A (en) * | 1984-09-27 | 1989-04-25 | Texas Instruments Incorporated | Method of making DRAM cell with trench capacitor |
US4797373A (en) * | 1984-10-31 | 1989-01-10 | Texas Instruments Incorporated | Method of making dRAM cell with trench capacitor |
US4694561A (en) * | 1984-11-30 | 1987-09-22 | American Telephone And Telegraph Company, At&T Bell Laboratories | Method of making high-performance trench capacitors for DRAM cells |
US4713678A (en) * | 1984-12-07 | 1987-12-15 | Texas Instruments Incorporated | dRAM cell and method |
JPS61170068A (ja) * | 1985-01-23 | 1986-07-31 | Nec Ic Microcomput Syst Ltd | Mosトランジスタ |
JPS62159468A (ja) * | 1986-01-08 | 1987-07-15 | Tdk Corp | 半導体装置 |
US4767722A (en) * | 1986-03-24 | 1988-08-30 | Siliconix Incorporated | Method for making planar vertical channel DMOS structures |
JPS63288057A (ja) * | 1987-05-20 | 1988-11-25 | Sanyo Electric Co Ltd | Cmos半導体装置 |
US4859621A (en) * | 1988-02-01 | 1989-08-22 | General Instrument Corp. | Method for setting the threshold voltage of a vertical power MOSFET |
-
1990
- 1990-01-29 US US07/471,899 patent/US5023196A/en not_active Expired - Fee Related
- 1990-12-26 KR KR1019900021726A patent/KR910014993A/ko not_active Application Discontinuation
-
1991
- 1991-01-25 JP JP03025457A patent/JP3130323B2/ja not_active Expired - Fee Related
- 1991-01-28 SG SG1996004446A patent/SG43147A1/en unknown
- 1991-01-28 EP EP91300622A patent/EP0440394B1/de not_active Expired - Lifetime
- 1991-01-28 DE DE69120305T patent/DE69120305T2/de not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
JPH04212469A (ja) | 1992-08-04 |
KR910014993A (ko) | 1991-08-31 |
JP3130323B2 (ja) | 2001-01-31 |
US5023196A (en) | 1991-06-11 |
EP0440394A2 (de) | 1991-08-07 |
SG43147A1 (en) | 1997-10-17 |
DE69120305T2 (de) | 1997-01-30 |
EP0440394B1 (de) | 1996-06-19 |
EP0440394A3 (en) | 1992-01-29 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8320 | Willingness to grant licences declared (paragraph 23) | ||
8327 | Change in the person/name/address of the patent owner |
Owner name: FREESCALE SEMICONDUCTOR, INC. (N.D.GES.D. STAATES |
|
8339 | Ceased/non-payment of the annual fee |