DE69114321D1 - Zum Durchführen der Unterbrechungsverschachtelungsfunktion geeignetes Unterbrechungssteuerungsgerät. - Google Patents
Zum Durchführen der Unterbrechungsverschachtelungsfunktion geeignetes Unterbrechungssteuerungsgerät.Info
- Publication number
- DE69114321D1 DE69114321D1 DE69114321T DE69114321T DE69114321D1 DE 69114321 D1 DE69114321 D1 DE 69114321D1 DE 69114321 T DE69114321 T DE 69114321T DE 69114321 T DE69114321 T DE 69114321T DE 69114321 D1 DE69114321 D1 DE 69114321D1
- Authority
- DE
- Germany
- Prior art keywords
- interrupt
- control device
- device suitable
- interleaving function
- interrupt control
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
- G06F13/24—Handling requests for interconnection or transfer for access to input/output bus using interrupt
- G06F13/26—Handling requests for interconnection or transfer for access to input/output bus using interrupt with priority control
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Bus Control (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP4014490 | 1990-02-20 | ||
JP4608590 | 1990-02-26 |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69114321D1 true DE69114321D1 (de) | 1995-12-14 |
DE69114321T2 DE69114321T2 (de) | 1996-07-18 |
Family
ID=26379581
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69114321T Expired - Fee Related DE69114321T2 (de) | 1990-02-20 | 1991-02-20 | Zum Durchführen der Unterbrechungsverschachtelungsfunktion geeignetes Unterbrechungssteuerungsgerät. |
Country Status (3)
Country | Link |
---|---|
US (1) | US5410715A (de) |
EP (1) | EP0443557B1 (de) |
DE (1) | DE69114321T2 (de) |
Families Citing this family (22)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH06161779A (ja) * | 1992-11-17 | 1994-06-10 | Fujitsu Ltd | データ処理装置の割込み制御方式 |
AU6023894A (en) * | 1993-03-25 | 1994-10-11 | Taligent, Inc. | Multi-level interrupt system |
US5745770A (en) * | 1993-12-27 | 1998-04-28 | Intel Corporation | Method and apparatus for servicing simultaneous I/O trap and debug traps in a microprocessor |
GB2303949B (en) * | 1994-06-15 | 1999-07-14 | Intel Corp | Computer system with peripheral control functions integrated into host CPU |
KR0156173B1 (ko) * | 1995-11-21 | 1998-11-16 | 문정환 | 인터럽트 발생회로 |
US5850558A (en) * | 1995-12-19 | 1998-12-15 | Advanced Micro Devices | System and method for referencing interrupt request information in a programmable interrupt controller |
US5737240A (en) * | 1996-01-25 | 1998-04-07 | International Business Machines Corporation | Programmable hardware mailbox message technique and system |
US6021446A (en) * | 1997-07-11 | 2000-02-01 | Sun Microsystems, Inc. | Network device driver performing initial packet processing within high priority hardware interrupt service routine and then finishing processing within low priority software interrupt service routine |
IT1308343B1 (it) * | 1999-02-03 | 2001-12-11 | St Microelectronics Srl | Procedimento per arbitrare priorita' di interruzione tra periferichein un sistema basato su microprocessore |
DE10063936A1 (de) * | 2000-12-20 | 2002-06-27 | Thomson Brandt Gmbh | Interrupt Controller für einen Mikroprozessor |
US7328294B2 (en) * | 2001-12-03 | 2008-02-05 | Sun Microsystems, Inc. | Methods and apparatus for distributing interrupts |
US20030204655A1 (en) * | 2002-04-24 | 2003-10-30 | Schmisseur Mark A. | Prioritizing vector generation in interrupt controllers |
US7043582B2 (en) * | 2002-09-06 | 2006-05-09 | Intel Corporation | Self-nesting interrupts |
WO2004114132A1 (ja) * | 2003-06-20 | 2004-12-29 | Fujitsu Limited | 割り込み制御方法、割り込み制御装置及び割り込み制御プログラム |
US8108375B2 (en) * | 2003-10-30 | 2012-01-31 | International Business Machines Corporation | Processing database queries by returning results of a first query to subsequent queries |
US20050097083A1 (en) * | 2003-10-30 | 2005-05-05 | International Business Machines Corporation | Apparatus and method for processing database queries |
US7607133B2 (en) * | 2004-02-11 | 2009-10-20 | Arm Limited | Interrupt processing control |
US7206884B2 (en) * | 2004-02-11 | 2007-04-17 | Arm Limited | Interrupt priority control within a nested interrupt system |
JP2005242806A (ja) * | 2004-02-27 | 2005-09-08 | Renesas Technology Corp | データ処理装置 |
JP5508903B2 (ja) * | 2010-03-05 | 2014-06-04 | ルネサスエレクトロニクス株式会社 | 情報処理装置、半導体集積回路装置および異常検出方法 |
US20160378698A1 (en) * | 2015-06-26 | 2016-12-29 | Intel IP Corporation | Instruction and logic for real-time behavior of interrupts |
CN113986789B (zh) * | 2021-09-19 | 2024-04-23 | 山东云海国创云计算装备产业创新中心有限公司 | 一种防止中断丢失的方法和中断控制器 |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4398244A (en) * | 1980-05-07 | 1983-08-09 | Fairchild Camera & Instrument Corporation | Interruptible microprogram sequencing unit and microprogrammed apparatus utilizing same |
US4488227A (en) * | 1982-12-03 | 1984-12-11 | Honeywell Information Systems Inc. | Program counter stacking method and apparatus for nested subroutines and interrupts |
JPH0792782B2 (ja) * | 1985-09-30 | 1995-10-09 | 富士通株式会社 | 処理実行システム |
US4792890A (en) * | 1985-12-31 | 1988-12-20 | International Business Machines Corp. | Method for resolving conflicts between interrupt sources sharing the same priority level |
US5050067A (en) * | 1987-08-20 | 1991-09-17 | Davin Computer Corporation | Multiple sliding register stacks in a computer |
-
1991
- 1991-02-20 DE DE69114321T patent/DE69114321T2/de not_active Expired - Fee Related
- 1991-02-20 EP EP91102473A patent/EP0443557B1/de not_active Expired - Lifetime
-
1993
- 1993-01-25 US US08/008,387 patent/US5410715A/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
EP0443557B1 (de) | 1995-11-08 |
EP0443557A2 (de) | 1991-08-28 |
US5410715A (en) | 1995-04-25 |
EP0443557A3 (en) | 1991-11-13 |
DE69114321T2 (de) | 1996-07-18 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8327 | Change in the person/name/address of the patent owner |
Owner name: NEC ELECTRONICS CORP., KAWASAKI, KANAGAWA, JP |
|
8339 | Ceased/non-payment of the annual fee |