DE69027895D1 - Semiconductor memory - Google Patents

Semiconductor memory

Info

Publication number: DE69027895D1
Authority: DE; Germany
Prior art keywords: semiconductor memory; semiconductor; memory
Prior art date: 1989-08-11
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.): Expired - Fee Related

Application number

DE69027895T

Other languages

German (de)

Other versions

DE69027895T2 (en

Inventor

Kazuhiko Tani

Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)

Sony Corp

Original Assignee

Sony Corp

Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)

1989-08-11

Filing date

1990-08-10

Publication date

1996-08-29

1990-08-10 Application filed by Sony Corp filed Critical Sony Corp

1996-08-29 Application granted granted Critical

1996-08-29 Publication of DE69027895D1 publication Critical patent/DE69027895D1/en

1996-11-28 Publication of DE69027895T2 publication Critical patent/DE69027895T2/en

2010-08-11 Anticipated expiration legal-status Critical

Status Expired - Fee Related legal-status Critical Current

Classifications

- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/70—Masking faults in memories by using spares or by reconfiguring
- G11C29/78—Masking faults in memories by using spares or by reconfiguring using programmable devices
- G11C29/84—Masking faults in memories by using spares or by reconfiguring using programmable devices with improved access time or stability
- G11C29/846—Masking faults in memories by using spares or by reconfiguring using programmable devices with improved access time or stability by choosing redundant lines at an output stage

DE69027895T 1989-08-11 1990-08-10 Semiconductor memory Expired - Fee Related DE69027895T2 (en)

Applications Claiming Priority (1)

Application Number	Priority Date	Filing Date	Title
JP1208572A JPH0371500A (en)	1989-08-11	1989-08-11	Semiconductor memory

Publications (2)

Publication Number	Publication Date
DE69027895D1 true DE69027895D1 (en)	1996-08-29
DE69027895T2 DE69027895T2 (en)	1996-11-28

Family

ID=16558406

Family Applications (1)

Application Number	Title	Priority Date	Filing Date
DE69027895T Expired - Fee Related DE69027895T2 (en)	1989-08-11	1990-08-10	Semiconductor memory

Country Status (4)

Country	Link
US (1)	US5157628A (en)
EP (1)	EP0412838B1 (en)
JP (1)	JPH0371500A (en)
DE (1)	DE69027895T2 (en)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
JP2575919B2 (en) *	1990-03-22	1997-01-29	株式会社東芝	Redundancy circuit of semiconductor memory device
JPH05166396A (en) *	1991-12-12	1993-07-02	Mitsubishi Electric Corp	Semiconductor memory device
US5281868A (en) *	1992-08-18	1994-01-25	Micron Technology, Inc.	Memory redundancy addressing circuit for adjacent columns in a memory
US5559742A (en) *	1995-02-23	1996-09-24	Micron Technology, Inc.	Flash memory having transistor redundancy
US20020005408A1 (en)	1997-08-12	2002-01-17	Yuji Yamasaki	Easy-opening can end
JP3194368B2 (en)	1997-12-12	2001-07-30	日本電気株式会社	Semiconductor memory device and driving method thereof
JP4737929B2 (en) *	2003-12-12	2011-08-03	株式会社東芝	Semiconductor memory device
KR100624287B1 (en) *	2004-05-11	2006-09-18	에스티마이크로일렉트로닉스 엔.브이.	Redundancy Circuit for NAND Flash Memory Devices
JP4750813B2 (en) *	2008-03-07	2011-08-17	力晶科技股▲ふん▼有限公司	Nonvolatile semiconductor memory device and self test method thereof
KR101890819B1 (en) *	2012-05-22	2018-08-22	에스케이하이닉스 주식회사	Memory device and method for inputting/outputting data in the same

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
US4744060A (en) *	1984-10-19	1988-05-10	Fujitsu Limited	Bipolar-transistor type random access memory having redundancy configuration
US4757474A (en) *	1986-01-28	1988-07-12	Fujitsu Limited	Semiconductor memory device having redundancy circuit portion
JP2639650B2 (en) *	1987-01-14	1997-08-13	日本テキサス・インスツルメンツ株式会社	Semiconductor device
JPS63244494A (en) *	1987-03-31	1988-10-11	Toshiba Corp	Semiconductor storage device
JP2590897B2 (en) *	1987-07-20	1997-03-12	日本電気株式会社	Semiconductor memory
JPH07105157B2 (en) *	1987-09-10	1995-11-13	日本電気株式会社	Redundant memory cell use decision circuit

1989
- 1989-08-11 JP JP1208572A patent/JPH0371500A/en active Pending
1990
- 1990-08-10 DE DE69027895T patent/DE69027895T2/en not_active Expired - Fee Related
- 1990-08-10 EP EP90308820A patent/EP0412838B1/en not_active Expired - Lifetime
- 1990-08-10 US US07/565,135 patent/US5157628A/en not_active Expired - Fee Related

Also Published As

Publication number	Publication date
EP0412838A3 (en)	1992-01-08
JPH0371500A (en)	1991-03-27
DE69027895T2 (en)	1996-11-28
US5157628A (en)	1992-10-20
EP0412838A2 (en)	1991-02-13
EP0412838B1 (en)	1996-07-24

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Legal Events

Date	Code	Title	Description
1997-08-21	8364	No opposition during term of opposition
2003-06-12	8339	Ceased/non-payment of the annual fee