DE69025873D1 - Verfahren zum selektiven Herstellen von leitendem Stoff - Google Patents
Verfahren zum selektiven Herstellen von leitendem StoffInfo
- Publication number
- DE69025873D1 DE69025873D1 DE69025873T DE69025873T DE69025873D1 DE 69025873 D1 DE69025873 D1 DE 69025873D1 DE 69025873 T DE69025873 T DE 69025873T DE 69025873 T DE69025873 T DE 69025873T DE 69025873 D1 DE69025873 D1 DE 69025873D1
- Authority
- DE
- Germany
- Prior art keywords
- conductive material
- selective production
- selective
- production
- conductive
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 239000004020 conductor Substances 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
- H01L23/53204—Conductive materials
- H01L23/53209—Conductive materials based on metals, e.g. alloys, metal silicides
- H01L23/53242—Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being a noble metal, e.g. gold
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material
- H01L21/76879—Filling of holes, grooves or trenches, e.g. vias, with conductive material by selective deposition of conductive material in the vias, e.g. selective C.V.D. on semiconductor material, plating
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
- H01L23/5329—Insulating materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1330402A JPH03190232A (ja) | 1989-12-20 | 1989-12-20 | 半導体装置の製造方法 |
Publications (1)
Publication Number | Publication Date |
---|---|
DE69025873D1 true DE69025873D1 (de) | 1996-04-18 |
Family
ID=18232201
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69025873T Expired - Lifetime DE69025873D1 (de) | 1989-12-20 | 1990-12-19 | Verfahren zum selektiven Herstellen von leitendem Stoff |
Country Status (5)
Country | Link |
---|---|
US (1) | US5231054A (de) |
EP (1) | EP0434045B1 (de) |
JP (1) | JPH03190232A (de) |
KR (1) | KR930010968B1 (de) |
DE (1) | DE69025873D1 (de) |
Families Citing this family (21)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5305519A (en) * | 1991-10-24 | 1994-04-26 | Kawasaki Steel Corporation | Multilevel interconnect structure and method of manufacturing the same |
US5474949A (en) * | 1992-01-27 | 1995-12-12 | Matsushita Electric Industrial Co., Ltd. | Method of fabricating capacitor or contact for semiconductor device by forming uneven oxide film and reacting silicon with metal containing gas |
JP3158749B2 (ja) * | 1992-12-16 | 2001-04-23 | ヤマハ株式会社 | 半導体装置 |
KR960008550B1 (en) * | 1992-12-31 | 1996-06-28 | Hyundai Electronics Ind | Contact plug manufacturing method using tungsten |
US5559056A (en) * | 1995-01-13 | 1996-09-24 | National Semiconductor Corporation | Method and apparatus for capping metallization layer |
US5721155A (en) * | 1995-02-13 | 1998-02-24 | Lg Semicon Co., Ltd. | Method for forming a via contact of a semiconductor device |
US5710460A (en) * | 1995-04-21 | 1998-01-20 | International Business Machines Corporation | Structure for reducing microelectronic short circuits using spin-on glass as part of the interlayer dielectric |
US5940732A (en) | 1995-11-27 | 1999-08-17 | Semiconductor Energy Laboratory Co., | Method of fabricating semiconductor device |
US6294799B1 (en) * | 1995-11-27 | 2001-09-25 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and method of fabricating same |
KR100508036B1 (ko) * | 1997-02-26 | 2005-11-21 | 삼성전자주식회사 | 몰리브덴또는몰리브덴합금을이용한반도체장치의제조방법 |
KR100434713B1 (ko) * | 1996-12-27 | 2004-09-01 | 주식회사 하이닉스반도체 | 반도체소자의제조방법 |
FR2764309B1 (fr) * | 1997-06-06 | 1999-08-27 | Corning Inc | Procede de creation d'une couche de silicium sur une surface |
US6150272A (en) * | 1998-11-16 | 2000-11-21 | Taiwan Semiconductor Manufacturing Company | Method for making metal plug contacts and metal lines in an insulating layer by chemical/mechanical polishing that reduces polishing-induced damage |
US6709882B2 (en) | 2001-08-27 | 2004-03-23 | Lightwave Microsystems Corporation | Planar lightwave circuit active device metallization process |
US7323142B2 (en) * | 2001-09-07 | 2008-01-29 | Medtronic Minimed, Inc. | Sensor substrate and method of fabricating same |
US8003513B2 (en) * | 2002-09-27 | 2011-08-23 | Medtronic Minimed, Inc. | Multilayer circuit devices and manufacturing methods using electroplated sacrificial structures |
US20040061232A1 (en) * | 2002-09-27 | 2004-04-01 | Medtronic Minimed, Inc. | Multilayer substrate |
KR100536361B1 (ko) * | 2003-12-10 | 2005-12-12 | 삼성전기주식회사 | 광 픽업장치 |
JP4900019B2 (ja) * | 2007-04-19 | 2012-03-21 | 富士電機株式会社 | 絶縁トランスおよび電力変換装置 |
US20180144973A1 (en) * | 2016-11-01 | 2018-05-24 | Applied Materials, Inc. | Electromigration Improvement Using Tungsten For Selective Cobalt Deposition On Copper Surfaces |
US11158577B2 (en) | 2020-01-31 | 2021-10-26 | Micron Technology, Inc. | Methods for fabricating microelectronic devices with contacts to conductive staircase steps, and related devices and systems |
Family Cites Families (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS61139026A (ja) * | 1984-12-11 | 1986-06-26 | Fujitsu Ltd | 半導体装置の製造方法 |
EP0195977B1 (de) * | 1985-03-15 | 1994-09-28 | Hewlett-Packard Company | Metallisches Verbindungssystem mit einer ebenen Fläche |
US4789648A (en) * | 1985-10-28 | 1988-12-06 | International Business Machines Corporation | Method for producing coplanar multi-level metal/insulator films on a substrate and for forming patterned conductive lines simultaneously with stud vias |
DE3782904T2 (de) * | 1986-09-17 | 1993-04-08 | Fujitsu Ltd | Verfahren zur ausbildung einer kupfer enthaltenden metallisierungsschicht auf der oberflaeche eines halbleiterbauelementes. |
US4746621A (en) * | 1986-12-05 | 1988-05-24 | Cornell Research Foundation, Inc. | Planar tungsten interconnect |
US4983543A (en) * | 1988-09-07 | 1991-01-08 | Fujitsu Limited | Method of manufacturing a semiconductor integrated circuit having an interconnection wire embedded in a protective layer covering the semiconductor integrated circuit |
GB8907898D0 (en) * | 1989-04-07 | 1989-05-24 | Inmos Ltd | Semiconductor devices and fabrication thereof |
US4943539A (en) * | 1989-05-09 | 1990-07-24 | Motorola, Inc. | Process for making a multilayer metallization structure |
-
1989
- 1989-12-20 JP JP1330402A patent/JPH03190232A/ja active Pending
-
1990
- 1990-12-03 US US07/621,148 patent/US5231054A/en not_active Expired - Fee Related
- 1990-12-04 KR KR1019900019849A patent/KR930010968B1/ko not_active IP Right Cessation
- 1990-12-19 DE DE69025873T patent/DE69025873D1/de not_active Expired - Lifetime
- 1990-12-19 EP EP90124818A patent/EP0434045B1/de not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
KR910013465A (ko) | 1991-08-08 |
EP0434045A3 (en) | 1993-01-20 |
EP0434045A2 (de) | 1991-06-26 |
EP0434045B1 (de) | 1996-03-13 |
US5231054A (en) | 1993-07-27 |
JPH03190232A (ja) | 1991-08-20 |
KR930010968B1 (ko) | 1993-11-18 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8332 | No legal effect for de |