DE69020724D1 - Schneller interpolationsfilter für fernsehnormenumsetzung. - Google Patents
Schneller interpolationsfilter für fernsehnormenumsetzung.Info
- Publication number
- DE69020724D1 DE69020724D1 DE69020724T DE69020724T DE69020724D1 DE 69020724 D1 DE69020724 D1 DE 69020724D1 DE 69020724 T DE69020724 T DE 69020724T DE 69020724 T DE69020724 T DE 69020724T DE 69020724 D1 DE69020724 D1 DE 69020724D1
- Authority
- DE
- Germany
- Prior art keywords
- interpolation filter
- television implementation
- faster
- faster interpolation
- television
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
- H03H17/00—Networks using digital techniques
- H03H17/02—Frequency selective networks
- H03H17/06—Non-recursive filters
- H03H17/0621—Non-recursive filters with input-sampling frequency and output-delivery frequency which differ, e.g. extrapolation; Anti-aliasing
- H03H17/0635—Non-recursive filters with input-sampling frequency and output-delivery frequency which differ, e.g. extrapolation; Anti-aliasing characterized by the ratio between the input-sampling and output-delivery frequencies
- H03H17/065—Non-recursive filters with input-sampling frequency and output-delivery frequency which differ, e.g. extrapolation; Anti-aliasing characterized by the ratio between the input-sampling and output-delivery frequencies the ratio being integer
- H03H17/0664—Non-recursive filters with input-sampling frequency and output-delivery frequency which differ, e.g. extrapolation; Anti-aliasing characterized by the ratio between the input-sampling and output-delivery frequencies the ratio being integer where the output-delivery frequency is lower than the input sampling frequency, i.e. decimation
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
- H03H17/00—Networks using digital techniques
- H03H17/02—Frequency selective networks
- H03H17/06—Non-recursive filters
- H03H17/0621—Non-recursive filters with input-sampling frequency and output-delivery frequency which differ, e.g. extrapolation; Anti-aliasing
- H03H17/0635—Non-recursive filters with input-sampling frequency and output-delivery frequency which differ, e.g. extrapolation; Anti-aliasing characterized by the ratio between the input-sampling and output-delivery frequencies
- H03H17/0685—Non-recursive filters with input-sampling frequency and output-delivery frequency which differ, e.g. extrapolation; Anti-aliasing characterized by the ratio between the input-sampling and output-delivery frequencies the ratio being rational
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N7/00—Television systems
- H04N7/01—Conversion of standards, e.g. involving analogue television standards or digital television standards processed at pixel level
- H04N7/0125—Conversion of standards, e.g. involving analogue television standards or digital television standards processed at pixel level one of the standards being a high definition standard
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N7/00—Television systems
- H04N7/01—Conversion of standards, e.g. involving analogue television standards or digital television standards processed at pixel level
- H04N7/0135—Conversion of standards, e.g. involving analogue television standards or digital television standards processed at pixel level involving interpolation processes
Landscapes
- Engineering & Computer Science (AREA)
- Multimedia (AREA)
- Signal Processing (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Mathematical Physics (AREA)
- Television Systems (AREA)
- Color Television Systems (AREA)
- Complex Calculations (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US07/435,867 US4991010A (en) | 1989-11-13 | 1989-11-13 | Dual-mode image interpolation filter operable in a first mode for storing interpolation coefficients and in a second mode for effecting television standards conversion at a pixel rate |
PCT/US1990/006388 WO1991007848A1 (en) | 1989-11-13 | 1990-11-07 | A high speed interpolation filter for television standards conversion |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69020724D1 true DE69020724D1 (de) | 1995-08-10 |
DE69020724T2 DE69020724T2 (de) | 1996-03-07 |
Family
ID=23730145
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69020724T Expired - Fee Related DE69020724T2 (de) | 1989-11-13 | 1990-11-07 | Schneller interpolationsfilter für fernsehnormenumsetzung. |
Country Status (6)
Country | Link |
---|---|
US (1) | US4991010A (de) |
EP (1) | EP0453558B1 (de) |
JP (1) | JPH04503141A (de) |
AU (1) | AU634605B2 (de) |
DE (1) | DE69020724T2 (de) |
WO (1) | WO1991007848A1 (de) |
Families Citing this family (60)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5182633A (en) * | 1991-04-12 | 1993-01-26 | Abekas Video Systems, Inc. | Video sample rate converter |
US5262625A (en) * | 1991-11-15 | 1993-11-16 | Ncr Corporation | Multiple bar code decoding system and method |
US5243433A (en) * | 1992-01-06 | 1993-09-07 | Eastman Kodak Company | Digital image interpolation system for zoom and pan effects |
US5262854A (en) * | 1992-02-21 | 1993-11-16 | Rca Thomson Licensing Corporation | Lower resolution HDTV receivers |
GB9311942D0 (en) * | 1993-06-09 | 1993-07-28 | Kodak Ltd | Digital signal processing |
US5430486A (en) * | 1993-08-17 | 1995-07-04 | Rgb Technology | High resolution video image transmission and storage |
US5528301A (en) * | 1995-03-31 | 1996-06-18 | Panasonic Technologies, Inc. | Universal video format sample size converter |
US5874994A (en) * | 1995-06-30 | 1999-02-23 | Eastman Kodak Company | Filter employing arithmetic operations for an electronic sychronized digital camera |
GB2307129B (en) * | 1995-11-09 | 2000-01-26 | Sony Uk Ltd | Video down-conversion |
US5808691A (en) * | 1995-12-12 | 1998-09-15 | Cirrus Logic, Inc. | Digital carrier synthesis synchronized to a reference signal that is asynchronous with respect to a digital sampling clock |
IT1278539B1 (it) * | 1995-12-20 | 1997-11-24 | Alcatel Italia | Metodo e relativa disposizione circuitale per trasformare una immagine in una seconda immagine avente una diversa dimensione |
US6023718A (en) * | 1997-05-09 | 2000-02-08 | Matsushita Electric Industrial Co., Ltd. | High speed interpolation filter and a method thereof |
US6377619B1 (en) * | 1997-09-26 | 2002-04-23 | Agere Systems Guardian Corp. | Filter structure and method |
WO2000019715A1 (de) * | 1998-09-28 | 2000-04-06 | Infineon Technologies Ag | Verfahren zur bildgrössenänderung von videobildern |
US8620980B1 (en) | 2005-09-27 | 2013-12-31 | Altera Corporation | Programmable device with specialized multiplier blocks |
US8266198B2 (en) * | 2006-02-09 | 2012-09-11 | Altera Corporation | Specialized processing block for programmable logic device |
US8041759B1 (en) | 2006-02-09 | 2011-10-18 | Altera Corporation | Specialized processing block for programmable logic device |
US8266199B2 (en) * | 2006-02-09 | 2012-09-11 | Altera Corporation | Specialized processing block for programmable logic device |
US8301681B1 (en) | 2006-02-09 | 2012-10-30 | Altera Corporation | Specialized processing block for programmable logic device |
US7836117B1 (en) | 2006-04-07 | 2010-11-16 | Altera Corporation | Specialized processing block for programmable logic device |
US7822799B1 (en) | 2006-06-26 | 2010-10-26 | Altera Corporation | Adder-rounder circuitry for specialized processing block in programmable logic device |
US8386550B1 (en) | 2006-09-20 | 2013-02-26 | Altera Corporation | Method for configuring a finite impulse response filter in a programmable logic device |
US8386553B1 (en) | 2006-12-05 | 2013-02-26 | Altera Corporation | Large multiplier for programmable logic device |
US7930336B2 (en) | 2006-12-05 | 2011-04-19 | Altera Corporation | Large multiplier for programmable logic device |
US7814137B1 (en) * | 2007-01-09 | 2010-10-12 | Altera Corporation | Combined interpolation and decimation filter for programmable logic device |
US8650231B1 (en) | 2007-01-22 | 2014-02-11 | Altera Corporation | Configuring floating point operations in a programmable device |
US7865541B1 (en) | 2007-01-22 | 2011-01-04 | Altera Corporation | Configuring floating point operations in a programmable logic device |
US8645450B1 (en) | 2007-03-02 | 2014-02-04 | Altera Corporation | Multiplier-accumulator circuitry and methods |
US7949699B1 (en) | 2007-08-30 | 2011-05-24 | Altera Corporation | Implementation of decimation filter in integrated circuit device using ram-based data storage |
US8959137B1 (en) | 2008-02-20 | 2015-02-17 | Altera Corporation | Implementing large multipliers in a programmable integrated circuit device |
US8307023B1 (en) | 2008-10-10 | 2012-11-06 | Altera Corporation | DSP block for implementing large multiplier on a programmable integrated circuit device |
US8645449B1 (en) | 2009-03-03 | 2014-02-04 | Altera Corporation | Combined floating point adder and subtractor |
US8468192B1 (en) | 2009-03-03 | 2013-06-18 | Altera Corporation | Implementing multipliers in a programmable integrated circuit device |
US8706790B1 (en) | 2009-03-03 | 2014-04-22 | Altera Corporation | Implementing mixed-precision floating-point operations in a programmable integrated circuit device |
US8650236B1 (en) | 2009-08-04 | 2014-02-11 | Altera Corporation | High-rate interpolation or decimation filter in integrated circuit device |
US8396914B1 (en) | 2009-09-11 | 2013-03-12 | Altera Corporation | Matrix decomposition in an integrated circuit device |
US8412756B1 (en) | 2009-09-11 | 2013-04-02 | Altera Corporation | Multi-operand floating point operations in a programmable integrated circuit device |
US7948267B1 (en) | 2010-02-09 | 2011-05-24 | Altera Corporation | Efficient rounding circuits and methods in configurable integrated circuit devices |
US8539016B1 (en) | 2010-02-09 | 2013-09-17 | Altera Corporation | QR decomposition in an integrated circuit device |
US8601044B2 (en) * | 2010-03-02 | 2013-12-03 | Altera Corporation | Discrete Fourier Transform in an integrated circuit device |
US8484265B1 (en) | 2010-03-04 | 2013-07-09 | Altera Corporation | Angular range reduction in an integrated circuit device |
US8510354B1 (en) | 2010-03-12 | 2013-08-13 | Altera Corporation | Calculation of trigonometric functions in an integrated circuit device |
US8539014B2 (en) * | 2010-03-25 | 2013-09-17 | Altera Corporation | Solving linear matrices in an integrated circuit device |
US8862650B2 (en) | 2010-06-25 | 2014-10-14 | Altera Corporation | Calculation of trigonometric functions in an integrated circuit device |
US8589463B2 (en) | 2010-06-25 | 2013-11-19 | Altera Corporation | Calculation of trigonometric functions in an integrated circuit device |
US8577951B1 (en) | 2010-08-19 | 2013-11-05 | Altera Corporation | Matrix operations in an integrated circuit device |
US8645451B2 (en) | 2011-03-10 | 2014-02-04 | Altera Corporation | Double-clocked specialized processing block in an integrated circuit device |
US9600278B1 (en) | 2011-05-09 | 2017-03-21 | Altera Corporation | Programmable device using fixed and configurable logic to implement recursive trees |
US8812576B1 (en) | 2011-09-12 | 2014-08-19 | Altera Corporation | QR decomposition in an integrated circuit device |
US9053045B1 (en) | 2011-09-16 | 2015-06-09 | Altera Corporation | Computing floating-point polynomials in an integrated circuit device |
US8949298B1 (en) | 2011-09-16 | 2015-02-03 | Altera Corporation | Computing floating-point polynomials in an integrated circuit device |
US8762443B1 (en) | 2011-11-15 | 2014-06-24 | Altera Corporation | Matrix operations in an integrated circuit device |
US8543634B1 (en) | 2012-03-30 | 2013-09-24 | Altera Corporation | Specialized processing block for programmable integrated circuit device |
US9098332B1 (en) | 2012-06-01 | 2015-08-04 | Altera Corporation | Specialized processing block with fixed- and floating-point structures |
US8996600B1 (en) | 2012-08-03 | 2015-03-31 | Altera Corporation | Specialized processing block for implementing floating-point multiplier with subnormal operation support |
US9207909B1 (en) | 2012-11-26 | 2015-12-08 | Altera Corporation | Polynomial calculations optimized for programmable integrated circuit device structures |
US9189200B1 (en) | 2013-03-14 | 2015-11-17 | Altera Corporation | Multiple-precision processing block in a programmable integrated circuit device |
US9348795B1 (en) | 2013-07-03 | 2016-05-24 | Altera Corporation | Programmable device using fixed and configurable logic to implement floating-point rounding |
US9684488B2 (en) | 2015-03-26 | 2017-06-20 | Altera Corporation | Combined adder and pre-adder for high-radix multiplier circuit |
US10942706B2 (en) | 2017-05-05 | 2021-03-09 | Intel Corporation | Implementation of floating-point trigonometric functions in an integrated circuit device |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB2108736B (en) * | 1981-10-27 | 1984-12-12 | Standard Telephones Cables Ltd | Sum of products multiplier |
US4460890A (en) * | 1982-01-21 | 1984-07-17 | Sony Corporation | Direct digital to digital sampling rate conversion, method and apparatus |
NL8202687A (nl) * | 1982-07-05 | 1984-02-01 | Philips Nv | Decimerende filterinrichting. |
US4727505A (en) * | 1984-03-29 | 1988-02-23 | Kabushiki Kaisha Toshiba | Convolution arithmetic circuit for digital signal processing |
US4709394A (en) * | 1985-08-23 | 1987-11-24 | Rca Corporation | Multiplexed real-time pyramid signal processing system |
US4802111A (en) * | 1986-03-10 | 1989-01-31 | Zoran Corporation | Cascadable digital filter processor employing moving coefficients |
US4837619A (en) * | 1987-10-28 | 1989-06-06 | North American Philips Corporation | Scan rate conversion apparatus and method |
US4823201A (en) * | 1987-11-16 | 1989-04-18 | Technology, Inc. 64 | Processor for expanding a compressed video signal |
GB8822415D0 (en) * | 1988-09-23 | 1988-10-26 | Snell & Wilcox Electronic Cons | Video signal processing & video stores |
-
1989
- 1989-11-13 US US07/435,867 patent/US4991010A/en not_active Expired - Lifetime
-
1990
- 1990-11-07 WO PCT/US1990/006388 patent/WO1991007848A1/en active IP Right Grant
- 1990-11-07 DE DE69020724T patent/DE69020724T2/de not_active Expired - Fee Related
- 1990-11-07 AU AU67352/90A patent/AU634605B2/en not_active Ceased
- 1990-11-07 JP JP2515880A patent/JPH04503141A/ja active Pending
- 1990-11-07 EP EP91900584A patent/EP0453558B1/de not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
AU634605B2 (en) | 1993-02-25 |
EP0453558A1 (de) | 1991-10-30 |
WO1991007848A1 (en) | 1991-05-30 |
DE69020724T2 (de) | 1996-03-07 |
EP0453558B1 (de) | 1995-07-05 |
AU6735290A (en) | 1991-06-13 |
US4991010A (en) | 1991-02-05 |
JPH04503141A (ja) | 1992-06-04 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8328 | Change in the person/name/address of the agent |
Representative=s name: BLICKLE, K., DIPL.-ING., PAT.-ASS., 70327 STUTTGAR |
|
8328 | Change in the person/name/address of the agent |
Representative=s name: DR. KUEHNER, H., RECHTSANW., 70327 STUTTGART |
|
8339 | Ceased/non-payment of the annual fee |