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DE60223752D1 - Datenübertragungssteurungsanordnung, Halbleiterspeicheranordnung und elektronisches Informationsgerät - Google Patents

Datenübertragungssteurungsanordnung, Halbleiterspeicheranordnung und elektronisches Informationsgerät

Info

Publication number
DE60223752D1
DE60223752D1 DE60223752T DE60223752T DE60223752D1 DE 60223752 D1 DE60223752 D1 DE 60223752D1 DE 60223752 T DE60223752 T DE 60223752T DE 60223752 T DE60223752 T DE 60223752T DE 60223752 D1 DE60223752 D1 DE 60223752D1
Authority
DE
Germany
Prior art keywords
semiconductor memory
data transfer
electronic information
transfer controller
memory device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60223752T
Other languages
English (en)
Other versions
DE60223752T2 (de
Inventor
Haruyasu Fukui
Ken Sumitani
Yasumichi Mori
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sharp Corp
Original Assignee
Sharp Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sharp Corp filed Critical Sharp Corp
Publication of DE60223752D1 publication Critical patent/DE60223752D1/de
Application granted granted Critical
Publication of DE60223752T2 publication Critical patent/DE60223752T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/28—Handling requests for interconnection or transfer for access to input/output bus using burst mode transfer, e.g. direct memory access DMA, cycle steal

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Read Only Memory (AREA)
  • Bus Control (AREA)
  • Memory System (AREA)
  • Dram (AREA)
DE60223752T 2001-06-28 2002-06-28 Datenübertragungssteurungsanordnung, Halbleiterspeicheranordnung und elektronisches Informationsgerät Expired - Lifetime DE60223752T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2001197536 2001-06-28
JP2001197536A JP3900863B2 (ja) 2001-06-28 2001-06-28 データ転送制御装置、半導体記憶装置および情報機器

Publications (2)

Publication Number Publication Date
DE60223752D1 true DE60223752D1 (de) 2008-01-10
DE60223752T2 DE60223752T2 (de) 2008-10-30

Family

ID=19035124

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60223752T Expired - Lifetime DE60223752T2 (de) 2001-06-28 2002-06-28 Datenübertragungssteurungsanordnung, Halbleiterspeicheranordnung und elektronisches Informationsgerät

Country Status (6)

Country Link
US (1) US6646947B2 (de)
EP (1) EP1271330B1 (de)
JP (1) JP3900863B2 (de)
KR (1) KR100468634B1 (de)
DE (1) DE60223752T2 (de)
TW (1) TWI224727B (de)

Families Citing this family (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7758888B2 (en) * 2000-04-21 2010-07-20 Sol-Gel Technologies Ltd. Composition exhibiting enhanced formulation stability and delivery of topical active ingredients
US6788605B2 (en) * 2002-07-15 2004-09-07 Hewlett-Packard Development Company, L.P. Shared volatile and non-volatile memory
US6948041B2 (en) * 2002-10-24 2005-09-20 Micron Technology, Inc. Permanent memory block protection in a flash memory device
JP4624732B2 (ja) * 2003-07-16 2011-02-02 パナソニック株式会社 アクセス方法
JP2005135065A (ja) 2003-10-29 2005-05-26 Hitachi Ltd 記憶デバイス制御装置、及び記憶デバイス制御装置の制御方法
JP4717570B2 (ja) 2005-09-15 2011-07-06 株式会社リコー データ転送装置、表示装置、およびデータ転送方法
US7721018B2 (en) 2006-08-24 2010-05-18 Microchip Technology Incorporated Direct memory access controller with flow control
AU2008211553B2 (en) 2007-02-01 2013-06-20 Sol-Gel Technologies Ltd. Compositions for topical application comprising a peroxide and retinoid
US8134462B1 (en) * 2008-08-08 2012-03-13 The United States Of America As Represented By The Secretary Of The Navy Self-contained sensor package for water security and safety
KR200452423Y1 (ko) * 2009-01-23 2011-02-28 목준수 조립식 행거형 간판
KR101877938B1 (ko) * 2011-12-21 2018-08-10 에스케이하이닉스 주식회사 반도체 메모리 장치
JP5790532B2 (ja) * 2012-02-13 2015-10-07 セイコーエプソン株式会社 電子機器、及びメモリー制御方法
US9459868B2 (en) 2012-03-15 2016-10-04 International Business Machines Corporation Instruction to load data up to a dynamically determined memory boundary
US9268566B2 (en) 2012-03-15 2016-02-23 International Business Machines Corporation Character data match determination by loading registers at most up to memory block boundary and comparing
US9588762B2 (en) 2012-03-15 2017-03-07 International Business Machines Corporation Vector find element not equal instruction
US9454366B2 (en) * 2012-03-15 2016-09-27 International Business Machines Corporation Copying character data having a termination character from one memory location to another
US9715383B2 (en) 2012-03-15 2017-07-25 International Business Machines Corporation Vector find element equal instruction
US9459864B2 (en) 2012-03-15 2016-10-04 International Business Machines Corporation Vector string range compare
US9454367B2 (en) * 2012-03-15 2016-09-27 International Business Machines Corporation Finding the length of a set of character data having a termination character
US9280347B2 (en) 2012-03-15 2016-03-08 International Business Machines Corporation Transforming non-contiguous instruction specifiers to contiguous instruction specifiers
US9710266B2 (en) 2012-03-15 2017-07-18 International Business Machines Corporation Instruction to compute the distance to a specified memory boundary
US9459867B2 (en) 2012-03-15 2016-10-04 International Business Machines Corporation Instruction to load data up to a specified memory boundary indicated by the instruction
JP7292873B2 (ja) * 2018-12-26 2023-06-19 キヤノン株式会社 画像形成装置

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58166581A (ja) 1982-03-29 1983-10-01 Fujitsu Ltd メモリのアドレツシング方式
US5313610A (en) * 1991-07-03 1994-05-17 Picker International, Inc. Direct memory access control device for use with a single n-bit bus with MOF the n-bits reserved for control signals and (n-m) bits reserved for data addresses
US5245572A (en) * 1991-07-30 1993-09-14 Intel Corporation Floating gate nonvolatile memory with reading while writing capability
US5243575A (en) * 1992-06-19 1993-09-07 Intel Corporation Address transition detection to write state machine interface circuit for flash memory
JP3328605B2 (ja) * 1992-06-22 2002-09-30 株式会社日立製作所 半導体記憶装置
US5644787A (en) * 1993-08-03 1997-07-01 Seiko Epson Corporation Apparatus for controlling data transfer between external interfaces through buffer memory using table data having transfer start address transfer count and unit selection parameter
KR950015370A (ko) * 1993-11-17 1995-06-16 김광호 고속으로 데이타를 라이트하기 위한 플래쉬 라이트 모드 동작방법
US5737748A (en) * 1995-03-15 1998-04-07 Texas Instruments Incorporated Microprocessor unit having a first level write-through cache memory and a smaller second-level write-back cache memory
JP3729591B2 (ja) 1997-04-09 2005-12-21 株式会社ルネサステクノロジ 記憶装置およびクロック発振停止時のデータ受け付け制御方法
US6154793A (en) * 1997-04-30 2000-11-28 Zilog, Inc. DMA with dynamically assigned channels, flexible block boundary notification and recording, type code checking and updating, commands, and status reporting
JPH1185609A (ja) 1997-09-09 1999-03-30 Mitsubishi Electric Corp 半導体記憶装置及びそのデータ管理方法
JP3599541B2 (ja) * 1997-11-27 2004-12-08 シャープ株式会社 不揮発性半導体記憶装置
JP2000276880A (ja) * 1999-03-25 2000-10-06 Sanyo Electric Co Ltd 不揮発性メモリの書き込み回路

Also Published As

Publication number Publication date
US20030007411A1 (en) 2003-01-09
EP1271330A2 (de) 2003-01-02
US6646947B2 (en) 2003-11-11
JP2003015948A (ja) 2003-01-17
JP3900863B2 (ja) 2007-04-04
EP1271330A3 (de) 2004-03-10
KR20030003047A (ko) 2003-01-09
KR100468634B1 (ko) 2005-01-27
DE60223752T2 (de) 2008-10-30
TWI224727B (en) 2004-12-01
EP1271330B1 (de) 2007-11-28

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