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DE60222675D1 - Xe-präamorphisierungsimplantation - Google Patents

Xe-präamorphisierungsimplantation

Info

Publication number
DE60222675D1
DE60222675D1 DE60222675T DE60222675T DE60222675D1 DE 60222675 D1 DE60222675 D1 DE 60222675D1 DE 60222675 T DE60222675 T DE 60222675T DE 60222675 T DE60222675 T DE 60222675T DE 60222675 D1 DE60222675 D1 DE 60222675D1
Authority
DE
Germany
Prior art keywords
präamorphisierungsimplantation
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60222675T
Other languages
English (en)
Other versions
DE60222675T2 (de
Inventor
Matthew Stephen Buynoski
Che-Hoo Ng
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Advanced Micro Devices Inc
Original Assignee
Advanced Micro Devices Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advanced Micro Devices Inc filed Critical Advanced Micro Devices Inc
Application granted granted Critical
Publication of DE60222675D1 publication Critical patent/DE60222675D1/de
Publication of DE60222675T2 publication Critical patent/DE60222675T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H01L21/263—Bombardment with radiation with high-energy radiation
    • H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H01L21/263—Bombardment with radiation with high-energy radiation
    • H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
    • H01L21/26506—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H01L21/263—Bombardment with radiation with high-energy radiation
    • H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
    • H01L21/2658—Bombardment with radiation with high-energy radiation producing ion implantation of a molecular ion, e.g. decaborane
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/324—Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/0223—Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate
    • H10D30/0227—Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate having both lightly-doped source and drain extensions and source and drain regions self-aligned to the sides of the gate, e.g. lightly-doped drain [LDD] MOSFET or double-diffused drain [DDD] MOSFET
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/031—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT]
    • H10D30/0321—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] comprising silicon, e.g. amorphous silicon or polysilicon
    • H10D30/0323—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] comprising silicon, e.g. amorphous silicon or polysilicon comprising monocrystalline silicon
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/6704—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device
    • H10D30/6713—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device characterised by the properties of the source or drain regions, e.g. compositions or sectional shapes
    • H10D30/6715—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device characterised by the properties of the source or drain regions, e.g. compositions or sectional shapes characterised by the doping profiles, e.g. having lightly-doped source or drain extensions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/674—Thin-film transistors [TFT] characterised by the active materials
    • H10D30/6741—Group IV materials, e.g. germanium or silicon carbide
    • H10D30/6743—Silicon
    • H10D30/6744—Monocrystalline silicon
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/01—Manufacture or treatment
    • H10D64/015—Manufacture or treatment removing at least parts of gate spacers, e.g. disposable spacers

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • High Energy & Nuclear Physics (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Health & Medical Sciences (AREA)
  • Toxicology (AREA)
  • Spectroscopy & Molecular Physics (AREA)
  • Thin Film Transistor (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
DE60222675T 2001-08-01 2002-04-05 Xe-präamorphisierungsimplantation Expired - Lifetime DE60222675T2 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US918794 2001-08-01
US09/918,794 US6624037B2 (en) 2001-08-01 2001-08-01 XE preamorphizing implantation
PCT/US2002/010827 WO2003012844A1 (en) 2001-08-01 2002-04-05 Xe preamorphizing implantation

Publications (2)

Publication Number Publication Date
DE60222675D1 true DE60222675D1 (de) 2007-11-08
DE60222675T2 DE60222675T2 (de) 2008-06-19

Family

ID=25440981

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60222675T Expired - Lifetime DE60222675T2 (de) 2001-08-01 2002-04-05 Xe-präamorphisierungsimplantation

Country Status (8)

Country Link
US (1) US6624037B2 (de)
EP (2) EP1419521B1 (de)
JP (1) JP4526819B2 (de)
KR (1) KR100880687B1 (de)
CN (1) CN1307688C (de)
DE (1) DE60222675T2 (de)
TW (1) TWI228276B (de)
WO (1) WO2003012844A1 (de)

Families Citing this family (31)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE60125952T2 (de) * 2000-08-16 2007-08-02 Massachusetts Institute Of Technology, Cambridge Verfahren für die herstellung eines halbleiterartikels mittels graduellem epitaktischen wachsen
WO2002082514A1 (en) * 2001-04-04 2002-10-17 Massachusetts Institute Of Technology A method for semiconductor device fabrication
US6864516B2 (en) * 2002-02-28 2005-03-08 Advanced Micro Devices, Inc. SOI MOSFET junction degradation using multiple buried amorphous layers
US7335545B2 (en) * 2002-06-07 2008-02-26 Amberwave Systems Corporation Control of strain in device layers by prevention of relaxation
US20030227057A1 (en) * 2002-06-07 2003-12-11 Lochtefeld Anthony J. Strained-semiconductor-on-insulator device structures
US6995430B2 (en) * 2002-06-07 2006-02-07 Amberwave Systems Corporation Strained-semiconductor-on-insulator device structures
US7074623B2 (en) * 2002-06-07 2006-07-11 Amberwave Systems Corporation Methods of forming strained-semiconductor-on-insulator finFET device structures
DE10240422B4 (de) * 2002-09-02 2010-02-18 Advanced Micro Devices, Inc., Sunnyvale Verfahren zur Herstellung eines Halbleiterelements mit einer Leitungsstruktur mit vergrößertem Metallsilizidbereich
US6767809B2 (en) * 2002-11-19 2004-07-27 Silterra Malayisa Sdn. Bhd. Method of forming ultra shallow junctions
US6743689B1 (en) * 2003-01-14 2004-06-01 Advanced Micro Devices, Inc. Method of fabrication SOI devices with accurately defined monocrystalline source/drain extensions
EP1577932A3 (de) * 2004-03-16 2006-05-10 Interuniversitair Microelektronica Centrum Verfahren zur Herstellung eines Halbleiters auf einem SOI-Substrat durch Rekristallisation mittels Festphasenepitaxie (SPER) und damit hergestelltes Halbleiterbauelement
TWI279852B (en) * 2004-03-16 2007-04-21 Imec Inter Uni Micro Electr Method of manufacturing a semiconductor on a silicon on insulator (SOI) substrate using solid epitaxial regrowth (SPER) and semiconductor device made thereby
TWI248681B (en) * 2004-03-29 2006-02-01 Imec Inter Uni Micro Electr Method for fabricating self-aligned source and drain contacts in a double gate FET with controlled manufacturing of a thin Si or non-Si channel
JP3737504B2 (ja) * 2004-03-31 2006-01-18 松下電器産業株式会社 半導体装置の製造方法
JP4907063B2 (ja) * 2004-05-25 2012-03-28 株式会社半導体エネルギー研究所 半導体装置の作製方法
US7253071B2 (en) * 2004-06-02 2007-08-07 Taiwan Semiconductor Manufacturing Company Methods for enhancing the formation of nickel mono-silicide by reducing the formation of nickel di-silicide
US7157355B2 (en) 2004-06-30 2007-01-02 Freescale Smeiconductor, Inc. Method of making a semiconductor device having a strained semiconductor layer
WO2006033041A1 (en) * 2004-09-22 2006-03-30 Koninklijke Philips Electronics N.V. Integrated circuit fabrication using solid phase epitaxy and silicon on insulator technology
KR100571424B1 (ko) * 2004-12-30 2006-04-14 동부아남반도체 주식회사 이중 스텝 소오스/드레인 이온 주입에 의한 안정한트랜지스터 형성 방법
JP4923419B2 (ja) * 2005-03-15 2012-04-25 富士通セミコンダクター株式会社 半導体装置の製造方法
WO2007035398A2 (en) * 2005-09-15 2007-03-29 Amberwave Systems Corporation Control of strain in device layers by selective relaxation and prevention of relaxation
JP2007188940A (ja) * 2006-01-11 2007-07-26 Hitachi Displays Ltd 表示装置の製造方法
US20070246750A1 (en) * 2006-04-19 2007-10-25 Toshiba America Electronics Components, Inc. Control of body potential of partially-depleted field-effect transistors
DE102006019935B4 (de) * 2006-04-28 2011-01-13 Advanced Micro Devices, Inc., Sunnyvale SOI-Transistor mit reduziertem Körperpotential und ein Verfahren zur Herstellung
JP2008041988A (ja) * 2006-08-08 2008-02-21 Hiroshima Univ ゲルマニウム（Ｇｅ）半導体デバイス製造方法。
US20080099841A1 (en) * 2006-10-31 2008-05-01 International Business Machines Corporation Method and structure for reducing soi device floating body effects without junction leakage
US9171936B2 (en) * 2006-12-06 2015-10-27 Cypress Semiconductor Corporation Barrier region underlying source/drain regions for dual-bit memory devices
US7442614B1 (en) 2008-03-21 2008-10-28 International Business Machines Corporation Silicon on insulator devices having body-tied-to-source and methods of making
US9461169B2 (en) * 2010-05-28 2016-10-04 Globalfoundries Inc. Device and method for fabricating thin semiconductor channel and buried strain memorization layer
US8536032B2 (en) * 2011-06-08 2013-09-17 International Business Machines Corporation Formation of embedded stressor through ion implantation
US8748285B2 (en) 2011-11-28 2014-06-10 International Business Machines Corporation Noble gas implantation region in top silicon layer of semiconductor-on-insulator substrate

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4584026A (en) 1984-07-25 1986-04-22 Rca Corporation Ion-implantation of phosphorus, arsenic or boron by pre-amorphizing with fluorine ions
JPH0574805A (ja) * 1991-09-13 1993-03-26 Matsushita Electric Ind Co Ltd 半導体装置の製造方法
EP0622834A3 (de) * 1993-04-30 1998-02-11 International Business Machines Corporation Verfahren zur Latch-up Vermeidung und Durchbruchspannung Verbesserung in SOI MOSFET
US6074937A (en) 1997-12-18 2000-06-13 Advanced Micro Devices, Inc. End-of-range damage suppression for ultra-shallow junction formation
US6191012B1 (en) 1998-12-03 2001-02-20 Advanced Micro Devices Method for forming a shallow junction in a semiconductor device using antimony dimer
US5953615A (en) 1999-01-27 1999-09-14 Advance Micro Devices Pre-amorphization process for source/drain junction
US6225176B1 (en) 1999-02-22 2001-05-01 Advanced Micro Devices, Inc. Step drain and source junction formation
JP2001068669A (ja) * 1999-08-30 2001-03-16 Sony Corp 半導体装置の製造方法
US6403433B1 (en) * 1999-09-16 2002-06-11 Advanced Micro Devices, Inc. Source/drain doping technique for ultra-thin-body SOI MOS transistors
KR100916656B1 (ko) * 2002-10-22 2009-09-08 삼성전자주식회사 레이저 조사 장치 및 이를 이용한 다결정 규소 박막트랜지스터의 제조 방법

Also Published As

Publication number Publication date
EP1419521B1 (de) 2007-09-26
TWI228276B (en) 2005-02-21
KR100880687B1 (ko) 2009-01-30
JP2004537856A (ja) 2004-12-16
US6624037B2 (en) 2003-09-23
EP1419521A1 (de) 2004-05-19
EP1511071A3 (de) 2009-01-14
DE60222675T2 (de) 2008-06-19
KR20040026701A (ko) 2004-03-31
JP4526819B2 (ja) 2010-08-18
EP1511071A2 (de) 2005-03-02
CN1539160A (zh) 2004-10-20
WO2003012844A1 (en) 2003-02-13
CN1307688C (zh) 2007-03-28
US20030027381A1 (en) 2003-02-06

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