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DE60019974D1 - Verfahren zur herstellung von submikron mustern auf filmen - Google Patents

Verfahren zur herstellung von submikron mustern auf filmen

Info

Publication number
DE60019974D1
DE60019974D1 DE60019974T DE60019974T DE60019974D1 DE 60019974 D1 DE60019974 D1 DE 60019974D1 DE 60019974 T DE60019974 T DE 60019974T DE 60019974 T DE60019974 T DE 60019974T DE 60019974 D1 DE60019974 D1 DE 60019974D1
Authority
DE
Germany
Prior art keywords
flowable medium
films
interface
flowable
producing submicron
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE60019974T
Other languages
English (en)
Other versions
DE60019974T2 (de
Inventor
Ullrich Steiner
Thomas Thurn-Albrecht
Erik Schaffer
Thomas P Russel
Jurgen Mylnek
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Universitaet Konstanz
University of Massachusetts Boston
Original Assignee
Universitaet Konstanz
University of Massachusetts Boston
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Universitaet Konstanz, University of Massachusetts Boston filed Critical Universitaet Konstanz
Application granted granted Critical
Publication of DE60019974D1 publication Critical patent/DE60019974D1/de
Publication of DE60019974T2 publication Critical patent/DE60019974T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/0002—Lithographic processes using patterning methods other than those involving the exposure to radiation, e.g. by stamping
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B82—NANOTECHNOLOGY
    • B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y10/00—Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B82—NANOTECHNOLOGY
    • B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y40/00—Manufacture or treatment of nanostructures
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/31058—After-treatment of organic layers
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/0011—Working of insulating substrates or insulating layers
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00—Stock material or miscellaneous articles
    • Y10T428/24—Structurally defined web or sheet [e.g., overall dimension, etc.]
    • Y10T428/24479—Structurally defined web or sheet [e.g., overall dimension, etc.] including variation in thickness
    • Y10T428/24521—Structurally defined web or sheet [e.g., overall dimension, etc.] including variation in thickness with component conforming to contour of nonplanar surface

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Chemical & Material Sciences (AREA)
  • Nanotechnology (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Mathematical Physics (AREA)
  • Theoretical Computer Science (AREA)
  • Physical Or Chemical Processes And Apparatus (AREA)
  • Formation Of Insulating Films (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
  • Liquid Deposition Of Substances Of Which Semiconductor Devices Are Composed (AREA)
  • Application Of Or Painting With Fluid Materials (AREA)
  • Treatments Of Macromolecular Shaped Articles (AREA)
DE60019974T 1999-12-23 2000-12-22 Verfahren zur herstellung von submikron mustern auf filmen Expired - Fee Related DE60019974T2 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US17300199P 1999-12-23 1999-12-23
US173001P 1999-12-23
PCT/US2000/035139 WO2001047003A2 (en) 1999-12-23 2000-12-22 Methods and apparatus for forming submicron patterns on films

Publications (2)

Publication Number Publication Date
DE60019974D1 true DE60019974D1 (de) 2005-06-09
DE60019974T2 DE60019974T2 (de) 2005-11-10

Family

ID=22630090

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60019974T Expired - Fee Related DE60019974T2 (de) 1999-12-23 2000-12-22 Verfahren zur herstellung von submikron mustern auf filmen

Country Status (9)

Country Link
US (2) US6391217B2 (de)
EP (1) EP1251974B1 (de)
JP (1) JP3774739B2 (de)
KR (1) KR100675074B1 (de)
AT (1) ATE294648T1 (de)
AU (1) AU779699B2 (de)
CA (1) CA2395760A1 (de)
DE (1) DE60019974T2 (de)
WO (1) WO2001047003A2 (de)

Families Citing this family (142)

* Cited by examiner, † Cited by third party
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CN1696826A (zh) 2000-08-01 2005-11-16 得克萨斯州大学系统董事会 用对激活光透明的模板在衬底上形成图案的方法及半导体器件
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KR20020092927A (ko) 2002-12-12
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AU2454001A (en) 2001-07-03
AU779699B2 (en) 2005-02-10
EP1251974A2 (de) 2002-10-30
US20020005391A1 (en) 2002-01-17
KR100675074B1 (ko) 2007-01-29
ATE294648T1 (de) 2005-05-15
DE60019974T2 (de) 2005-11-10
US7014786B2 (en) 2006-03-21
CA2395760A1 (en) 2001-06-28
WO2001047003A3 (en) 2002-01-31
US6391217B2 (en) 2002-05-21
US20020170879A1 (en) 2002-11-21
WO2001047003A2 (en) 2001-06-28

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