DE4103542A1 - FET-controlled transformer-based DC=DC push=pull converter - features centre-tapped matching transformer with FET-switched prim. and sec. windings - Google Patents

Abstract

The arrangement for a push pull transducer comprises two capacitors (C1,C2), a series inductor (L) and a transformer (T) with matching centre tapped prim. and sec. windings. Four identical FETs are located on either side of the centre tappings of the transformer prim. (transistors T1 and T2) and (transistors T3 and T4) windings. The gate contacts of the FETs are controlled by timing signal voltages (VT1,VT2,VT3,and VT4) arranged so that VT1 = bar VT4 and VT2 = bar VT3. Gate timing signals VT1 and VT2 are synchronised so that the prim. circuit transistors never conduct simultaneously, whereas timing signals VT3 and VT4 are arranged so that the sec. circuit transistors conduct simultaneously for a short period, reducing the sec. circuit impedance and improving the overall transducer operating efficiency in comparison to single ended transducer circuits. ADVANTAGE - FET circuit uses less power and occupies smaller physical vol. than comparable bipolar transistor circuits.

Description

The application concerns a push-pull converter with a Transformer, its primary and secondary winding one upper and one lower connection each have a center tap in which between the Center tap and the upper connection as well as the Center tap and the lower connection of the Primary winding each one controllable Semiconductor component is switched, which alternately are controllable and in which the upper and the lower connection of the secondary winding over one each Semiconductor component guided to a connection point are.

Switching power supplies of this type are known (book: "Switching power supplies", page 33, from the "Contact and Studies ", volume 33, expert-verlag 7031 Grafenau 1 / Württ.).

In this known push-pull converter, there are controllable semiconductor components made of transistors and the semiconductor devices made of diodes.  

The well-known push-pull converter therefore has the Disadvantage that he has a relatively high power loss owns.

The technical problem underlying the invention therefore consists in the push-pull converter in the Way to improve that he next to a small Power loss has a small volume, d. H. with him a high output per unit volume can be realized.

This technical problem is according to the invention solved that all semiconductor devices from MOS field effect transistors exist and secondary-side MOSFET's conductive in the way are controllable that during certain times both only one MOSFET at a time and during other times is controllable.

Such a push-pull converter solves the above specified technical problems. Its build volume is about 20% less than that of the known Push-pull converter.

Reference to the accompanying FIGS. 1 and 2, the invention is explained below. Fig. 1 shows the basic circuit diagram of the push-pull converter according to the invention and Fig. 2 shows the timing diagram of the MOS field effect transistors.

As can be seen in FIG. 1, the circuit arrangement has the capacitors C 1 and C 2 , the transformer T and the inductor L in a known manner. The MOSFET's T 1 to T 4 are each connected between the center tap, which are also the negative connections, and the primary and secondary partial windings of the transformer T. As indicated by the dashed L 'in the primary circuit, the inductor can also be arranged in the primary circuit or each half in the primary and secondary circuit.

As can be seen from Fig. 2, the MOSFET's are controlled such that one of them is conductive. In the embodiment shown, for example, the MOSFET T 1 is controlled from t 2 to t 3 and the MOSFET T 2 from t 4 to t 5 . The turn-on times of T 1 and T 2 can be extended so that they do not overlap each other.

The MOSFET's T 3 and T 4 are controlled in such a way that their on times overlap at times. Thus, in the exemplary embodiment shown, between t 1 and t 2 T 3 and T 4 are controlled to be conductive, while from t 2 to t 3 only T 3 is controlled to be conductive. From t 3 to t 4 , T 3 and T 4 are again conductive.

The push-pull converter according to the invention is constructed symmetrically, ie the input and output are interchangeable. As explained above, both secondary MOSFETs (T 3 and T 4 ) are conductive and therefore connected in parallel during the free-running phase of the inductor L. This leads to a reduction in the secondary impedance and thus to an increase in efficiency compared to the single-ended forward converter.

If the inductor L is divided equally between the primary and secondary circuits, the AC load on the capacitors C 1 and C 2 is reduced. In addition, the number of components required to suppress the push-pull converter is reduced.

Claims (1)

Push-pull converter with a transformer, the primary and secondary windings each have an upper and a lower connection and a central tap, in which a controllable semiconductor component is connected between the central tap and the upper connection and the central tap and the lower connection of the primary winding, which alternately conductive are controllable and in which the upper and the lower connection of the secondary winding are each led to a connection point via a semiconductor component, characterized in that all semiconductor components consist of MOS field effect transistors (T 1 to T 4 ) and the secondary-side MOSFETs (T 3 , T 4 ) can be controlled in such a way that during certain times both can be controlled simultaneously and during the other times only one MOSFET can be controlled.