DE3816256A1 - METHOD FOR PRODUCING A SINGLE-CRYSTALLINE LAYER CONSTRUCTING FROM A FIRST SEMICONDUCTOR MATERIAL ON A SUBSTRATE FROM ANOTHER DIFFERENT SEMICONDUCTOR MATERIAL, AND USING THE ARRANGEMENT FOR PRODUCING OPTOELECTRONICALLY INTEGRATED - Google Patents
METHOD FOR PRODUCING A SINGLE-CRYSTALLINE LAYER CONSTRUCTING FROM A FIRST SEMICONDUCTOR MATERIAL ON A SUBSTRATE FROM ANOTHER DIFFERENT SEMICONDUCTOR MATERIAL, AND USING THE ARRANGEMENT FOR PRODUCING OPTOELECTRONICALLY INTEGRATEDInfo
- Publication number
- DE3816256A1 DE3816256A1 DE19883816256 DE3816256A DE3816256A1 DE 3816256 A1 DE3816256 A1 DE 3816256A1 DE 19883816256 DE19883816256 DE 19883816256 DE 3816256 A DE3816256 A DE 3816256A DE 3816256 A1 DE3816256 A1 DE 3816256A1
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- semiconductor material
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02524—Group 14 semiconducting materials
- H01L21/02532—Silicon, silicon germanium, germanium
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
- H01L21/0237—Materials
- H01L21/02387—Group 13/15 materials
- H01L21/02395—Arsenides
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02436—Intermediate layers between substrates and deposited layers
- H01L21/02439—Materials
- H01L21/02488—Insulating materials
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02436—Intermediate layers between substrates and deposited layers
- H01L21/02494—Structure
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02656—Special treatments
- H01L21/02664—Aftertreatments
- H01L21/02667—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
- H01L21/02675—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth using laser beams
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02656—Special treatments
- H01L21/02664—Aftertreatments
- H01L21/02667—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
- H01L21/02691—Scanning of a beam
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Optics & Photonics (AREA)
- Materials Engineering (AREA)
- Recrystallisation Techniques (AREA)
Abstract
Description
Die Erfindung betrifft ein Verfahren zum Herstellen einer aus einem ersten Halbleitermaterial bestehenden einkristallinen Schicht auf einem Substrat aus einem andersartigen zweiten Halbleitermaterial sowie die Verwendung des Verfahrens zur Herstellung von solchen Anordnungen in optoelektronischen integrierten Schaltungen auf der Basis von A III B V-Verbindungen mit Silizium.The invention relates to a method for producing a single-crystal layer consisting of a first semiconductor material on a substrate made of a different type of second semiconductor material, and to the use of the method for producing such arrangements in optoelectronic integrated circuits based on A III B V compounds with silicon.
Bei der Realisierung eines mehrere Halbleitermaterialien enthaltenden Aufbaus liegt die Schwierigkeit darin, daß verschiedene Halbleitermaterialien im allgemeinen verschie dene Gitterkonstanten haben. Durch die mangelnde Gitteran passung im Bereich der Grenzfläche zwischen den Halbleiter materialien werden Kristallfehler hergerufen, die sich in die Schichten fortsetzen. Die entstehende Kristallschicht genügt dann nicht mehr den Qualitätsanforderungen, die z.B. für optoelektronische Funktionselemente enthaltende inte grierte Schaltungen an die Kristallschicht aus z.B. einkri stallinen Halbleitern auf der Basis von III-V-Verbindungen gestellt werden.When realizing one of several semiconductor materials containing construction, the difficulty is that different semiconductor materials in general have lattice constants. Due to the lack of grid fit in the area of the interface between the semiconductors materials are called crystal defects, which can be found in continue the shifts. The resulting crystal layer Then the quality requirements that e.g. for inte. containing for optoelectronic functional elements circuits on the crystal layer from e.g. single stallinen semiconductors based on III-V compounds be put.
Bei optoelektronischen Schaltungen und deren Kopplung mit integrierten elektronischen Schaltungen werden Lichtsender, Lichtempfänger und integrierte Schaltkreise zur Signalver arbeitung benötigt. Für die Lichtsender werden meist A III B V- Verbindungen verwendet. With optoelectronic circuits and their coupling with integrated electronic circuits, light transmitters, light receivers and integrated circuits are required for signal processing. A III B V connections are mostly used for the light transmitters.
Der hohe Entwicklungsstand integrierter Schaltungen in Siliziumsubstraten legt die Verwendung von Silizium für die integrierten elektronischen Schaltungen in optoelektronischen und optoelektronisch gekoppelten integrierten Schaltungen nahe. Integrierte Schaltungen in Siliziumsubstraten und elektrooptische Elemente aus A III B V-Verbindungen werden in hybridem Aufbau miteinander verbunden. Hybridschaltungen haben im Vergleich zu voll integrierten Schaltungen den Nachteil, daß sie eine geringere Zuverlässigkeit aufweisen. Die erreichbare Integrationsdichte ist ebenfalls geringer. Hinzu kommen höhere Fertigungskosten auch bei großen Stückzahlen. Durch den hybriden Aufbau von integrierten Schaltungen mit optoelektronischen Elementen wird daher ein Teil der Vorzüge von integrierten Schaltungen verschenkt.The high level of development of integrated circuits in silicon substrates suggests the use of silicon for the integrated electronic circuits in optoelectronic and optoelectronically coupled integrated circuits. Integrated circuits in silicon substrates and electro-optical elements from A III B V connections are connected to each other in a hybrid structure. Compared to fully integrated circuits, hybrid circuits have the disadvantage that they are less reliable. The integration density that can be achieved is also lower. In addition, there are higher production costs even with large quantities. The hybrid structure of integrated circuits with optoelectronic elements means that some of the advantages of integrated circuits are given away.
Der Erfindung liegt die Aufgabe zugrunde, ein Verfahren an zugeben, mit dem eine monolithische Integration von opto elektronischen Funktionselementen z.B. auf der Basis von A III B V-Verbindungen mit elektronischen Funktionselementen aus z.B. Silizium ermöglicht wird.The invention has for its object to provide a method with which a monolithic integration of opto-electronic functional elements, for example on the basis of A III B V connections with electronic functional elements made of silicon, for example, is made possible.
Diese Aufgabe wird erfindungsgemäß durch ein Verfahren der eingangs genannten Art gelöst, welches dadurch ge kennzeichnet ist, daß die Schicht aus dem ersten Halblei termaterial zunächst in amorpher oder polykristalliner Form auf dem Substrat aufgebracht wird und anschließend einem lateralen Rekristallisationsprozeß unterworfen wird.According to the invention, this object is achieved by a method of the type mentioned, which ge is characterized in that the layer from the first half lead Term material first in amorphous or polycrystalline form is applied to the substrate and then one is subjected to lateral recrystallization process.
Das Verfahren ist besonders geeignet zur Herstellung von optoelektronischen integrierten Schaltungen auf der Basis von A III B V-Verbindungen und Silizium.The method is particularly suitable for the production of optoelectronic integrated circuits based on A III B V compounds and silicon.
Weitere Ausgestaltungen der Erfindung gehen aus den übrigen Ansprüchen hervor. Further refinements of the invention result from the other claims.
Die Erfindung macht sich Erkenntnisse, die in der Silicon on-Insulator-(SOI-) Technologie (s. z.B. Electronics Week, Nov. 19, 1985, S. 28) gewonnen wurden, zunutze.The invention makes knowledge in the silicone on-insulator (SOI) technology (see e.g. Electronics Week, Nov. 19, 1985, p. 28).
Die Erfindung ermöglicht einen monolithischen Aufbau optoelektronischer integrierter Schaltungen; hier wird monolithisch in dem Sinn gebraucht, daß der Aufbau ein verschiedene Halbleitermaterialien enthaltender Schichtaufbau ist. Im Vergleich zu Hybridschaltungen haben monolithisch integrierte Schaltungen den Vorteil, daß sie in großer Stückzahl kostengünstig herstellbar sind. In monolithisch integrierten Schaltungen wird eine höhere Zuverlässigkeit erzielt. Der Platz- und Leistungsbedarf ist geringer. In monolithisch integrier ten Schaltungen ist eine höhere Integrationsdichte mög lich.The invention enables a monolithic structure optoelectronic integrated circuits; here will used monolithically in the sense that the structure a containing various semiconductor materials Layer structure is. Compared to hybrid circuits monolithic integrated circuits have the advantage that they can be produced inexpensively in large numbers are. In monolithically integrated circuits achieved higher reliability. The place and The power requirement is lower. Integrated in monolithic A higher integration density is possible in th circuits Lich.
In der Figur ist ein Ausführungsbeispiel der Erfindung dargestellt, das im folgenden näher erläutert wird.In the figure is an embodiment of the invention shown, which is explained in more detail below.
Auf einem Substrat 1 wird eine Zwischenschicht 2 aufge bracht. Das Substrat 1 besteht aus einem ersten Halbleiter material hoher Qualität das für optoelektronische Anwen dungen geeignet ist, z.B. aus einer A III B V-Verbindung insbesondere Gas. Die Zwischenschicht 2 ist so gestaltet, daß an vorbestimmten Stellen die Oberfläche des Substrats 1 unbedeckt ist. Die Zwischenschicht 2 besteht z.B. aus einem Isolationsoxid. Die Zwischenschicht 2 wird z.B. mit Hilfe einer Fototechnik strukturiert. Auf die Zwischenschicht 2 wird eine Halbleiterschicht 3 so aufgebracht, daß sie die Zwischenschicht 2 und die freigelegte Oberfläche des Substrats 1 ganz bedeckt. Die Halbleiterschicht 3 besteht aus einem zweiten Halbleitermaterial, das für die Herstel lung integrierter Schaltungen geeignet ist, z.B. aus Silizium. Die Halbleiterschicht 3 wird als amorphe oder als polykristalline Schicht aufgebracht. Anschließend wird sie durch laterale Rekristallisation in eine einkristalline Schicht verwandelt. Die Rekristallisation erfolgt z.B. durch Licht. Mit einem Laserstrahl 4, der senkrecht auf die Halbleiterschicht 3 gerichtet ist, wird ein Bereich 5 der Halbleiterschicht 3 und der daran angrenzenden Schicht geschmolzen. Durch Bewegen des Laserstrahls parallel zur Oberfläche der Halbleiterschicht 3 wandert der geschmolzene Bereich 5 über die Halbleiterschicht 3. Dabei wird in der Bewegungsrichtung an der Vorderseite des Bereichs 5 neues Halbleitermaterial geschmolzen, während das Halbleiter material an der Rückseite des Bereichs 5 rekristallisiert. Auf diese Weise wird die Halbleiterschicht 3 vom polykri stallinen bzw. amorphen Zustand in den einkristallinen Zustand gebracht. An den Stellen, an denen die Halbleiter schicht 3 direkt auf das Substrat 1 folgt, kommt es an der Grenzfläche in Folge der mangelnden Gitteranpassung zu Kristallfehlern. Diese pflanzen sich jedoch nicht in die Halbleiterschicht 3 fort, so daß die Halbleiterschicht 3 voll den Anforderungen an die Qualität für schnelle Funk tionselemente genügt.On a substrate 1 , an intermediate layer 2 is brought up. The substrate 1 consists of a first semiconductor material of high quality which is suitable for optoelectronic applications, for example from an A III B V connection, in particular gas. The intermediate layer 2 is designed such that the surface of the substrate 1 is uncovered at predetermined locations. The intermediate layer 2 consists, for example, of an insulation oxide. The intermediate layer 2 is structured using a photo technique, for example. A semiconductor layer 3 is applied to the intermediate layer 2 such that it completely covers the intermediate layer 2 and the exposed surface of the substrate 1 . The semiconductor layer 3 consists of a second semiconductor material which is suitable for the manufacture of integrated circuits, for example of silicon. The semiconductor layer 3 is applied as an amorphous or as a polycrystalline layer. It is then transformed into a single-crystalline layer by lateral recrystallization. The recrystallization is carried out, for example, by light. With a laser beam 4, which is directed perpendicular to the semiconductor layer 3, an area is melted 5 of the semiconductor layer 3 and the layer adjacent thereto. By moving the laser beam parallel to the surface of the semiconductor layer 3 , the molten region 5 migrates over the semiconductor layer 3 . New semiconductor material is melted in the direction of movement on the front side of area 5 , while the semiconductor material recrystallizes on the back side of area 5 . In this way, the semiconductor layer 3 is brought from the polycrystalline or amorphous state into the single-crystal state. At the points where the semiconductor layer 3 directly follows the substrate 1 , crystal defects occur at the interface as a result of the lack of lattice matching. However, these do not reproduce in the semiconductor layer 3 , so that the semiconductor layer 3 fully meets the quality requirements for fast func tion elements.
Da die unterschiedlichen Halbleitermaterialien nur lokal miteinander Kontakt haben, ist in den Bereichen, in denen schnelle Funktionselemente angeordnet sind, die erforder liche Kristallgüte gegeben. Die Berührung der verschiedenen Halbleitermaterialien tritt nur in den Bereichen auf, in denen optoelektronische Funktionen benötigt werden.Because the different semiconductor materials are only local is in the areas where fast functional elements are arranged, the required given crystal quality. The touch of the different Semiconductor materials only occur in the areas where where optoelectronic functions are required.
Claims (6)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
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DE19883816256 DE3816256A1 (en) | 1988-05-11 | 1988-05-11 | METHOD FOR PRODUCING A SINGLE-CRYSTALLINE LAYER CONSTRUCTING FROM A FIRST SEMICONDUCTOR MATERIAL ON A SUBSTRATE FROM ANOTHER DIFFERENT SEMICONDUCTOR MATERIAL, AND USING THE ARRANGEMENT FOR PRODUCING OPTOELECTRONICALLY INTEGRATED |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
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DE19883816256 DE3816256A1 (en) | 1988-05-11 | 1988-05-11 | METHOD FOR PRODUCING A SINGLE-CRYSTALLINE LAYER CONSTRUCTING FROM A FIRST SEMICONDUCTOR MATERIAL ON A SUBSTRATE FROM ANOTHER DIFFERENT SEMICONDUCTOR MATERIAL, AND USING THE ARRANGEMENT FOR PRODUCING OPTOELECTRONICALLY INTEGRATED |
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Publication Number | Publication Date |
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DE3816256A1 true DE3816256A1 (en) | 1989-11-23 |
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DE19883816256 Ceased DE3816256A1 (en) | 1988-05-11 | 1988-05-11 | METHOD FOR PRODUCING A SINGLE-CRYSTALLINE LAYER CONSTRUCTING FROM A FIRST SEMICONDUCTOR MATERIAL ON A SUBSTRATE FROM ANOTHER DIFFERENT SEMICONDUCTOR MATERIAL, AND USING THE ARRANGEMENT FOR PRODUCING OPTOELECTRONICALLY INTEGRATED |
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Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE2920763A1 (en) * | 1978-05-23 | 1979-11-29 | Western Electric Co | Semi-conductor components and integrated semi-conductor circuits |
DE2837750A1 (en) * | 1978-08-30 | 1980-03-13 | Philips Patentverwaltung | METHOD FOR PRODUCING SEMICONDUCTOR COMPONENTS |
DE2848333A1 (en) * | 1978-11-08 | 1980-10-02 | Philips Patentverwaltung | Solid state element construction process - using EM, electron or ion beams directed onto selected regions of layer to change their crystalline state |
DE3034078A1 (en) * | 1979-09-12 | 1981-04-09 | Hitachi, Ltd., Tokyo | METHOD FOR PRODUCING A SEMICONDUCTOR ARRANGEMENT |
US4323417A (en) * | 1980-05-06 | 1982-04-06 | Texas Instruments Incorporated | Method of producing monocrystal on insulator |
EP0077020A2 (en) * | 1981-10-09 | 1983-04-20 | Hitachi, Ltd. | Method of manufacturing single-crystal film |
-
1988
- 1988-05-11 DE DE19883816256 patent/DE3816256A1/en not_active Ceased
Patent Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE2920763A1 (en) * | 1978-05-23 | 1979-11-29 | Western Electric Co | Semi-conductor components and integrated semi-conductor circuits |
DE2837750A1 (en) * | 1978-08-30 | 1980-03-13 | Philips Patentverwaltung | METHOD FOR PRODUCING SEMICONDUCTOR COMPONENTS |
DE2848333A1 (en) * | 1978-11-08 | 1980-10-02 | Philips Patentverwaltung | Solid state element construction process - using EM, electron or ion beams directed onto selected regions of layer to change their crystalline state |
DE3034078A1 (en) * | 1979-09-12 | 1981-04-09 | Hitachi, Ltd., Tokyo | METHOD FOR PRODUCING A SEMICONDUCTOR ARRANGEMENT |
US4323417A (en) * | 1980-05-06 | 1982-04-06 | Texas Instruments Incorporated | Method of producing monocrystal on insulator |
EP0077020A2 (en) * | 1981-10-09 | 1983-04-20 | Hitachi, Ltd. | Method of manufacturing single-crystal film |
Non-Patent Citations (4)
Title |
---|
JP-Z: Japanese Journal of Applied Physics, Vol.26,No. 11, November 1987, S. 1816-1822 * |
Mat. Res. Soc. Symp. Proc., Vol.53, 1985, pp. 187-292 * |
US-Z: Appl.Phys.Lett. 48 (19), 12. May 1986, S. 1252-1254 * |
US-Z: Appl.Phys.Lett. 52 (1), 4. January 1988, S. 60-62 * |
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