DE3811313A1 - Housing for hybrid circuits - Google Patents
Housing for hybrid circuitsInfo
- Publication number
- DE3811313A1 DE3811313A1 DE3811313A DE3811313A DE3811313A1 DE 3811313 A1 DE3811313 A1 DE 3811313A1 DE 3811313 A DE3811313 A DE 3811313A DE 3811313 A DE3811313 A DE 3811313A DE 3811313 A1 DE3811313 A1 DE 3811313A1
- Authority
- DE
- Germany
- Prior art keywords
- substrate
- housing
- pins
- thick
- housing according
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000000758 substrate Substances 0.000 claims abstract description 29
- 229910052751 metal Inorganic materials 0.000 claims abstract description 12
- 239000002184 metal Substances 0.000 claims abstract description 12
- 239000000919 ceramic Substances 0.000 claims abstract description 8
- 229910000679 solder Inorganic materials 0.000 claims description 12
- 239000000463 material Substances 0.000 claims description 6
- 230000001681 protective effect Effects 0.000 claims description 3
- 238000012216 screening Methods 0.000 abstract 1
- 239000010410 layer Substances 0.000 description 11
- 239000011521 glass Substances 0.000 description 5
- 238000007650 screen-printing Methods 0.000 description 4
- 238000004519 manufacturing process Methods 0.000 description 3
- 238000002844 melting Methods 0.000 description 3
- 238000001465 metallisation Methods 0.000 description 3
- 229910045601 alloy Inorganic materials 0.000 description 2
- 239000000956 alloy Substances 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 239000011810 insulating material Substances 0.000 description 2
- 230000008018 melting Effects 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- 238000005476 soldering Methods 0.000 description 2
- FRWYFWZENXDZMU-UHFFFAOYSA-N 2-iodoquinoline Chemical compound C1=CC=CC2=NC(I)=CC=C21 FRWYFWZENXDZMU-UHFFFAOYSA-N 0.000 description 1
- 229910004298 SiO 2 Inorganic materials 0.000 description 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 1
- 239000000853 adhesive Substances 0.000 description 1
- 238000004026 adhesive bonding Methods 0.000 description 1
- 230000001070 adhesive effect Effects 0.000 description 1
- 239000012790 adhesive layer Substances 0.000 description 1
- QLJCFNUYUJEXET-UHFFFAOYSA-K aluminum;trinitrite Chemical compound [Al+3].[O-]N=O.[O-]N=O.[O-]N=O QLJCFNUYUJEXET-UHFFFAOYSA-K 0.000 description 1
- LTPBRCUWZOMYOC-UHFFFAOYSA-N beryllium oxide Inorganic materials O=[Be] LTPBRCUWZOMYOC-UHFFFAOYSA-N 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 230000007123 defense Effects 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 230000018109 developmental process Effects 0.000 description 1
- 239000012777 electrically insulating material Substances 0.000 description 1
- 239000002241 glass-ceramic Substances 0.000 description 1
- 229910000833 kovar Inorganic materials 0.000 description 1
- CPLXHLVBOLITMK-UHFFFAOYSA-N magnesium oxide Inorganic materials [Mg]=O CPLXHLVBOLITMK-UHFFFAOYSA-N 0.000 description 1
- 239000000395 magnesium oxide Substances 0.000 description 1
- AXZKOIWUVFPNLO-UHFFFAOYSA-N magnesium;oxygen(2-) Chemical compound [O-2].[Mg+2] AXZKOIWUVFPNLO-UHFFFAOYSA-N 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 229910000510 noble metal Inorganic materials 0.000 description 1
- 238000010943 off-gassing Methods 0.000 description 1
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 description 1
- 238000007789 sealing Methods 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
Classifications
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K5/00—Casings, cabinets or drawers for electric apparatus
- H05K5/0091—Housing specially adapted for small components
- H05K5/0095—Housing specially adapted for small components hermetically-sealed
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/02—Containers; Seals
- H01L23/04—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
- H01L23/053—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having an insulating or insulated base as a mounting for the semiconductor body
- H01L23/055—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having an insulating or insulated base as a mounting for the semiconductor body the leads having a passage through the base
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
- H01L23/5384—Conductive vias through the substrate with or without pins, e.g. buried coaxial conductors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of semiconductor or other solid state devices
- H01L25/16—Assemblies consisting of a plurality of semiconductor or other solid state devices the devices being of types provided for in two or more different subclasses of H10B, H10D, H10F, H10H, H10K or H10N, e.g. forming hybrid circuits
- H01L25/165—Containers
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0213—Electrical arrangements not otherwise provided for
- H05K1/0216—Reduction of cross-talk, noise or electromagnetic interference
- H05K1/0218—Reduction of cross-talk, noise or electromagnetic interference by printed shielding conductors, ground planes or power plane
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- H—ELECTRICITY
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
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- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49171—Fan-out arrangements
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- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
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- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
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- H01L2924/01012—Magnesium [Mg]
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
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- H01L2924/01014—Silicon [Si]
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01078—Platinum [Pt]
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/095—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00 with a principal constituent of the material being a combination of two or more materials provided in the groups H01L2924/013 - H01L2924/0715
- H01L2924/097—Glass-ceramics, e.g. devitrified glass
- H01L2924/09701—Low temperature co-fired ceramic [LTCC]
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- H01L2924/14—Integrated circuits
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- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15312—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a pin array, e.g. PGA
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- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/161—Cap
- H01L2924/1615—Shape
- H01L2924/16152—Cap comprising a cavity for hosting the device, e.g. U-shaped cap
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- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/191—Disposition
- H01L2924/19101—Disposition of discrete passive components
- H01L2924/19105—Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate
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- H01L2924/301—Electrical effects
- H01L2924/3025—Electromagnetic shielding
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Electromagnetism (AREA)
- Casings For Electric Apparatus (AREA)
Abstract
Description
Die Erfindung betrifft ein Gehäuse für Hybrid-Schaltungen, insbesondere elektronische oder optronische Dickschichtschaltungen auf isolierendem Substrat mit metallischen elektrischen Durchführungen, hermetisch ge kapselt mit einer Schutzgasfüllung.The invention relates to a housing for hybrid circuits, in particular electronic or optronic thick-film circuits on insulating Substrate with metallic electrical feedthroughs, hermetically sealed encapsulates with a protective gas filling.
Derartige hermetisch und elektromagnetisch dichte Gehäuse für Hybrid- Bausteine finden Anwendung vor allem in der Flugzeug- und Raumfahrtelek tronik sowie in der Wehrtechnik. Es ist bekannt, Hybrid-Schaltungen aus passiven und aktiven elektronischen Bauteilen in einem metallischen Ge häuse unterzubringen und dieses unter Füllung mit Schutzgas dicht zu verschließen. Die Bauelemente sind dabei gemeinsam auf einem isolieren den, gesonderten Substrat aufgebracht. Das Substrat wird auf einen me tallischen Gehäuseboden aufgeklebt, der mit eingeglasten elektrischen Durchführungsstiften (Pins oder andere elektrische Verbindungspfosten) versehen ist. Die elektrischen Verbindungen bei Halbleiter-Bauelementen und Anschlußstiften des Gehäuses werden üblicherweise in Wire-Bond-Tech nik ausgeführt, wobei Probleme auftreten, sowohl hinsichtlich der Haft festigkeit der Verbindungen als auch wegen der erforderlichen Bewegungs freiheit, die die Montagewerkzeuge haben müssen.Such hermetically and electromagnetically sealed housing for hybrid Modules are used primarily in aircraft and space technology tronics and defense technology. It is known to make hybrid circuits passive and active electronic components in a metallic Ge housing and this tightly filled with protective gas close. The components are insulated together on one applied the separate substrate. The substrate is on a me glued on the metallic case back, the glass with electrical Feedthrough pins (pins or other electrical connection posts) is provided. The electrical connections in semiconductor devices and pins of the housing are usually in wire bond tech nik performed with problems, both in terms of detention strength of the connections as well as due to the required movement freedom that the assembly tools must have.
Aufgabe der Erfindung ist es, ein Gehäuse zu schaffen mit vereinfachtem Aufbau und leichterer Herstellbarkeit, jedoch in hohem Qualitätsstandard insbesondere hinsichtlich der hergestellten Verbindungen und der Dicht heit des Gehäuses.The object of the invention is to provide a housing with a simplified Structure and easier to manufacture, but in a high quality standard especially with regard to the connections made and the seal unit of the housing.
Gelöst wird diese Aufgabe erfindungsgemäß durch die in Anspruch 1 aufge
führten Merkmale. Aus- und Weiterbildungen der Erfindung sind den weite
ren Ansprüchen sowie den Zeichnungen, Beschreibungen des Ausführungsbei
spieles zu entnehmen. Zur Erfindung gehören nach aller Regel Kombinatio
nen und Unterkombinationen der beanspruchten, beschriebenen und darge
stellten Merkmale.
This object is achieved according to the invention by the features listed in claim 1. Training and further developments of the invention can be found in the wide ren claims and the drawings, descriptions of the game Ausführungsbei. To the invention are all rule combinations and sub-combinations of the claimed, described and Darge presented features.
Im Ausführungsbeispiel zeigen:In the exemplary embodiment show:
Fig. 1 einen Querschnitt durch das Gehäuse mit Hybrid-Schaltung; Fig. 1 shows a cross section through the housing with the hybrid circuit;
Fig. 2 eine Draufsicht auf die Hybrid-Schaltung; Fig. 2 is a plan view of the hybrid circuit;
Fig. 3 eine Unteransicht einer Durchkontaktierung; Fig. 3 is a bottom view of a via;
Fig. 4 einen Querschnitt gemäß Fig. 3; FIG. 4 shows a cross section according to FIG. 3;
Fig. 5 eine Draufsicht gemäß Fig. 3. Fig. 5 is a plan view of FIG. 3.
Wie aus Fig. 1 ersichtlich, besteht das Gehäuse aus einem Gehäuseboden- Substrat 1 aus Isoliermaterial mit durchmetallisierten Bohrungen 4 und eingelöteten Anschlußstiften 3 und wird abgeschlossen von einem Metall deckel 2.As can be seen from FIG. 1, the housing consists of a housing base substrate 1 made of insulating material with through-metallized holes 4 and soldered-in connecting pins 3 and is closed by a metal cover 2 .
Um eine hermetische Dichtheit des Gehäuses zu erreichen, sind die Durch führungsbohrungen im Siebdruck beidseitig durchmetallisiert, wie Fig. 4 zeigt, und die Anschlußstifte werden mit einem hochschmelzenden Lot in die Metallisierungen eingelötet. Um eine elektromagnetisch dichte Ab schirmung zu erhalten, ist das Substrat 1 beschichtet: Es ist auf seiner Außenseite mit einer Metallschicht versehen, wobei die Durchführungen in der Schicht 5 ringförmig elektrisch isolierend ausgespart (bei 6 um die Lötaugen herum gemäß Fig. 3 beabstandet) sind, jedoch in mindestens einem Fall elektrischer Kontakt durch Nichtbeabstandung gegeben ist. Um den Metalldeckel 2 auf das Gehäuse aufbringen zu können, besitzt das Substrat 1 eine, die gesamte Hybrid-Anordnung einschließende, bis an den Rand reichende Metallisierung (7) aus einer oder mehreren Schichten, von denen wenigstens eine aus einem Material zur Verbindung mit dem Deckel 2 besteht.In order to achieve a hermetic seal of the housing, the through-holes in the screen printing are metallized on both sides, as shown in FIG. 4, and the connecting pins are soldered into the metallizations with a high-melting solder. In order to obtain an electromagnetically tight shielding, the substrate 1 is coated: it is provided on its outside with a metal layer, the bushings in the layer 5 being recessed in a ring in an electrically insulating manner (spaced 6 around the soldering eyes according to FIG. 3) , but in at least one case there is electrical contact due to non-spacing. In order to be able to apply the metal cover 2 to the housing, the substrate 1 has a metallization ( 7 ), which includes the entire hybrid arrangement and extends to the edge, of one or more layers, at least one of which is made of a material for connection to the Cover 2 exists.
Das Substrat 1, welches den Gehäuseboden bildet, ist aus einem Isolier material, wie Keramik oder Glas bestehend, wobei übliche elektrisch-iso lierende Werkstoffe, wie Aluminiumoxid, Aluminiumnitrit, Berilliumoxid, Magnesiumoxid oder ähnlich geeignete Substrate verwendet werden.The substrate 1 , which forms the housing bottom, is made of an insulating material, such as ceramic or glass, with customary electrically-insulating materials such as aluminum oxide, aluminum nitrite, beryllium oxide, magnesium oxide or similar suitable substrates being used.
Wesentlich ist eine ausreichende Dichtheit und Temperaturbeständigkeit für die Zwecke der Erfindung, dies gilt auch für das zu verwendende Glas. Selbstverständlich kann auch Quarzglas, SiO2, oder eine Glas keramik oder eine Siliziumkeramik verwendet werden, wie Si3N4 oder SiC. Mischsubstrate sind anwendbar, ebenso bereits vorgefertigte, ein seitig metallisierte Keramik- oder Glassubstrate. Als Metall für den Deckel 2 werden mit der Keramik gut verbindbare Metalle bevorzugt, ins besondere eine Legierung, wie sie unter dem Handelsnamen "Kovar" erhält lich ist. Diese oder ähnliche Legierungen werden bevorzugt, weil sie einen der Keramik angeglichenen thermischen Ausdehnungskoeffizienten aufweisen. Zur Verbindung des Deckels mit dem Substrat dient eine Lot schicht, insbesodere aus einem Zinnbasislot mit vorzugsweise Schmelz punkt von unter 200°C. Das Lot kann entweder direkt oder über eine oder mehrere Zwischenschichten mit dem Substrat 1 im Randbereich 7 verbunden werden. Diese eine oder mehrere Verbindungsschichten 7 sind vorzugsweise zusammen in einem Arbeitsgang mit der Dickschichtschaltung im Siebdruck auf der Oberseite des Substrats aufgebracht, vgl. Fig. 1 und Fig. 2. Selbstverständlich sind auch andere Materialien, wie sie zur Verbindung zwischen Metall und Metall-Keramik-Schichten und zur Verbindung zwischen Metall und Metall-Glas-Schichten bekannt sind, anwendbar. Dieses nämlich wird um etwa 150°C höher schmelzend gewählt, insbesonders ein Lot auf einer Bleibasis. Es gibt auch andere Lote mit Schmelzpunkten über 250°C, insbesonders 300°C bis 400°C, die geeignet sind. Bei der Wahl des Verbindungsmaterials sollte man beachten, daß beim hermetisch dich ten Verschließen des Gehäuses mit Hilfe des Deckels 2 frühere Kontaktie rungen, Lotverbindungen und andere Verbindungen (Bonddrähte) nicht mehr als notwendig erhitzt werden dürfen.Adequate tightness and temperature resistance are essential for the purposes of the invention; this also applies to the glass to be used. Of course, quartz glass, SiO 2 , or a glass ceramic or a silicon ceramic can also be used, such as Si 3 N 4 or SiC. Mixed substrates can be used, as can pre-fabricated one-sided metallized ceramic or glass substrates. As the metal for the cover 2 , metals which can be easily connected to the ceramic are preferred, in particular an alloy such as is obtainable under the trade name "Kovar". These or similar alloys are preferred because they have a thermal expansion coefficient matched to the ceramic. A solder layer is used to connect the lid to the substrate, in particular from a tin base solder, preferably with a melting point of below 200 ° C. The solder can be connected to the substrate 1 in the edge region 7 either directly or via one or more intermediate layers. These one or more connecting layers 7 are preferably applied together in one operation with the thick-layer circuit using screen printing on the upper side of the substrate, cf. Fig. 1 and Fig. 2. Of course, other materials such as are known for the connection between metal and metal-ceramic layers and for the connection between metal and metal-glass layers can also be used. This is because it is chosen to melt around 150 ° C higher, in particular a solder based on lead. There are other solders with melting points above 250 ° C, especially 300 ° C to 400 ° C, which are suitable. When choosing the connection material, you should note that when hermetically sealing the housing with the help of the cover 2, previous contacts, solder connections and other connections (bonding wires) must not be heated more than necessary.
Bei der Herstellung wird zunächst auf dem Substrat 1, das als Gehäuse boden dient, die Dickschichtschaltung im Siebdruckverfahren mittels be kannter Dickschichtmaterialien aufgebracht, insbesondere unter Verwen dung edelmetallhaltiger Siebdruckpasten. Diese werden dann in einem ge eigneten Ofen eingebrannt, Eine Einzelheit, wie die Durchtrittsmateria lien oder das Lot in die Bohrungen 4 eingebracht werden, um im Quer schnitt runde, quadratische oder rechteckige Pins 3 einzulöten, ist in Fig. 4 ersichtlich, dabei wird deutlich, daß die Durchmetallisierung von beiden Seiten des Substrats erfolgt. Auch diese Lotverbindung ist absolut dicht. Dann erfolgt mittels des SMD-Montageroboters (Surface Mounter Device) die Bestückung mit den Halbleiterbauelementen auf dem Dickschichtmuster 11. Deren Verbindungen können mittels Bonddrähten 10 vom Bauteil 8 zum Dickschichtmuster 11 erfolgen. In Verlängerung des Dickschichtmusters sind nach Fig. 5 Lötaugen auf der Innenraumseite des Substrats 1 entstanden.In the manufacture, the thick-layer circuit is first applied to the substrate 1 , which serves as the housing base, in the screen printing process by means of known thick-layer materials, in particular using screen printing pastes containing noble metals. These are then baked in a suitable oven. A detail of how the passage materials or the solder are introduced into the holes 4 in order to solder round, square or rectangular pins 3 in cross section can be seen in FIG. 4, it becomes clear that the through-metallization takes place from both sides of the substrate. This solder connection is also absolutely tight. Then the SMD assembly robot (surface mounter device) is used to populate the semiconductor components on the thick-film pattern 11 . Their connections can be made from the component 8 to the thick-film pattern 11 by means of bonding wires 10 . As an extension of the thick-film pattern, soldering eyes are formed on the inner side of the substrate 1 according to FIG .
Vorteile der Erfindung:Advantages of the invention:
Die mit der Erfindung erzielten Vorteile bestehen insbesondere darin, daßThe advantages achieved by the invention are in particular that
- - der Aufbau der Gehäuse vereinfacht ist,- the structure of the housing is simplified,
- - hohe Herstellungskosten für die Gehäuse gesenkt werden- High manufacturing costs for the housing can be reduced
- - und hohe Werkzeugkosten für Sonderabmaße entfallen.- and high tool costs for special dimensions are eliminated.
- - Das kostspielige Einglasen der Durchführungsstifte entfällt,- The costly glassing in of the lead-through pins is eliminated,
- - thermische Übergangswiderstände, wie sie beim Einkleben durch die Kleberschicht entstehen, fallen weg.- Thermal contact resistance, such as when gluing through the Adhesive layer arise, do not exist.
Die Zuverlässigkeit wird erhöht durch Wegfall der Kleberausgasung.Reliability is increased by eliminating the outgassing of adhesive.
- - Die Wire-Bond-Verbindungen 10 vom Substrat 1 zu den Durchführungs stiften 3 entfallen, bzw. werden durch die viel zuverlässigeren siebgedruckten Leiterbahnverbindungen 11 ersetzt.- The wire bond connections 10 from the substrate 1 to the bushing pins 3 are omitted, or are replaced by the much more reliable screen printed interconnect connections 11 .
- - Die Anschlußstifte können gegebenenfalls unmittelbar dort angebracht werden, wo sie gebraucht werden, d.h. optimal kurze elektrische Wege können von dem Bauteil heraus auf eine nicht dargestellte Träger platine für das Gehäuse erreicht werden,- The pins can be attached directly there if necessary where they are needed, i.e. optimally short electrical paths can from the component on a carrier, not shown circuit board for the housing can be reached
- - bei gleicher Grundfläche des Substrats steht mehr Platz für Leiter bahnen und Bauteile zur Verfügung,- With the same base area of the substrate, there is more space for conductors tracks and components available,
- - und insgesamt wird eine beträchtliche Gewichtseinsparung erreicht, da der Metallgehäuseboden entfällt.- and overall a considerable weight saving is achieved, since the metal case bottom is omitted.
Claims (8)
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE3811313A DE3811313A1 (en) | 1988-04-02 | 1988-04-02 | Housing for hybrid circuits |
FR8900216A FR2629664B1 (en) | 1988-04-02 | 1989-01-10 | HOUSING FOR HYBRID CIRCUITS |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE3811313A DE3811313A1 (en) | 1988-04-02 | 1988-04-02 | Housing for hybrid circuits |
Publications (2)
Publication Number | Publication Date |
---|---|
DE3811313A1 true DE3811313A1 (en) | 1989-10-19 |
DE3811313C2 DE3811313C2 (en) | 1992-12-10 |
Family
ID=6351355
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE3811313A Granted DE3811313A1 (en) | 1988-04-02 | 1988-04-02 | Housing for hybrid circuits |
Country Status (2)
Country | Link |
---|---|
DE (1) | DE3811313A1 (en) |
FR (1) | FR2629664B1 (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE3941680A1 (en) * | 1989-12-18 | 1991-06-20 | Telefunken Electronic Gmbh | PLASTIC HOUSING FOR ELECTRONIC COMPONENTS |
DE4436903A1 (en) * | 1994-10-15 | 1996-04-18 | Daimler Benz Ag | Electromagnetic screening and sealing circuit packages |
DE4345594B4 (en) * | 1993-06-14 | 2011-08-11 | EMI-tec Elektronische Materialien GmbH, 12277 | Dispensed, electrically-conductive, resilient plastic seal completing electromagnetic screening, comprises screening profile consisting of overlapping and adjacent strands |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2654891A1 (en) * | 1989-11-20 | 1991-05-24 | Alcatel Radiotelephone | SHIELD FOR RADIO FREQUENCY CIRCUIT. |
US5177595A (en) * | 1990-10-29 | 1993-01-05 | Hewlett-Packard Company | Microchip with electrical element in sealed cavity |
FI109960B (en) * | 1991-09-19 | 2002-10-31 | Nokia Corp | Electronic device |
DE19516548A1 (en) * | 1995-05-05 | 1996-11-14 | Blaupunkt Werke Gmbh | Cover cap for electronic component |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE3527818A1 (en) * | 1985-08-02 | 1987-02-26 | Rose Elektrotech Gmbh | HOUSING FOR A HYBRID CIRCUIT |
DE3604882A1 (en) * | 1986-02-15 | 1987-08-20 | Bbc Brown Boveri & Cie | PERFORMANCE SEMICONDUCTOR MODULE AND METHOD FOR PRODUCING THE MODULE |
Family Cites Families (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB1361176A (en) * | 1971-07-05 | 1974-07-24 | Smiths Industries Ltd | Electrical devices |
CH660258A5 (en) * | 1983-01-20 | 1987-03-31 | Landis & Gyr Ag | CERAMIC HOUSING FOR A HYBRID CIRCUIT. |
-
1988
- 1988-04-02 DE DE3811313A patent/DE3811313A1/en active Granted
-
1989
- 1989-01-10 FR FR8900216A patent/FR2629664B1/en not_active Expired - Fee Related
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE3527818A1 (en) * | 1985-08-02 | 1987-02-26 | Rose Elektrotech Gmbh | HOUSING FOR A HYBRID CIRCUIT |
DE3604882A1 (en) * | 1986-02-15 | 1987-08-20 | Bbc Brown Boveri & Cie | PERFORMANCE SEMICONDUCTOR MODULE AND METHOD FOR PRODUCING THE MODULE |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE3941680A1 (en) * | 1989-12-18 | 1991-06-20 | Telefunken Electronic Gmbh | PLASTIC HOUSING FOR ELECTRONIC COMPONENTS |
DE4345594B4 (en) * | 1993-06-14 | 2011-08-11 | EMI-tec Elektronische Materialien GmbH, 12277 | Dispensed, electrically-conductive, resilient plastic seal completing electromagnetic screening, comprises screening profile consisting of overlapping and adjacent strands |
DE4436903A1 (en) * | 1994-10-15 | 1996-04-18 | Daimler Benz Ag | Electromagnetic screening and sealing circuit packages |
DE4436903C2 (en) * | 1994-10-15 | 2003-10-30 | Daimler Chrysler Ag | Arrangement for electromagnetic shielding of electronic circuits and method for producing such an arrangement |
Also Published As
Publication number | Publication date |
---|---|
DE3811313C2 (en) | 1992-12-10 |
FR2629664A1 (en) | 1989-10-06 |
FR2629664B1 (en) | 1993-12-03 |
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Owner name: DEUTSCHE AEROSPACE AG, 8000 MUENCHEN, DE |
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Owner name: TEMIC TELEFUNKEN MICROELECTRONIC GMBH, 74072 HEILB |
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