DE3776082D1 - Vollstaendig digitaler phasenregelkreis. - Google Patents

Vollstaendig digitaler phasenregelkreis.

Info

Publication number: DE3776082D1
Authority: DE; Germany
Prior art keywords: control circuit; phase control; digital phase; completely digital; completely
Prior art date: 1986-10-31
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.): Expired - Fee Related

Application number

DE8787202058T

Other languages

English (en)

Inventor

Jacques Societe Civile Masson

Jean-Louis Societe Civ Jeandot

Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)

Thomson TRT Defense

Original Assignee

Thomson TRT Defense

Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)

1986-10-31

Filing date

1987-10-27

Publication date

1992-02-27

1987-10-27 Application filed by Thomson TRT Defense filed Critical Thomson TRT Defense

1992-02-27 Application granted granted Critical

1992-02-27 Publication of DE3776082D1 publication Critical patent/DE3776082D1/de

2007-10-28 Anticipated expiration legal-status Critical

Status Expired - Fee Related legal-status Critical Current

Classifications

- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/099—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop
- H03L7/0991—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop the oscillator being a digital oscillator, e.g. composed of a fixed oscillator followed by a variable frequency divider

DE8787202058T 1986-10-31 1987-10-27 Vollstaendig digitaler phasenregelkreis. Expired - Fee Related DE3776082D1 (de)

Applications Claiming Priority (1)

Application Number	Priority Date	Filing Date	Title
FR8615210A FR2606238B1 (fr)	1986-10-31	1986-10-31	Boucle a verrouillage de phase entierement numerique

Publications (1)

Publication Number	Publication Date
DE3776082D1 true DE3776082D1 (de)	1992-02-27

Family

ID=9340416

Family Applications (1)

Application Number	Title	Priority Date	Filing Date
DE8787202058T Expired - Fee Related DE3776082D1 (de)	1986-10-31	1987-10-27	Vollstaendig digitaler phasenregelkreis.

Country Status (5)

Country	Link
US (1)	US4969191A (de)
EP (1)	EP0266832B1 (de)
JP (1)	JPS63164531A (de)
DE (1)	DE3776082D1 (de)
FR (1)	FR2606238B1 (de)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
JP3113667B2 (ja) *	1990-05-30	2000-12-04	日本テキサス・インスツルメンツ株式会社	トランスバーサルフィルタ回路
JP3241079B2 (ja) *	1992-02-24	2001-12-25	株式会社日立製作所	ディジタル位相同期回路
RU2599347C1 (ru) *	2015-03-27	2016-10-10	Федеральное государственное казенное военное образовательное учреждение высшего профессионального образования "Военный учебно-научный центр Военно-воздушных сил "Военно-воздушная академия имени профессора Н.Е. Жуковского и Ю.А. Гагарина" (г. Воронеж) Министерства обороны Российской Федерации	Способ усиления и демодуляции частотно-модулированных сигналов и устройство его реализации

Family Cites Families (17)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
US4004237A (en) *	1970-05-01	1977-01-18	Harris Corporation	System for communication and navigation
US3777272A (en) *	1972-09-18	1973-12-04	Nasa	Digital second-order phase-locked loop
US4028626A (en) *	1973-01-18	1977-06-07	Hycom Incorporated	Digital data receiver with automatic timing recovery and control
US3971996A (en) *	1973-01-18	1976-07-27	Hycom Incorporated	Phase tracking network
NL171215C (nl) *	1973-03-09	1983-02-16	Trt Telecom Radio Electr	Automatische egalisatie-inrichting voor een datatransmissiekanaal.
JPS5152264A (de) *	1974-09-11	1976-05-08	Sharp Kk
US3962637A (en) *	1974-11-11	1976-06-08	Hycom Incorporated	Ultrafast adaptive digital modem
US3978407A (en) *	1975-07-23	1976-08-31	Codex Corporation	Fast start-up adaptive equalizer communication system using two data transmission rates
US4004226A (en) *	1975-07-23	1977-01-18	Codex Corporation	QAM receiver having automatic adaptive equalizer
FR2445078A1 (fr) *	1978-12-20	1980-07-18	Ibm France	Procede et dispositif pour detecter une sequence pseudo-aleatoire de deux symboles dans un recepteur de donnees utilisant une modulation a double bande laterale-porteuses en quadrature
FR2445079A1 (fr) *	1978-12-20	1980-07-18	Ibm France	Procede et dispositif pour detecter une sequence pseudo-aleatoire de changements de phase de 0o et 180o de la porteuse dans un recepteur de donnees
US4237554A (en) *	1979-03-01	1980-12-02	Bell Telephone Laboratories, Incorporated	Coefficient tap leakage for fractionally-spaced equalizers
DE3007907A1 (de) *	1980-03-01	1981-09-17	Licentia Patent-Verwaltungs-Gmbh, 6000 Frankfurt	Digitaler empfaenger
US4457003A (en) *	1982-06-21	1984-06-26	Motorola Inc.	Time reference tracking loop for frequency hopping systems
US4594555A (en) *	1984-10-29	1986-06-10	Hewlett-Packard Company	Frequency selective sampling detector
US4680621A (en) *	1985-09-16	1987-07-14	Tektronix, Inc.	Method and apparatus for variable phasing of periodic signals
JPS63252014A (ja) *	1987-04-08	1988-10-19	Kokusai Denshin Denwa Co Ltd <Kdd>	位相同期方式

1986
- 1986-10-31 FR FR8615210A patent/FR2606238B1/fr not_active Expired
1987
- 1987-10-27 DE DE8787202058T patent/DE3776082D1/de not_active Expired - Fee Related
- 1987-10-27 EP EP87202058A patent/EP0266832B1/de not_active Expired - Lifetime
- 1987-10-29 JP JP62271954A patent/JPS63164531A/ja active Pending
- 1987-10-30 US US07/115,475 patent/US4969191A/en not_active Expired - Fee Related

Also Published As

Publication number	Publication date
FR2606238A1 (fr)	1988-05-06
JPS63164531A (ja)	1988-07-07
EP0266832A1 (de)	1988-05-11
EP0266832B1 (de)	1992-01-15
US4969191A (en)	1990-11-06
FR2606238B1 (fr)	1988-12-09

Publication	Publication Date	Title
DE3584985D1 (de)	1992-02-06	Phasensynchronisierungsschaltung.
DE3787217D1 (de)	1993-10-07	Entscheidungszeitsteuerschaltung.
DE3751376D1 (de)	1995-08-03	Schaltungselement.
FI883234A0 (fi)	1988-07-06	Digitaaliohjattu vaihelukittu piirijärjestelmä
DE3779820D1 (de)	1992-07-23	Digitale phasenregelschleifen.
DE3850793D1 (de)	1994-09-01	Phasenkomparatorschaltung.
NL191164C (nl)	1995-02-16	Aanstuurschakeling.
NL194811B (nl)	2002-11-01	Servoschakeling.
NL192361B (nl)	1997-02-03	Fasevergelijkingsschakeling.
DE3774149D1 (de)	1991-12-05	Digitaler phasenschieber.
DE3889019D1 (de)	1994-05-19	Ansteuerschaltung.
DE3788804D1 (de)	1994-02-24	Dateneingangsschaltung mit digitalem phasenregelkreis.
DE3787824D1 (de)	1993-11-25	Phasenschiebersteuerung.
DE59007916D1 (de)	1995-01-19	Phasenvergleichsschaltung.
FI883789L (fi)	1990-02-17	Antennomkopplaranordning i en digital resetelefon.
NL192167B (nl)	1996-10-01	Digitale fasevergelijkingsschakeling.
DE3750712D1 (de)	1994-12-08	Leistungstrennschalter.
DE3785082D1 (de)	1993-05-06	Variable phasenverschiebungsschaltung.
DE3485122D1 (de)	1991-10-31	Steuerschaltung.
DE3787576D1 (de)	1993-11-04	Digitaler spitzenwerthalteschaltung.
DE3578628D1 (de)	1990-08-16	Digitale phasenregelkreisschaltung.
DE3751085D1 (de)	1995-03-30	Volladdiererschaltung.
FI874813L (fi)	1988-05-04	Digital tvao-av-tre-utvals- och utmatningskoppling.
DE68921792D1 (de)	1995-04-27	Digitale Phasenregelschaltung.
DE3776082D1 (de)	1992-02-27	Vollstaendig digitaler phasenregelkreis.

Legal Events

Date	Code	Title	Description
1993-02-18	8364	No opposition during term of opposition
1993-10-07	8339	Ceased/non-payment of the annual fee