DE3744473A1 - Modulo-10 counter which supplies the counter state in 54321 code - Google Patents

Abstract

The modulo-10 counter according to the subject of the invention differs from the modulo-10 counter according to P 3743496.9 in that the decades have no AND circuit (21) for flipflop (11). Thus the decades of this pulse counter have no AND circuit (21), the pre-triggering of which is not good enough. <IMAGE>

Description

The invention is an improvement in the electronic African pulse counter according to the main patent application in such a way that no delay circuit is required in the area of the flip-flop 11 or no additional circuit is required, which in addition has a small delay of the delay Change from H potential to L potential. In

Fig. 1 is a decade of the pulse counter type A 1 Darge provides. In

Fig. 2 shows a decade of the pulse counter type A 2. In

Fig. 3 is a decade of the pulse counter type B1 shown. In

Fig. 4 is a decade of the type B 2 pulse counter shown.

A decade of the pulse counter type A 1 ( FIG. 1) consists of 4 counting subcircuits 1 to 4 and the five circuit 6 and the pulse reversing circuit 7 and the blocking circuit 9 . The counting subcircuits 2 to 4 are the same and each consist of a simple flip-flop 10 and an AND circuit 21 and a negation circuit 22 and an AND circuit 23 . The five-circuit 6 has as its main part a double flip-flop 20 , which consists of the flip-flops 15 and 16 and the AND circuits 33 and 34 . In further parts, this five-circuit 6 consists of the AND circuits 31 and 32 and the OR circuit 35 . The pulse reversing circuit 7 consists of the flip-flop 17 and 4 AND circuits 36 to 39 , each with 2 inputs and the OR circuit 40 and the negating circuits 41 and 42 . The blocking circuit 9 consists of the negation circuit 45 and the AND circuit 46 . In other parts, this decade consists of the AND circuit 47 and the delay circuit 48 and the OR circuits 49 and 50 and the associated lines.

The first decade has no carry input x and therefore only the decade input N and the carry output y , unless all decades are uniform. The other De kaden have a carry input x and a carry output y and a direct decade input N. The meter reading outputs have the designations A to E and supply the decade meter reading in the 54321 code. The output A has the value 1. The output B has the value 2. The output C has the value 3. The output D has the value 4. The output E has the value 5.

The operation of this type A 1 pulse counter ( Fig. 1) is as follows: All decades are reset by applying H potential to line r . After this total reset, all counting flip-flops 11 to 14 and flip-flops 15 and 16 are in their right position. The flip-flop 17 is also in its right position because the OR circuit 40 is controlled by the outputs for the even numbers (0 and 2 and 4). In this switching position, only the AND circuit 37 is controlled in advance. Thus, the flip-flop 11 tilts to its left position during the first counting pulse, which means that the output A has H potential. The flip-flop 12 is thus pre-activated and the AND circuit 36 is pre-activated. Thus, the flip-flop 12 tilts to its left position during the second counting pulse, so that the output B has H potential. The flip-flop 13 is thus driven before and the AND circuit 37 is driven before. Thus, the flip-flop 13 flips to its left position on the third counting pulse, which means that the output has C potential. The flip-flop 14 is thus pre-activated and the AND circuit 36 is pre-activated. Thus, the flip-flop 14 tilts to its left position on the fourth counting pulse, so that the output has D potential. The AND circuits 37 and 47 are thus pre-activated. Thus, in the fifth counting pulse, all counting flip-flops 11 to 14 flip into their right position and flip-flop 15 into its left position, because it is pre-driven on the left-hand side by the right-hand output of flip-flop 16 is. During this fifth counting pulse, the negation circuit 45 has L potential at its output, which means that during the fifth counting pulse the AND circuit 46 is not precontrolled and thus an additional incorrect control of the flip-flops 11 and 13 is avoided. After this fifth counting pulse, only the output E has H potential, which has the value 5 and the AND circuit 37 is pre-activated. Thus, the flip-flop 11 flips again into its left position on the sixth counting pulse, with the outputs A and E having H potential. The flip-flop 12 is thus pre-activated again and the AND circuit 36 is pre-activated. Thus, at the seventh counting pulse, the flip-flop 12 flips back into its left position, which means that the outputs B and E have potential. The flip-flop 13 is thus pre-activated again and the AND circuit 37 is pre-activated. Thus, on the eighth count pulse, the flip-flop 13 flips back to its left position, with the outputs C and E having H potential. The flip-flop 14 is thus again pre-activated and the AND circuit 36 is pre-activated. Thus, the flip-flop 14 flips again into its left position at the ninth counting pulse, which means that the outputs D and E have H potential. So that the AND circuits 37 and 47 are pre-driven. Thus, at the tenth counting pulse, all counting flip-flops 11 to 14 tilt back into their right position and also the flip-flop 15 into its right position because it is on the right-hand side from the left-side output of the flip-flop 16 is pre-activated. With this tenth count pulse, the carry output y also has H potential, which means that with this tenth count pulse, a count pulse is also controlled in the next higher decade. The current decade therefore has a counter reading of 0 and the next decade has a counter reading of 1.

In the first to fourth counting pulse and in the sixth to ninth counting pulse, the negation circuit 45 has H potential at its output, which means that the AND circuit 46 is pre-activated for these counting pulses.

The pulse counter type B 1, of which a decade is shown in FIG. 3, has the difference in comparison with the pulse counter type A 1 ( FIG. 1) that the decades also have a direct input for counting pulses have a value of 5. With this type B 1 pulse counter, counting pulses with values of 1 and 5 can be processed. The input for counting impulses with the value 1 has the designation N. The input for counting pulses with the value 5 has the designation M.

A decade of the pulse counter Type B 1 ( FIG. 3) consists of 4 counting subcircuits 1 to 4 and the five circuit 6 and the pulse reversing circuit 7 and the blocking circuit 9 . The counting subcircuits 2 to 4 are also the same and each consist of a simple flip-flop 10 and an AND circuit 21 and a negation circuit 22 and an AND circuit 23 . The main circuit of the five-circuit 6 also has a double flip-flop 20 , which consists of the flip-flops 15 and 16 and the AND circuits 33 and 34 . On other parts, this five -circuit also consists of the AND circuits 31 and 32 and the OR circuit 35 . The pulse changeover circuit 7 also consists of the flip-flop 17 and 4 AND circuits 36 to 39 with 2 inputs each and the OR circuit 40 with 3 inputs and the negation circuits 41 and 42 . The blocking circuit 9 also consists of the negation circuit 45 and the AND circuit 46 . In other parts, there are decades of this pulse counter Tpye B 1 from the delay circuit 48 and the AND circuit 47 and the OR circuits 49 to 52 , each with 2 inputs and the negation circuit 53 and the associated lines.

The first decade has no carry input x and thus only the decade input N for count pulses with the significance 1 and the decade input M for count pulses with the significance 5 and the carry output y , if not all Decades are uniformly the same. The other decades have a carry input x and a carry output y and a decade input N for counting pulses with a value of 1 and a decade input M for counting pulses with a value of 5. The meter reading outputs also have the designations A to E and also supply the decade counter reading in the 54 321 code. Output A also has a value of 1. Output B also has a value of 2. Output C also has a value of 3. Output D also has a value of 4. Output E also has a value of 5.

In the case of pulse counters Type A 2 and B 2, instead of a normal delay circuit 48, a controlled delay circuit 54 according to P 37 36 347.6 or P 37 36 432.4 is used, which has a control input s which of the line t is driven. The count pulse at the output of the AND circuit 47 is thus as long as the count pulse at the output of the AND circuit 37 .

With these delay circuits 48 and 54 , the change from H potential to L potential is thus postponed.

In the special versions, the counting flip-flops 11 to 14 of each decade are connected to the power supply in accordance with P 37 39 818.0 or P 37 40 452.0 and are therefore blocked by briefly blocking a power supply line or a power supply. Drain pipe reset.

In Fig. 5, a decade of the pulse counter type A 3 is Darge, in which two delay circuits 48 and 56 are arranged per decade.

In Fig. 6, a different detail is shown, by means of which the decades of these pulse counters are designed in such a way that they deliver the decade counter readings in the 51 111 code. If, therefore, the decades shown in FIGS. 1 to 4 are formed in the corresponding area according to FIG. 6, the decade counts in the 51 111 code fall.

The Type B 1 S and Type B 2 S pulse counters use two different decades because with these pulse counters only the first decade has an input for counting pulses with a value of 5. The pulse counter type B 1 S thus consists of a first decade according to FIG. 3 and further decades according to FIG. 1. The pulse counter type B 2 S thus consists of a first decade according to FIG. 4 and further decades according to FIG. 2nd

Claims (1)

Electronic decimal counter according to P 37 43 496.9, characterized in that the flip-flops ( 11 ) are not assigned a pre-control AND circuit ( 21 ).