DE3586231D1 - Verfahren zur formierung einer passivierungsschicht mit einer selektiven konfiguration auf einem substrat und verfahren zur herstellung von flachgemachten dielektrischen komponenten fuer halbleiterstrukturen. - Google Patents
Verfahren zur formierung einer passivierungsschicht mit einer selektiven konfiguration auf einem substrat und verfahren zur herstellung von flachgemachten dielektrischen komponenten fuer halbleiterstrukturen.Info
- Publication number
- DE3586231D1 DE3586231D1 DE8585112098T DE3586231T DE3586231D1 DE 3586231 D1 DE3586231 D1 DE 3586231D1 DE 8585112098 T DE8585112098 T DE 8585112098T DE 3586231 T DE3586231 T DE 3586231T DE 3586231 D1 DE3586231 D1 DE 3586231D1
- Authority
- DE
- Germany
- Prior art keywords
- shaping
- substrate
- passivation layer
- semiconductor structures
- dielectric components
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 238000004519 manufacturing process Methods 0.000 title 1
- 238000000034 method Methods 0.000 title 1
- 238000002161 passivation Methods 0.000 title 1
- 239000004065 semiconductor Substances 0.000 title 1
- 238000007493 shaping process Methods 0.000 title 1
- 239000000758 substrate Substances 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02118—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer carbon based polymeric organic or inorganic material, e.g. polyimides, poly cyclobutene or PVC
-
- C—CHEMISTRY; METALLURGY
- C08—ORGANIC MACROMOLECULAR COMPOUNDS; THEIR PREPARATION OR CHEMICAL WORKING-UP; COMPOSITIONS BASED THEREON
- C08G—MACROMOLECULAR COMPOUNDS OBTAINED OTHERWISE THAN BY REACTIONS ONLY INVOLVING UNSATURATED CARBON-TO-CARBON BONDS
- C08G73/00—Macromolecular compounds obtained by reactions forming a linkage containing nitrogen with or without oxygen or carbon in the main chain of the macromolecule, not provided for in groups C08G12/00 - C08G71/00
- C08G73/06—Polycondensates having nitrogen-containing heterocyclic rings in the main chain of the macromolecule
- C08G73/10—Polyimides; Polyester-imides; Polyamide-imides; Polyamide acids or similar polyimide precursors
- C08G73/1067—Wholly aromatic polyimides, i.e. having both tetracarboxylic and diamino moieties aromatically bound
- C08G73/1071—Wholly aromatic polyimides containing oxygen in the form of ether bonds in the main chain
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
- H01L21/02282—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process liquid deposition, e.g. spin-coating, sol-gel techniques, spray coating
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
- H01L21/02318—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment
- H01L21/02345—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment treatment by exposure to radiation, e.g. visible light
- H01L21/02351—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment treatment by exposure to radiation, e.g. visible light treatment by exposure to corpuscular radiation, e.g. exposure to electrons, alpha-particles, protons or ions
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/312—Organic layers, e.g. photoresist
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/76224—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T428/00—Stock material or miscellaneous articles
- Y10T428/24—Structurally defined web or sheet [e.g., overall dimension, etc.]
- Y10T428/24479—Structurally defined web or sheet [e.g., overall dimension, etc.] including variation in thickness
- Y10T428/2457—Parallel ribs and/or grooves
Landscapes
- Engineering & Computer Science (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Chemical & Material Sciences (AREA)
- Health & Medical Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Medicinal Chemistry (AREA)
- Polymers & Plastics (AREA)
- Organic Chemistry (AREA)
- Formation Of Insulating Films (AREA)
- Local Oxidation Of Silicon (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US06/663,017 US4568601A (en) | 1984-10-19 | 1984-10-19 | Use of radiation sensitive polymerizable oligomers to produce polyimide negative resists and planarized dielectric components for semiconductor structures |
Publications (1)
Publication Number | Publication Date |
---|---|
DE3586231D1 true DE3586231D1 (de) | 1992-07-23 |
Family
ID=24660172
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE8585112098T Expired - Lifetime DE3586231D1 (de) | 1984-10-19 | 1985-09-24 | Verfahren zur formierung einer passivierungsschicht mit einer selektiven konfiguration auf einem substrat und verfahren zur herstellung von flachgemachten dielektrischen komponenten fuer halbleiterstrukturen. |
Country Status (4)
Country | Link |
---|---|
US (1) | US4568601A (de) |
EP (1) | EP0178500B1 (de) |
JP (1) | JPS6197930A (de) |
DE (1) | DE3586231D1 (de) |
Families Citing this family (20)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS61102742A (ja) * | 1984-10-25 | 1986-05-21 | インタ−ナショナル ビジネス マシ−ンズ コ−ポレ−ション | 誘導体分離用の溝の充填方法 |
US4665010A (en) * | 1985-04-29 | 1987-05-12 | International Business Machines Corporation | Method of fabricating photopolymer isolation trenches in the surface of a semiconductor wafer |
US4612210A (en) * | 1985-07-25 | 1986-09-16 | International Business Machines Corporation | Process for planarizing a substrate |
US4665007A (en) * | 1985-08-19 | 1987-05-12 | International Business Machines Corporation | Planarization process for organic filling of deep trenches |
JPH069222B2 (ja) * | 1986-01-07 | 1994-02-02 | 日立化成工業株式会社 | 多層配線構造の製造法 |
EP0291779B1 (de) * | 1987-05-18 | 1994-07-27 | Siemens Aktiengesellschaft | Wärmebeständige Positivresists und Verfahren zur Herstellung wärmebeständiger Reliefstrukturen |
JP2643262B2 (ja) * | 1988-03-23 | 1997-08-20 | 日本電気株式会社 | 半導体装置の製造方法 |
US4908096A (en) * | 1988-06-24 | 1990-03-13 | Allied-Signal Inc. | Photodefinable interlevel dielectrics |
DE3833438A1 (de) * | 1988-10-01 | 1990-04-05 | Basf Ag | Strahlungsempfindliche gemische und deren verwendung |
DE3833437A1 (de) * | 1988-10-01 | 1990-04-05 | Basf Ag | Strahlungsempfindliche gemische und deren verwendung |
EP0443352B1 (de) * | 1990-02-20 | 1995-12-06 | National Starch and Chemical Investment Holding Corporation | Diarylacetylen endgekappte Polyimide |
US5242551A (en) * | 1991-03-28 | 1993-09-07 | International Business Machines Corporation | Electron induced transformation of an isoimide to an n-imide and uses thereof |
US5326643A (en) * | 1991-10-07 | 1994-07-05 | International Business Machines Corporation | Adhesive layer in multi-level packaging and organic material as a metal diffusion barrier |
DE4300765C1 (de) * | 1993-01-14 | 1993-12-23 | Bosch Gmbh Robert | Verfahren zum Planarisieren grabenförmiger Strukturen |
KR100384746B1 (ko) * | 1994-09-13 | 2003-08-25 | 제온 코포레이션 | 감광성 폴리이미드 수지 조성물 |
US6387810B2 (en) * | 1999-06-28 | 2002-05-14 | International Business Machines Corporation | Method for homogenizing device parameters through photoresist planarization |
US6482716B1 (en) * | 2000-01-11 | 2002-11-19 | Infineon Technologies North America Corp. | Uniform recess depth of recessed resist layers in trench structure |
EP1143506A3 (de) * | 2000-04-04 | 2004-02-25 | Nippon Telegraph and Telephone Corporation | Verfahren zur Herstellung eines Musters |
US6905811B2 (en) * | 2003-04-22 | 2005-06-14 | Headway Technologies, Inc. | Method to form reduced dimension pattern with good edge roughness |
CN106057779B (zh) * | 2016-07-29 | 2018-09-21 | 深圳市威兆半导体有限公司 | 一种半导体器件结构 |
Family Cites Families (17)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3575740A (en) * | 1967-06-08 | 1971-04-20 | Ibm | Method of fabricating planar dielectric isolated integrated circuits |
GB1230421A (de) * | 1967-09-15 | 1971-05-05 | ||
US3515585A (en) * | 1968-04-24 | 1970-06-02 | Ibm | Gelation coating method for electronic circuit panels |
US3796613A (en) * | 1971-06-18 | 1974-03-12 | Ibm | Method of forming dielectric isolation for high density pedestal semiconductor devices |
JPS5144871B2 (de) * | 1971-09-25 | 1976-12-01 | ||
US3961355A (en) * | 1972-06-30 | 1976-06-01 | International Business Machines Corporation | Semiconductor device having electrically insulating barriers for surface leakage sensitive devices and method of forming |
US3985597A (en) * | 1975-05-01 | 1976-10-12 | International Business Machines Corporation | Process for forming passivated metal interconnection system with a planar surface |
US4164458A (en) * | 1977-03-07 | 1979-08-14 | Allied Chemical Corporation | Production of radiation crosslinked polymeric compositions using diacetylenes |
US4160991A (en) * | 1977-10-25 | 1979-07-10 | International Business Machines Corporation | High performance bipolar device and method for making same |
EP0019391B1 (de) * | 1979-05-12 | 1982-10-06 | Fujitsu Limited | Verfahren zur Herstellung einer elektronischen Vorrichtung mit Vielschicht-Verdrahtungsstruktur |
US4367119A (en) * | 1980-08-18 | 1983-01-04 | International Business Machines Corporation | Planar multi-level metal process with built-in etch stop |
US4329419A (en) * | 1980-09-03 | 1982-05-11 | E. I. Du Pont De Nemours And Company | Polymeric heat resistant photopolymerizable composition for semiconductors and capacitors |
US4333794A (en) * | 1981-04-07 | 1982-06-08 | International Business Machines Corporation | Omission of thick Si3 N4 layers in ISA schemes |
DE3242113A1 (de) * | 1982-11-13 | 1984-05-24 | Ibm Deutschland Gmbh, 7000 Stuttgart | Verfahren zur herstellung einer duennen dielektrischen isolation in einem siliciumhalbleiterkoerper |
JPS59177936A (ja) * | 1983-03-28 | 1984-10-08 | Fujitsu Ltd | パタ−ン形成方法 |
JPS60120723A (ja) * | 1983-11-30 | 1985-06-28 | インタ−ナショナル ビジネス マシ−ンズ コ−ポレ−ション | 電子装置 |
JPS60119730A (ja) * | 1983-11-30 | 1985-06-27 | インタ−ナショナル ビジネス マシ−ンズ コ−ポレ−ション | ポリイミド誘導体薄膜の形成方法 |
-
1984
- 1984-10-19 US US06/663,017 patent/US4568601A/en not_active Expired - Fee Related
-
1985
- 1985-07-18 JP JP60157150A patent/JPS6197930A/ja active Granted
- 1985-09-24 EP EP85112098A patent/EP0178500B1/de not_active Expired - Lifetime
- 1985-09-24 DE DE8585112098T patent/DE3586231D1/de not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
EP0178500A3 (en) | 1989-06-14 |
JPS6197930A (ja) | 1986-05-16 |
EP0178500A2 (de) | 1986-04-23 |
EP0178500B1 (de) | 1992-06-17 |
JPH031826B2 (de) | 1991-01-11 |
US4568601A (en) | 1986-02-04 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8332 | No legal effect for de |