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DE3406542A1 - Process for fabricating a semiconductor component - Google Patents

Process for fabricating a semiconductor component

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Publication number
DE3406542A1
DE3406542A1 DE19843406542 DE3406542A DE3406542A1 DE 3406542 A1 DE3406542 A1 DE 3406542A1 DE 19843406542 DE19843406542 DE 19843406542 DE 3406542 A DE3406542 A DE 3406542A DE 3406542 A1 DE3406542 A1 DE 3406542A1
Authority
DE
Germany
Prior art keywords
semiconductor
layer
semiconductor body
tinned
copper
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
DE19843406542
Other languages
German (de)
Inventor
Herbert Ing.(grad.) 7141 Oberstenfeld Helber
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Telefunken Electronic GmbH
Original Assignee
Telefunken Electronic GmbH
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Telefunken Electronic GmbH filed Critical Telefunken Electronic GmbH
Priority to DE19843406542 priority Critical patent/DE3406542A1/en
Publication of DE3406542A1 publication Critical patent/DE3406542A1/en
Withdrawn legal-status Critical Current

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    • H—ELECTRICITY
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    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
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    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/492—Bases or plates or solder therefor
    • H01L23/4924—Bases or plates or solder therefor characterised by the materials
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    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Wire Bonding (AREA)

Abstract

In a process for fabricating a semiconductor component, in which the semiconductor body is provided with a rear contact of aluminium and nickel and is soldered onto a substrate body of copper, the nickel layer is tinned and the semiconductor body with the tinned nickel layer is soldered directly onto the substrate body.

Description

Verfahren zum Herstellen eines Method of making a

Halbleiterbauelementes Die Erfindung betrifft ein Verfahren zum Herstellen eines Halbleiterbauelementes, bei dem der Halbleiterkörper mit einem Rückseitenkontakt aus Aluminium und Nickel versehen und auf einen Trägerkörper aus Kupfer nufjielötct wird. Semiconductor component The invention relates to a method for manufacturing of a semiconductor component, in which the semiconductor body has a rear-side contact made of aluminum and nickel and nufjielötct on a support body made of copper will.

Halbleiterhauelemente wie Transistoren, NF-Schaltkreise oder N-MOS-Schaltkreise werden bekanntlich auf Streifen aufgelötet, die beispielsweise aus Kupfer bestehen. Das Auflöten erfolgt mittels einer Lötfolie. Die Erfindung basiert auf der Erkenntnis, daß die Verwendung von Lötfolien zu unerwünschten Lunkerbildungen führt.Semiconductor components such as transistors, LF circuits or N-MOS circuits are known to be soldered onto strips made of copper, for example. The soldering takes place using a soldering foil. The invention is based on the knowledge that the use of soldering foils leads to undesired formation of voids.

Der Erfindung liegt die Aufgabe zugrunde, ein Verfahren zum Herstellen von Halbleiterbauelementen anzugeben, bei dem die Gefahr der Lunkerbildung nicht besteht.The invention is based on the object of a method for manufacturing of semiconductor components, in which the risk of blowholes is not consists.

Diese Aufgabe wird bei einem Verfahren der eingangs erwähnten Art nach der Erfindung dadurch gelöst, daß die Nickelschicht verzinnt und der Halbleiterkörper mit der verzinnten Nickelschicht unmittelbar auf den Kupferträger aufgelötet wird.This task is carried out in a method of the type mentioned at the beginning solved according to the invention in that the nickel layer is tinned and the semiconductor body is soldered directly to the copper carrier with the tinned nickel layer.

U ie Erfindung vermeidet nicht nur Lunkerbildungen, sondern sie spart auch den Lötfolientransport, bei dem die Lötfolien angesaugt und an den vorgesehenen Platz transportiert werden.U he invention not only avoids the formation of cavities, it also saves also the solder foil transport, in which the solder foils are sucked in and attached to the intended Space to be transported.

Beim Verfahren nach der Erfindung wird der Flalbleiterkörper des Halbleiterbauelementes mit seinem verzinnten Rückseitenkontakt direkt auf die gesäuberte Oberfläche des Kupferträgers aufgelötet. Das Löten erfolgt vorzugsweise unter Schutzgas. Das Verfahren nach der Erfindung findet vorzugsweise bei IJaibleiterbauelementen mit einem lblciterrpershstrat vom p-l,eitungstyp Anwendung, obwohl es nicht auf diese tialbleiterbauelemente beschränkt ist.In the method according to the invention, the semiconductor body of the semiconductor component is used with its tinned rear contact directly on the cleaned surface of the Soldered copper carrier. The soldering is preferably carried out under protective gas. The procedure According to the invention is preferably found in IJaibleirector components with an Iblciterrpershstrat of the p-line type application, although it is not limited to these semiconductor devices is.

Die Erfindung wird im folgenden an einem Ausführungsbeispiel erläutert.The invention is explained below using an exemplary embodiment.

Die Figur 1 zeigt den Halbleiterkörper 1 eines Halbleiterbauelementes, der auf seiner Unterseite mit einem Rückseitenkontakt versehen ist. Der Rückseitenkontakt besteht nach der Figur 1 aus einer Aluminiumschicht 2 und einer Nickelschicht 3, wobei die A1uminiumschicht 2 auf den Halbleiterkörper 1 und die Nickelschicht 3 auf die Aluminiumschicht 2 aufgebracht ist. Es empfiehlt sich, gemäß der Figur 4 zwischen dem Halbleiterkörper 1 und der Aluminiumschicht 2 einen Haftvermittler 4 vorzusehen, der beispielsweise aus Titan besteht. Die Titanschicht 4 hat beispielsweise eine Dicke von 100 bis 300 Angström, die Aluminiumschicht 2 hat beispielsweise eine Dicke von 0,5 bis 2,0 zm und die- Nickelschicht 3 hat beispielsweise eine Dicke von 4 bis 10 zm.FIG. 1 shows the semiconductor body 1 of a semiconductor component, which is provided with a rear contact on its underside. The back contact consists according to the figure 1 of an aluminum layer 2 and a nickel layer 3, the aluminum layer 2 on the semiconductor body 1 and the nickel layer 3 is applied to the aluminum layer 2. It is recommended, according to FIG. 4 an adhesion promoter between the semiconductor body 1 and the aluminum layer 2 4 to be provided, which consists for example of titanium. The titanium layer 4 has, for example a thickness of 100 to 300 Angstroms, the aluminum layer 2 has, for example, a Thickness of 0.5 to 2.0 µm and the nickel layer 3 has a thickness, for example from 4 to 10 cm.

Gemäß der Figur 2 wird der aus der Altl,niniumsctricht 2 und der Nickelschicht 3 bestehende Rückseitenkontakt verzinnt und dabei mit einer Zinnschicht 5 versehen.According to the figure 2 is made of the Altl, niniumsctricht 2 and the nickel layer 3 existing back contact tinned and provided with a tin layer 5.

Unter dem tlalbleiterkörper 1 befindet sich bei der Figur 2 ein Träger 6 aus Kupfer, auf den der Halbleiterkörper 1 aufzulöten ist. Der Kupferträger 6, der in den Figuren einen massiven Eindruck macht, ist in Wirklichkeit ein dünnes Streifenstück.A carrier is located under the semiconductor body 1 in FIG 6 made of copper, onto which the semiconductor body 1 is to be soldered. The copper carrier 6, which makes a massive impression in the figures is actually a thin one Strip piece.

Bei der Anordnung der Figur 3 ist der Halbleiterkörper 1 mit seinem verzinnten Rückseitenkontakt auf den Träger 6 ohne Verwendung einer Lötfolie unmittelbar aufgelötet. Das Auflöten erfolgt in einer Schutzgasatmosphäre. Auf der Oberfläche des Halbleiterkörpers 1 befindet sich eine schützende SiO2-Schicht 7 sowie die Elektroden 8 und 9 für das Bauelement. Das Halbleiterbauelement kann, wie bereits erwähnt, ein Einzelbauelement oder auch eine integrierte Schaltungsanordnung sein.In the arrangement of Figure 3, the semiconductor body 1 is with his tinned back contact on the carrier 6 without the use of a soldering foil soldered on. The soldering takes place in a protective gas atmosphere. On the surface The semiconductor body 1 has a protective SiO2 layer 7 and the electrodes 8 and 9 for the component. As already mentioned, the semiconductor component can be a single component or an integrated circuit arrangement.

Der Rückseitenkontakt der Figur 4 unterscheidet sich, wie bereits erwähnt, vom Rückseitenkontakt der Figur 2 dadurch, daß der Rückseitenkontakt der Figur 4 zwischen dem Halbleiterkörper 1 und der Aluminiumschicht 1 eine Titanschicht 4 als Haftvermittler aufweist, die für eine bessere Haftung sorgt.The back contact of Figure 4 differs, as already mentioned, from the back contact of Figure 2 in that the back contact of the FIG. 4 shows a titanium layer between the semiconductor body 1 and the aluminum layer 1 4 as an adhesion promoter, which ensures better adhesion.

Bei der Anordnung der Figur 5 ist das Halbleiterbauelement mit seinem Träger 6 in eine Kunststoffmasse 10 eingebettet.In the arrangement of Figure 5, the semiconductor component is with his Carrier 6 embedded in a plastic compound 10.

In der Kunststoffmasse 10 befinden sich außerdem noch Teile, die beispielsweise zusammen mit dem Träger 6 aus einem Metallband (Gitterstreifen) herausgestanzt werden.In the plastic compound 10 there are also parts that, for example be punched out together with the carrier 6 from a metal strip (grid strip).

Die nicht in der Moldmasse 10 befindLichen Teile der Zuleitungen 11 und 12 werden nach dem Molden verzinnt, um an der dabei entstehenden Zinnschicht 13 besser Zuleitungen anbringen zu können. Die Zuleitungen 11 und 12 sind mit den auf der Oberfläche des Halbleiterkörpers 1 befindlichen Elektroden durch Zuleitungsdrähte 14 und 15 verbunden. Die Zuleitungsdrähte 14 und 15 werden beispielsweise durch Ultraschallschweißen angeschweißt.The parts of the supply lines 11 that are not located in the molding compound 10 and 12 are tinned after molding in order to adhere to the resulting tin layer 13 to be able to attach better leads. The leads 11 and 12 are with the located on the surface of the semiconductor body 1 electrodes by lead wires 14 and 15 connected. The lead wires 14 and 15 are for example through Ultrasonic welding welded on.

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Claims (5)

Patentansprüche » Verfahren zum Herstellen eines Halbleiterbauelementes, bei dem der Halbleiterkörper mit einem Rückseitenkontakt aus Aluminium und Nickel versehen und auf einen Trägerkörper aus Kupfer nufgelötet wird, dadurch gekennzeichnet, daß die Nickelschicht verzinnt und der H.llbleiterk(5rper mit der verzinnten Nickelschicht unmittelbar auf den Kupferträger aufgelötet wird. Claims »Method for producing a semiconductor component, in which the semiconductor body has a rear-side contact made of aluminum and nickel provided and soldered onto a support body made of copper, characterized in that that the nickel layer is tinned and the lead body with the tinned nickel layer is soldered directly to the copper carrier. 2) Verfahren nach Anspruch 1, dadurch gekennzeichnet, daß das Löten unter Schutzgas erfolgt. 2) Method according to claim 1, characterized in that the soldering takes place under protective gas. 3) Verfahren nach Anspruch 1 oder 2, dadurch gekennzeichnet, daß als Trägerkörper ein Kupferstreifen verwendet wird. 3) Method according to claim 1 or 2, characterized in that a copper strip is used as the carrier body. 4) Verfahren nach einem der Ansprüche 1 bis 3, dadurch gekennzeichnet, daß eine Titanschicht als Haftvermittler zwischen dem Halbleiterkörper und der Aluminium schicht verwendet wird. 4) Method according to one of claims 1 to 3, characterized in that that a titanium layer as an adhesion promoter between the semiconductor body and the aluminum layer is used. 5) Verfahren nach einem der Ansprüche 1 bis 4, dadurch gekennzeichnet, daß der Halbleiterkörper zusammen mit dem Trägerkörper in eine Kunststoffmasse eingebettet wird. 5) Method according to one of claims 1 to 4, characterized in that that the semiconductor body is embedded together with the carrier body in a plastic compound will.
DE19843406542 1984-02-23 1984-02-23 Process for fabricating a semiconductor component Withdrawn DE3406542A1 (en)

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Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4767049A (en) * 1986-05-19 1988-08-30 Olin Corporation Special surfaces for wire bonding
EP0384645A1 (en) * 1989-02-24 1990-08-29 General Instrument Corporation Brazing material for forming a bond between a semiconductor wafer and a metal contact
DE4003070A1 (en) * 1990-02-02 1991-08-08 Telefunken Electronic Gmbh Void-free solder joint of semiconductor die on substrate - by precoating die back surface with solder to form dome surface and attaching die by placing on substrate
EP0585084A1 (en) * 1992-08-28 1994-03-02 AT&T Corp. Permanent metallic bonding method
EP0790647A3 (en) * 1996-02-19 1999-06-02 Siemens Aktiengesellschaft Semiconductor body having a solder layer and method of soldering the semiconductor body on a metal suppporting plate
US6207298B1 (en) * 1997-12-25 2001-03-27 Japan Solderless Terminal Mfg. Co., Ltd. Connector surface-treated with a Sn-Ni alloy
EP1748480A1 (en) * 2005-07-28 2007-01-31 Infineon Technologies AG Connection structure for attaching a semiconductor chip to a metal substrate, semiconductor chip and electronic component including the connection structure and methods for producing the connection structure
US7501701B2 (en) 2004-01-13 2009-03-10 Infineon Technologies Ag Rewiring substrate strip having a plurality of semiconductor component positions

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DE1614995B1 (en) * 1966-03-10 1971-03-11 Western Electric Co Method for producing aluminum contacts on planar semiconductor devices
GB1267828A (en) * 1968-10-31 1972-03-22 Gen Electric Contact formation process
DE2032872B2 (en) * 1970-07-02 1975-03-20 Siemens Ag, 1000 Berlin Und 8000 Muenchen Process for the production of soft solderable contacts for the installation of semiconductor components in housings
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DE2550512A1 (en) * 1975-11-11 1977-05-12 Bosch Gmbh Robert METHOD OF MANUFACTURING A METALLIZATION ON A SUBSTRATE
DE2629496A1 (en) * 1976-06-30 1978-01-05 Siemens Ag Connecting component terminals to layered circuits - coats terminal with solder and contacts uncoated surface with gap electrodes
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DE1614995B1 (en) * 1966-03-10 1971-03-11 Western Electric Co Method for producing aluminum contacts on planar semiconductor devices
GB1267828A (en) * 1968-10-31 1972-03-22 Gen Electric Contact formation process
DE2032872B2 (en) * 1970-07-02 1975-03-20 Siemens Ag, 1000 Berlin Und 8000 Muenchen Process for the production of soft solderable contacts for the installation of semiconductor components in housings
US3922385A (en) * 1973-07-02 1975-11-25 Gen Motors Corp Solderable multilayer contact for silicon semiconductor
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Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4767049A (en) * 1986-05-19 1988-08-30 Olin Corporation Special surfaces for wire bonding
EP0384645A1 (en) * 1989-02-24 1990-08-29 General Instrument Corporation Brazing material for forming a bond between a semiconductor wafer and a metal contact
DE4003070A1 (en) * 1990-02-02 1991-08-08 Telefunken Electronic Gmbh Void-free solder joint of semiconductor die on substrate - by precoating die back surface with solder to form dome surface and attaching die by placing on substrate
EP0585084A1 (en) * 1992-08-28 1994-03-02 AT&T Corp. Permanent metallic bonding method
EP0790647A3 (en) * 1996-02-19 1999-06-02 Siemens Aktiengesellschaft Semiconductor body having a solder layer and method of soldering the semiconductor body on a metal suppporting plate
US6207298B1 (en) * 1997-12-25 2001-03-27 Japan Solderless Terminal Mfg. Co., Ltd. Connector surface-treated with a Sn-Ni alloy
US7501701B2 (en) 2004-01-13 2009-03-10 Infineon Technologies Ag Rewiring substrate strip having a plurality of semiconductor component positions
EP1748480A1 (en) * 2005-07-28 2007-01-31 Infineon Technologies AG Connection structure for attaching a semiconductor chip to a metal substrate, semiconductor chip and electronic component including the connection structure and methods for producing the connection structure
US8084861B2 (en) 2005-07-28 2011-12-27 Infineon Technologies Ag Connection structure semiconductor chip and electronic component including the connection structure and methods for producing the connection structure

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