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DE3265131D1 - Electrically erasable programmable read only memory - Google Patents

Electrically erasable programmable read only memory

Info

Publication number
DE3265131D1
DE3265131D1 DE8282101283T DE3265131T DE3265131D1 DE 3265131 D1 DE3265131 D1 DE 3265131D1 DE 8282101283 T DE8282101283 T DE 8282101283T DE 3265131 T DE3265131 T DE 3265131T DE 3265131 D1 DE3265131 D1 DE 3265131D1
Authority
DE
Germany
Prior art keywords
memory
programmable read
erasable programmable
electrically erasable
electrically
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
DE8282101283T
Other languages
German (de)
Inventor
Masashi Wada
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Application granted granted Critical
Publication of DE3265131D1 publication Critical patent/DE3265131D1/en
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0408—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors
    • G11C16/0416—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors comprising cells containing a single floating gate transistor and no select transistor, e.g. UV EPROM
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/68—Floating-gate IGFETs
    • H10D30/681—Floating-gate IGFETs having only two programming levels
    • H10D30/683—Floating-gate IGFETs having only two programming levels programmed by tunnelling of carriers, e.g. Fowler-Nordheim tunnelling

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Non-Volatile Memory (AREA)
  • Semiconductor Memories (AREA)
DE8282101283T 1981-02-27 1982-02-19 Electrically erasable programmable read only memory Expired DE3265131D1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56026911A JPS57141969A (en) 1981-02-27 1981-02-27 Nonvolatile semiconductor memory

Publications (1)

Publication Number Publication Date
DE3265131D1 true DE3265131D1 (en) 1985-09-12

Family

ID=12206394

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8282101283T Expired DE3265131D1 (en) 1981-02-27 1982-02-19 Electrically erasable programmable read only memory

Country Status (4)

Country Link
US (1) US4477883A (en)
EP (1) EP0060408B1 (en)
JP (1) JPS57141969A (en)
DE (1) DE3265131D1 (en)

Families Citing this family (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5864068A (en) * 1981-10-14 1983-04-16 Agency Of Ind Science & Technol How to write non-volatile semiconductor memory
JPS58130571A (en) * 1982-01-29 1983-08-04 Hitachi Ltd Semiconductor device
JPS5960797A (en) * 1982-09-30 1984-04-06 Toshiba Corp Nonvolatile semiconductor memory device
DE3481667D1 (en) * 1983-08-29 1990-04-19 Seeq Technology Inc MOS STORAGE CELL WITH FLOATING GATE AND METHOD FOR THEIR PRODUCTION.
JPS6074577A (en) * 1983-09-30 1985-04-26 Toshiba Corp Non-volatile semiconductor memory device
US4654825A (en) * 1984-01-06 1987-03-31 Advanced Micro Devices, Inc. E2 prom memory cell
US4780750A (en) * 1986-01-03 1988-10-25 Sierra Semiconductor Corporation Electrically alterable non-volatile memory device
JPS6418270A (en) * 1987-07-13 1989-01-23 Oki Electric Ind Co Ltd Semiconductor memory device
US5099297A (en) * 1988-02-05 1992-03-24 Emanuel Hazani EEPROM cell structure and architecture with programming and erase terminals shared between several cells
US4845538A (en) * 1988-02-05 1989-07-04 Emanuel Hazani E2 prom cell including isolated control diffusion
KR920001402B1 (en) * 1988-11-29 1992-02-13 삼성전자 주식회사 Nonvolatile Semiconductor Memory
US5172198A (en) * 1989-02-22 1992-12-15 Kabushiki Kaisha Toshiba MOS type semiconductor device
JP2772020B2 (en) * 1989-02-22 1998-07-02 株式会社東芝 MOS type semiconductor device
US5198381A (en) * 1991-09-12 1993-03-30 Vlsi Technology, Inc. Method of making an E2 PROM cell with improved tunneling properties having two implant stages
US5587332A (en) * 1992-09-01 1996-12-24 Vlsi Technology, Inc. Method of making flash memory cell
US6218703B1 (en) 1995-07-23 2001-04-17 Ricoh Company, Ltd. Semiconductor device with control electrodes formed from semiconductor material
JP3337599B2 (en) * 1995-07-24 2002-10-21 株式会社リコー Semiconductor device, inverter circuit, comparator, and A / D converter circuit
US5780894A (en) * 1996-02-23 1998-07-14 Nippon Steel Corporation Nonvolatile semiconductor memory device having stacked-gate type transistor
JP2004214495A (en) * 2003-01-07 2004-07-29 Innotech Corp Transistor, semiconductor memory using the same, and method of manufacturing semiconductor memory
JP2019050069A (en) * 2017-09-08 2019-03-28 東芝メモリ株式会社 Control method of storage device

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3825946A (en) * 1971-01-15 1974-07-23 Intel Corp Electrically alterable floating gate device and method for altering same
US3728695A (en) * 1971-10-06 1973-04-17 Intel Corp Random-access floating gate mos memory array
DE2445137C3 (en) * 1974-09-20 1981-02-26 Siemens Ag, 1000 Berlin Und 8000 Muenchen Method for operating an n-channel memory FET, n-channel memory FET for carrying out the method and applying the method to the n-channel memory FETs of a memory matrix
US4099196A (en) * 1977-06-29 1978-07-04 Intel Corporation Triple layer polysilicon cell
DE2908796C3 (en) * 1979-03-07 1982-04-01 Siemens AG, 1000 Berlin und 8000 München Re-programmable semiconductor read-only memory of the floating gate type
US4257056A (en) * 1979-06-27 1981-03-17 National Semiconductor Corporation Electrically erasable read only memory
DE3007892C2 (en) * 1980-03-01 1982-06-09 Deutsche Itt Industries Gmbh, 7800 Freiburg Floating gate memory cell

Also Published As

Publication number Publication date
EP0060408B1 (en) 1985-08-07
EP0060408A1 (en) 1982-09-22
JPS57141969A (en) 1982-09-02
US4477883A (en) 1984-10-16

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8320 Willingness to grant licences declared (paragraph 23)
8339 Ceased/non-payment of the annual fee