DE2949490A1 - Supply voltage monitor for dynamic RAM - monitors test core to detect bit change indicative of voltage change - Google Patents

Abstract

A volatile, random access, solid state memory includes a facility for monitoring the supply voltage level. The unit is intended for use where back up battery packs may not be acceptable and some means of detecting the point at which information is going to be lost must be provided. The memory contains a section set aside for the storage of a test code samole that is continuously monitored. When the supply voltage falls below a specific level, the bits of the code change and this is logically detected to indicate that main contents may be affected.

Description

DESCRIBE

The invention relates to a method for monitoring the supply voltage a volatile solid-state memory with several storage locations, their content when switching on again after a previous failure of the supply voltage assumes certain failure bit patterns.

Volatile solid-state memories, e.g. built up from semiconductor elements Random access memory, RAM, loses its memory contents if an interruption occurs the supply voltage occurs. The content of the individual memory locations is included Switching on the supply voltage again after its previous failure in bit patterns characterizing the individual memory locations, the failure bit patterns. In order to prevent this undesired loss of memory contents, the In most cases, backup batteries are used, which in the event of a supply voltage failure Take over the further supply of the solid-state memory from a first voltage source and thereby prevent the failure of the supply voltage.

However, buffer batteries are used in various applications not possible to prevent a failure of the supply voltage. E.g. in some use cases the use of Backup batteries in with Volatile solid-state memories equipped telephone subscriber sets o. the like. not allowed. In such applications, the failure of the supply voltage reliably displayed to the user, thus preventing the loss of the volatile Solid-state stored memory content is brought to the attention, and a new one The memory contents are written in before the solid-state memory is in readout mode is operated.

A wide variety of devices are known to monitor the existence or To monitor and display the absence of a supply voltage. These Facilities are always actively switched on and therefore constantly consume energy. In addition, such devices or circuits are relatively complex.

In contrast, the object of the invention is to provide a method of the above mentioned type in such a way that the failure of the supply voltage in particularly easy way to show the user the loss of memory of solid-state storage.

This object is achieved in that in at least a given memory location a different from the respective failure bit pattern, predetermined bit pattern (test bit pattern) is stored and monitored, and that in the event of a change in the bit pattern in the monitored memory location, the failure of the supply voltage is shown.

The advantages of the invention are in particular that a failure the supply voltage indirectly by changing the content of at least one specified memory space is monitored in which a specified bit pattern, the so-called test bit pattern is stored, the test bit pattern from the Failure bit pattern is different, which memory space in question is in the event of failure the supply voltage assumes. As soon as a bit pattern is read out from the previously stored test bit pattern is different, there is a failure of the supply voltage displayed. To carry out this process, the reading in and reading out is sufficient of the volatile solid-state memory from existing circuit units, additional Circuits for monitoring the analog supply voltage can be omitted.

It is preferred to monitor the test memory location (s) predetermined check bit pattern this memory space is read out periodically and on its Contents checked.

According to a particularly preferred embodiment of the invention the check bit pattern is chosen to be equal to the negation of the failure rit pattern. This will a change in the memory content caused by voltage fluctuations or the like of volatile solid-state storage with the greatest possible probability per Test memory space recorded. A test memory space is then essentially sufficient out to with the required reliability unwanted random changes of the memory contents.

The method according to the invention has the decisive advantage that the failure of the supply voltage indirectly via the content of a test memory location safely and reliably recognizable that in addition but also through other causes caused undesirable random changes in the contents of the volatile Solid-state storage can be reliably determined.

Claims (3)

Method for monitoring the supply voltage of a volatile Solid-state memory CLAIMS 1. Procedure for monitoring the supply voltage a volatile solid-state memory with several storage spaces, their content when switching on again after a previous failure of the supply voltage assumes certain failure bit patterns, characterized in that in at least a given memory location a different from the respective failure bit pattern, predetermined bit pattern (test bit pattern) is stored and monitored, and that In the event of a change in the ritual pattern in the monitored memory location, the failure of the supply voltage is shown. 2. The method according to claim 1, characterized in that the test bit pattern is equal to the negation of the failure bit pattern. 3. The method according to claim 1 or 2, characterized in that the Memory locations in which the test bit patterns were stored, read out periodically and compared with the respective predetermined check bit patterns.