DE2905882A1 - METHOD AND CIRCUIT FOR THE DIGITAL DETECTION OF A TEMPERATURE - Google Patents

Description

DIEKL GIiBH & CO. . Stepnanstr. 49, 8500 Nuremberg

Method and circuit arrangement for digitally recording a temperature

The invention relates to a method for digitally detecting a temperature, in which the respective resistance value of a temperature dependent. Measuring resistor in before pulse repetition frequency is implemented and in which measuring pulses that occur during a gate pulse and are dependent on the pulse repetition frequency are counted and the counting result is displayed as a temperature value, and a circuit arrangement for carrying out the method.

One such method is the company publication "Applications of the 9400 voltage to frequency frequency to voltage converter, AN-10 ", January 1978, page 2, Teledyne Semiconductor. A temperature-dependent measuring resistor is provided there in a bridge circuit, with one in the bridge branch Amplifier lies. The respective temperature-dependent output voltage of the amplifier is converted into a pulse repetition frequency. During gate pulses derived from the network, the measuring pulses dependent on the pulse repetition frequency are counted. The counting result is displayed and represents the temperature value occurring at the measuring resistor. So that the display shows the actual Corresponds to temperatures, the bridge circuit and the amplifier must be adjusted. The adjustment effort for this is considerable. In addition, the demands to be made of the analog operating circuit parts lead to the fact that such Circuit becomes expensive.

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ORIGINAL INSPECTED

The object of the invention is to provide a method of the type mentioned at the beginning To propose a type which digitally processes the temperature-dependent ■ resistance value of the measuring resistance.

According to the invention, the above object is achieved in that the frequency of a flip-flop is controlled by de ^ measuring resistor, which is in the xrequence-determining control circuit of the flip-flop, that the measuring pulses occurring at 0 ° are suppressed, and that: the flip-flop circuit at a certain, from 0 different temperature is coordinated so that the difference between the number of measuring pulses occurring at this temperature and the number of suppressed measuring pulses corresponds to the numerical value of the specific temperature. In this method, the resistance value corresponding to a particular temperature is converted directly into a pulse repetition frequency. An analog comparison or an analog compensation is not required. The measuring pulses occurring at 0 ⁰ C or F are suppressed and are not displayed, so that 0 is actually displayed at 0 °. So that the correct number of measuring pulses occurs at temperatures other than 0, the toggle switch is preset accordingly at a tuning temperature. The correct display then appears at other temperatures. A particularly high display accuracy is obtained if a measuring resistor with the most linear possible terriperature dependence and a flip-flop is used, the period or pulse duration of which depends linearly on the measuring resistor in its charging circuit.

For the detection of temperatures above 0 °, the toggle switch generates a gate pulse with a linear temperature-dependent one Pulse duration derived and the measuring pulses become more constant from counting pulses occurring during the duration of one of the gate pulses Frequency formed. For the detection of temperatures below 0 °, the measuring pulses are switched off during the duration

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ORIGINAL INSPECTED

counting pulses occurring from gate pulses of constant frequency derived from the flip-flop. The construction of a circuit arrangement for carrying out the method mentioned is particularly simple, if temperatures are either below 0 or above 0 should be recorded. However, it is also possible to extend the aforementioned method so that both under 0 and Temperatures above Q "can be detected.

The process can also be expanded into a control loop.

Advantageous refinements of the method and circuit arrangements for its implementation emerge from the following description.
In the drawing "own:

1 shows an exemplary embodiment of a circuit arrangement for carrying out the method,

Fig. 2 is a timing diagram,

3 shows an expanded subcircuit for detecting positive and negative temperatures,

4 shows a subcircuit designed as a control circuit,

FIG. 5 shows a further exemplary embodiment corresponding to FIG. 1,

6 shows a circuit arrangement for tuning the circuit according to FIGS. 1 or 5 and

FIG. 7 shows a further exemplary embodiment corresponding to FIG. 1.

In the figures, type designations of, for example, can be used integrated circuits specified. For example, those from the series can also be used for the gates shown MC 1 ... (Motorola) can be used.

030035/0152 " ⁷ " ORIGINAL INSPECTED

In Fis. 1 reads; with a clock generator 1 in. frequency-determining Charging circuit a temperature-dependent resistor 2 and a capacitor 3. The contradiction 2 has a linear positive temperature coefficient on. Sr consists, for example, of an iron-nickel alloy. The measuring resistor 2 is adjustable em Voltage regulator 4 connected upstream. At output 5 of the clock 1 thus occurs a pulse repetition frequency, which of the temperature acting on the resistance 2 in each case depends. The pulse repetition frequency can be preset by means of the voltage regulator 4. Sin in the measuring range of interest linear relationship between the temperature and the period of the pulse repetition frequency can be determined by means of the RC element 2, 3 can be achieved with known clock circuits. Temperature-independent resistances in charging circuit 2, which lead to non-linearity lead are avoided.

A multi-stage divider 6 is connected to the output 5, which is followed by an AND gate 7. Another Input 8 of AND gate 7 is a constant pulse train, the frequency of which is derived, for example, from the AC network and is 100 Hz.

The AND gate 7 is followed by an AND gate 9, which is at the input of a lock register 10. The lock register is 10 constructed in such a way that it suppresses an adjustable number of measuring pulses present at the output of the AND gate 7. In 1 shows preselection switches 11 and 12 for this purpose. In In practice, a programmable lock register (see FIG. 6) can also be used. The lock register 10 and the preselection switches 11 and 12 are followed by a further AND gate 13, its output on the one hand via an inverter 14 to the AND gate 9 and on the other hand at an input of a fourth AND gate 15 is located. Another input of the AND gate is at AND gate 7.

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- 3 -

The AND gate 15 is followed by a counter 15, a latch 17, a sin decoder 13 and a location unit 19.

The following dimensioning examples illustrate how it works the circuit described:

First of all, it is assumed that the old resistance value, at O ^W C, of the -measuring resistance 2 to its ^T. Y «r resistance value, at 300 C, has a ratio of 1: 2. So there will be ^{n-pulses at 0 0} C and 2n pulses at 300 C in the unit of time. Assuming that the clock frequency of the clock generator 1 at 0 ⁰ C is 5.461 kHz and the divider has 14 steps, then the duration of a toria pulse present at the output of the divider 5 will be 16 364 / 5.461 kHz = 3 s. Starting from a frequency of 100 Hz for the counting pulses present at the input β, 300 pulses will then appear at the output of the gate 7 at 0 C during a gate pulse. So that "000" appears in the display 19 in spite of these 300 pulses, the lock register 10 is set so that it suppresses 300 pulses. As soon as 300 pulses have entered the lock register 10, the AND gate 9 is locked via the inverter 14 and the AND gate 15 is enabled. Since no further pulses follow at 0 C in the case described, "000" is displayed.

Under the conditions described a clock frequency of 2.730 kHz will be set at the temperature of 300 ⁰ C. The duration of a gate pulse is then 16,384 / 2,730 kHz = 6 s.With the counting pulse frequency of 100 Hz again, 600 measuring pulses appear at the output of gate 7 during a gate pulse. The first 300 measuring pulses are suppressed by the lock register 10 and thus do not reach the counter 16. The further 300 pulses are counted in the counter 16 and lead to the display "300". The display is thus equal to the temperature occurring at the measuring resistor 2. The same considerations apply to other temperatures. Please refer to the following table as an example:

030035/0152 " ⁹ "

ORIGINAL INSPECTED
IAD ORIGINAL

Temperature ( ⁰ G) O 150 300 450 500

Resistance (R) 100 150 200 250 300

Frequency F (kHz) 5.4613 3.54 2.7307 2.1845 1.82

1 / F (ms) 0.1331 0.2747 0.3-562 0.4577 0.5494

TorimOuls (s) 3.0 4.5 6.0 7.5 9.0

number of
Measuring pulses

advertisement

300 450 600 750 900 "00" "150" "300" "450" '' 6.0O "

In other temperature ranges or with other resistance values des Meuwidern-ands 2 can, taking into account the Time consensus of the RC element 2, 3 and the division ratio can also be achieved that minus the number of measuring pulses the measuring pulses occurring at 0 ° corresponds to the respective temperature. The period 1 / F of the clock frequency is the resistance curve depending on the respective temperature directly proportional, since the period of the clock is determined by the time constant of the RC element ".

. The occurring measuring pulses 2 at 0 ⁰ C and 300 ⁰ C dargestellt- Hatched is shown, the area v / ähreiid unterdrüclrt: in Figure 2 is shown in the lines a and b are the length of a gate pulse in which said ratio of cold resistivity to hot resistivity of 1 will. In lines c and d, the same representation is shown for a resistance ratio of 1: 1.5. With this resistance ratio, the number of pulses masked out by the lock register 10 must be set correspondingly larger. The smaller the temperature coefficient of the measuring resistor, the longer the gate pulse must be set and the higher the blocking value of the blocking register must be selected.

Similar conditions apply to the detection of negative temperatures Considerations “Here, however, are those at the exit of the divider

030035/015? ORIGINAL JNSPECTED

- 10 -

Consider standing pulses as counting pulses, see below. The one at the entrance 3 represents the gate impulses.

In Fig. 3 a partial circuit is shown with which positive and negative temperatures can be detected. The assemblies shown in FIG. 1 adjoin the gate 7. In the exemplary embodiment according to FIG. 3, the divider 6 is divided into two stages 6 ' and 6' ^f . Three changeover switches 20, 21 and 22 are provided. With the switch 20, the output voltage of the voltage regulator 4 and thus the clock frequency can be switched. With the switch Z'- optionally, the output of the divider 6 may be 'to the divider ^5! Add ^l or directly to the Gatxer. 7 With the switch 22, the input 8 can optionally turn about the divider 6 'is ¹ or directly to the gate. 7 In the position of the changeover switches 20, 21 and shown in FIG. 3, the circuit state shown in FIG. 1 is set, which is designed according to the example described for the detection of positive temperatures.

If negative temperatures are also to be displayed, then the three changeover switches 20, 21 and 22 are switched over. When recording negative temperatures, it must be assumed, following the example above, that the lock register suppresses the same number of measuring pulses for both positive and negative temperatures. Following the example described, the divider 6 'should be a six-stage divider and the divider 6' should be an eight-stage divider. At a clock frequency of 7.5 kHz at 0 ⁰ C, and the ^ depending on the measurement pulses zt directly to the gate 7 connected splitter 6 ¹ take a length of 64 / 7,500 kHz to 3.53 tns. The 100 Hz pulses at input 8 are converted to gate pulses with a pulse duration of 256/100 Hz = 2.56 s via the divider 6 · '. The result is that per gate pulse at the output of the gate 7 2.56 s / 8.53 ms = 300 pulses occur. As already stated, the lock register 10 suppresses these first 300 pulses, so that "000" appears in the display 19. ·

030035/01 52 - 11 -

With a fictitious ¥ ert of -3OO ^W C, according to the above assumptions, the clock frequency would theoretically be 15 kHz. The measuring pulses would thus have a pulse duration of 4.27 ms For the first 300 impulses, 300 are still available for the display, so the value "300" would be displayed. Corresponding considerations apply to other temperatures.

In the circuit according to FIG. 3, the changeover switches 20, 21 and 22 can be switched electronically for a cyclical query. In the case of positive temperatures, the switch 20, 21 and 22 always show "000" in the display. The same applies in the opposite case at negative temperatures. If this "000" display is undesirable, it can be suppressed.

In FIG. 4, the circuit according to FIG. 1 is expanded to form a control loop. The circuit part to the left of gate 15 is not shown in FIG. 4. It corresponds to the circuit part to the left of gate 15 in FIG. 1. Latch 17 is on for this purpose Connected downstream of a comparator 23, which compares the content of a setpoint generator 24 with the content of the latch 17 and accordingly of the comparison result, a controlled system 25, for example a radiator, switches which on the measuring resistor 2 acts. The decoder 18 is on for the optional display of the temperature reached or the setpoint temperature Changeover switch 26 connected upstream.

In the exemplary embodiment according to FIG. 1, the clock generator forms an astable multivibrator with a relatively high pulse repetition frequency, the period of which is controlled by the -RC element 2, 3 and reduced by the divider 6. In the embodiment according to FIG. Instead of the clock generator 1 and the divider 6, a monostable multivibrator 1 'is provided. The duration of the output pulse of the multivibrator 1 ¹ is linear from the RC element 2, 3

030035/0152 -12-

addicted. This means that the period of the output pulse shape of the Kippschaltuns: 1 'and thus also its frequency depends on the KC element 2, 3. To trigger the flip-flop 1 ', the negative edge of the gate pulse present at the output of the flip-flop 1' is evaluated by means of a capacitor 27, a resistor 28 and a diode 29. The duration of the astable position of the monostable multivibrator 1 'is very short compared to the duration of the Torini pulse. The reset of the lock register 10 at the beginning of each gate pulse also takes place via the toggle switch 1 '. Sin external connection 30 is provided so that a reset can take place at the beginning of operation. The same applies to the exemplary embodiment according to FIG. 1.

Otherwise, the mode of operation is the same as the circuit according to FIG. 5 the described. The circuit of FIG. 5 can be like that Circuit according to FIG. 1 in the one described with reference to FIGS. 3 and 4 Expand way.

The setting of the circuits described can be roughly as follows can be made:

Are present at the input 8 of count frequency, the desired temperature range, the temperature coefficient of the measuring resistor 2, and in the circuit of Fig. 1, the divider ratio of the divider β or 6 'and set 6 ^11, the setting of the Sperregisters 10 is carried out so that at a temperature of 0 ° the display "000" appears. In addition, the clock frequency is to be adjusted by means of the voltage regulator 4 so that the value corresponding to the numerical value of this temperature appears in the display 19 at a selectable tuning temperature, for example 200. Due to the mutual dependency of the two values to be set, the adjustment must be carried out step by step.

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One possibility of the comparison is described with reference to FIG. 6. A test stand has an adapter circuit 31 which is shown in FIG Principle of the circuit according to Fi. "♦ 1 or 5 corresponds. The one another am; speaking assemblies are given the same reference numerals and denotes the index a. In addition to the measuring resistor 2, a Mortnal resistor 2 'is connected in the circuit to be adjusted. whose '' / iderotanasv / ert the resistance type of the measuring resistor corresponds to at temperature C. The measuring resistor 2 is kept at the tuning temperature of 200 C, for example. The two 7 / i resistors 2 and 2 'can optionally be set using a changeover switch 32. switch. The lock register 10 is a Programmable lock register used, whereby programmable in this context is to be understood as meaning that the desired 7 / ert is adjustable. For this is at the output of a counter (e.g. 4020) a PROM (programmable memory) in which electrical connections are blown in a known manner for programming will. The lock register 10a is formed by an up-down counter, the selector switches 11a and 12a connected downstream are.

Next is the switch connected to the measuring resistor tuning temperature maintained at 32 2, then the clock frequency is adjusted ■ flittels of the voltage regulator 4 so that the numerical value of the tuning temperature, for example 200 ⁰ C is displayed on the display 19a. If the switch 32 is now switched to the resistor 2 ', the value "000" should appear on the display 19a. If this is not the case, the selector switches 11a and 12a are adjusted accordingly. Then it is switched back to the measuring resistor 2 and any necessary readjustment of the clock frequency is carried out. These processes are repeated until the value "0" actually appears when the resistor 2 ^{1 is switched on} and the value "200" appears in the display 19a ^{when the resistor 2 1 is switched on.}

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ORIGINAL

Ss, the clock frequency is correctly set on the voltage regulator 4 and the number of pulses to be suppressed is set in the lock register 10a.

The switchover from the measuring resistor 2 to the resistor 2 'can also take place electronically via a multiplax control. Ss n then on .Ie a display practically at the same time the display values at O ⁰ C and the tuning temperature, if necessary 200 ⁰ C, is displayed. This means that the time required for the comparison is very small.

After the clock frequency has been set on the voltage regulator and Lock register 10a the number of pulses to be suppressed is set, is the result stored in lock register 10a to be transferred to the lock register 10. For this purpose, the lock register 10 at input 30 is first reset. Then be counted so many pulses in the divider 6 that its output at the gate is definitely H. Then the Lock register 10a counted down by means of a clock generator 33. For this purpose, the clock generator 33 is via an AND gate 34 and a OR gate 35, which also has AND gate 9a, connected to lock register 10a. Switching on the clock generator and switching the lock register 10a to "counting down" takes place by closing a switch 36. When the switch 36 is closed, the gate is via an inverter 37 7a locked and the gate 34 released. The counting down Clock pulses from clock generator 33 are counted to lock register 10 via gate 34, input 8 and gates 7, 9. As soon as the lock register 10a is counted back to Mull, the gate 34 is blocked via an inverter 38. The final result thus shows the value previously set in the lock register 10a in the lock register 10. Finally, this value is stored by means of a programming command to be applied to an input 39 of the lock register 10a to be stored in the lock register 10.

030035/015
° * ®INAL INSPECTED

2 - 15 -

In Fig. 7 a further embodiment of the invention is shown. This is instead of the described lock register 10 a monostable KiOp circuit 10 'is provided. At the exit the flip-flop 10 * is an inverter 40 which is connected to one input of the AND gate 15. The pulse duration the toggle switch 10 'can be adjusted by means of an Set resistor 41 so that a capacitor 42 to the Toggle circuit is coupled. During the duration of the pulse blocks the AND gate 15 and thus leaves none at the output of the Gate 7 during the duration of a gate pulse occurring measurement pulses get into the counter 16.

The pulse duration of the trigger circuit 10 'is adjustable by means of the Resistance 41 chosen so that at 0 ° none of the Mei3 pulses goes through the AND gate 15. The triggering of the monostable multivibrator 10 'can be done with the negative edge of the am Output of the divider 6 occurring gate pulse take place. The divider 6 can also be reset with the negative edge, after which the next gate impulse begins. The resetting of the divider 6 should take place with a certain delay, so that the flip-flop 10 'is safely triggered. The circuit according to FIG. 7 can be used in that of FIGS described way.

Numerous further exemplary embodiments lie within the scope of the invention. For example, it is possible to use the monostable The flip-flop circuit according to FIG. 7 can also be used in the circuit according to FIG. 5. Instead of deriving the counting pulses at input 8 A constant frequency oscillator can also be used from the mains frequency. If there are non-linear temperature-dependent resistances are used, a linearization can be carried out in that the gate 7 is programmed accordingly Read memory (ROM) is connected downstream. The circuit described above can also be constructed in such a way that optionally temperatures according to the Celsius scale and according to the Fahrenheit scale can be. This can be done with a corresponding switchover option take place in the clock or on the divider.

630035 / 01.52

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Claims (1)

Patent claims: Process for the digital acquisition of a temperature, in which - ^ the respective resistance value of a temperature-dependent Measuring resistor is converted into a pulse train and at dsm occurring during a gate pulse, from the pulse train dependent measuring pulses are counted and the counting result is displayed as a temperature value, characterized in that that the frequency of a flip-flop is controlled by the measuring resistor in the control circuit which determines the frequency the flip-flop is that the measuring pulses occurring at 0 ° are suppressed, and that the flip-flop is at a certain temperature different from 0 ° is adjusted so that the difference in the number of at this Temperature occurring measuring pulses and the number of suppressed measuring pulses the numerical value of the specific temperature is equivalent to. 2. The method according to claim 1, characterized in that for the detection of temperatures above 0 from the trigger circuit a gate pulse with linear temperature-dependent pulse duration is derived and that the measuring pulses from during the duration of the gate pulses occurring counting pulses of constant frequency are formed. 3. The method according to any one of the preceding claims, characterized characterized in that for the detection of temperatures below 0 °, the measuring pulses from during the duration of gate pulses constant frequency occurring counting pulses of the flip-flop can be derived. - 2 - Ü30035 / 0152 ORIGINAL INSPECTED ίι. Method according to the preceding claims 2 and 3, characterized characterized in that for the detection of temperatures below and above 0, the clock frequency, a division ratio of the Gate or counting pulses and a division ratio of the counting or gate pulses can be switched cyclically. 5. The method according to any one of the preceding claims, characterized in that for controlling a controlled system the respective Counting result is compared with a target value. 5. Circuit arrangement for performing the method according to one of the preceding claims, characterized in that the Meßwidarstand (2) has a linear temperature coefficient has and with ainea capacitor (3) an RC element forms, on whose time constant the period or pulse duration of the flip-flop circuit (1, 1 ') depends linearly. 7. Circuit arrangement according to claim 6, characterized in that the flip-flop is formed by a clock generator (1), which is followed by a multi-stage divider (6). 8. Circuit arrangement according to claim 7, characterized in that the multi-stage divider (6) is above zero at a Temperature generated gate pulses, and that the number of divider stages is such that the number of during a gate pulse occurring counting pulses is greater than the numerical value of the temperature above 0 °. 9. Circuit arrangement according to claim 7 »characterized in that that the multi-stage divider generates counting pulses at a temperature below 0 °, the counting pulses during a gate pulse occurring number is greater than the numerical value of the temperature below 0. 030035/015? ORIGINAL INSPECTED ' ^RlG ^ ^iAL _f 10. Circuit arrangement according to claim 6, characterized in that the Ki pp circuit is a monostable multivibrator (1 ^f ). 11. Circuit arrangement according to claim 10, characterized in that the monostable multivibrator (1 ^f ) generates torin pulses at a temperature above 0 °, the duration of which is preset by means of an adjustable current or voltage regulator (4). that the number of counting pulses occurring during a gate pulse is greater than the numerical value of the temperature lying above zero. 12. Circuit arrangement according to claim 10 or 11, characterized; dai3 the monostable multivibrator (1 ') generates counting pulses at a temperature below 0 The number occurring during a gate pulse is greater than the numerical value of the temperature below 0. 13. Circuit arrangement according to one of the preceding claims 6 to 9 »characterized in that the tuning of the pulse repetition frequency of the clock generator (1) takes place by means of an adjustable current or voltage regulator (4), which the measuring resistor (2) is connected upstream. 14. Circuit arrangement according to one of the preceding claims, characterized in that a programmable lock register (10) is provided for suppressing measuring pulses, which filters out as many measurement pulses at all temperatures as occur at 0 °. 15. Circuit arrangement according to one of the preceding claims 6 to 13, characterized in that a monostable multivibrator (10 ¹ ) is provided for suppressing measuring pulses, the measuring pulses occurring during their pulse duration being blocked and the pulse duration being set so that at all temperatures as many measuring pulses are suppressed as occur at 0 °. 030035/0 15? BATH