DE2900631C2 - Safety output circuit - Google Patents

Description

S. R. O "1 I. (J O O I. 1 I. I. O I. I. I. Il O (;

And with it the Boolean equation QtX = S ■ R + QiO (S + R)

fulfilled, in connection with a clock generator for square-wave signals, which switch off at a disturbed antivalence, which alternate between high and low potential at a constant frequency, as a switching van.ible. the two values of zero and I.ins differ from each other by a phase difference of 180, characterized in that at least two separate storage elements fS I. .V2) are assigned to the pair of channels, one of which is assigned to each ng (.S'II. S'2I) with an original fornui! ionen or Koniplementärir.ldrm itionen leading position (LO. / A '/ ^{1 is} connected in..I the fact input (S 12. .922) of the memory elements (S I. S 2) one of the rectangular digits of the switching variables (I.in ·, or zero) holds and the respective second signal input (SIi. S 2i) of the first or second Speit is constant (SX. S2) low or high potential (I ¹ I / H) casts and dal indirectly tilicr .'tspeist a .in the output of one of Spntherglieiler angcstlilosscnen amplifier (\ Ii) () of the Verbrauchet (iii) at least.

J Sichcihi ils - Ausgäbest attitude ii.il Ii Aiispriiih I for a pair of Speit herelieder of which d.is one (. Min derive lakii ιημ ', ιιιι.' .Iiil shows. Tl.idinili μι ', ilal) denotes the negated lakleing. iiig (S 12) ili s a Speit hergliedes (SI) the Reililei ksignale di s linen values ¹ · (I INS) dei Sihallvaii.ibleu and the l.ictingani! (S 22) des .nideicii Speit hergliedes (S 2) die Uii hlci ktij'iiale des, iiulciiii Weites JhHI I) ik ι Sili.iln.iii.ihlei erhalt (l ig I)

I Siihiiluits \ < iSjLT.il> «. si li.illiiiif. ιι.ιι Ii \ iispiiuli I in Ir ι. '. il.i.liHi Ii j'ek iiM / eu liiiel. d.iK tk in K.iM.ilp.i.u In ι Ii between ι further Spcii liciglicil · ι ^ S 1 (1. Si (I) cii.'i-okImi I .nid. Ju- Ih / iiuIiiIi Jh / iiImIii miu 'Ji ι

I) Mi-Hl, ll MIl (I KcMipllMlll Mt.IIMlliillM, Hl (IIIlH ill Il

ι ι .Ί ii hi-i.li ιι Speii Iu ι rhi JiM π (S I si) i-li ι, Ιι.ιι μ, · |) ιι illel j'csi li.illet are I In / Mi'iii Ii ι | < ι / hIhImhiii '

Ji-I Kl-llllll ksluMl.lk 'IHlJ JlM kl HISl, III I ell I Ί H eil 11,1 Ir

Jc.ι CiSIi-U two S | n u Iiiml'Ih-Jim ii (SI. Si) , πι up.ιι, ill · I μι si -hallet siiiJ iiiul dall / in Sp. is'iiii: mn ph. ι be n ι- 'ι hi Ί u-ιι ι mi U-. ί Ii! ι k si: 'π.ι Ii π in Ji ιι Λπ.

: 'Hl;' (VJf _- J) I-IMl-S llll I> ι I 11 11 lMsleM MM.I .IM JiII \ il-l! HIl '(V Ii _- VlMIUs -I- II Ii Μι Ii Il / MrHrII Spill llll : lii-.li-r cm I uliisiv (lDI \ ( (<l · ,, 1 (/ (>l') .nc.

The invention relates to a safety output circuit with a galvanically isolated consumer for a switchgear, which can be used in pairs in

has connecting and / or clock-controlled storing switching elements provided in mutually separate, complementary signals processing channels, each memory element having a clock input and two signal inputs S and R as well as an output Q

ι> and the truth table

QH)

QtX

I.
I.

t!
0

0 0 I) I. ! j I. 0

and thus the Boolean equation C> / I = S R + QH) (St-R)

fulfilled, in connection with a disturbed Non-equivalence disabling clock for square-wave signals that have a constant i'requen / between high and change low potential, as a switching variable, whose both values NIJLI. and EiINS through a Distinguish phase difference from! 80.

To control automated processes are in many technical areas, such. B. in railway safety technology, in controls of nuclear medicine, in chemical GroUpro / essen. Walzensteiierun gen and used in electronic Kernreaktorübei'wachungen .Schaltwerke, of animals ordnuiigsgerechtcin work eventually explanatory security f Ύ man and the technical Ijnrichtungcn depends itself. The electronic switching mechanisms mentioned contain a large number of passive and ikliver components. of which, no matter how careful the selection, zero is assumed that one or more ll.iiitcils become defective once katin. I in Kralliger Uauleilfchler may see, for example, in the sense of I isenbahiisiiheiungslei h ink hoihsieiis operationally hotiiiiiieiiil and imht operationally endangering kmiiieu. Resiillierl from this. il.ili iiKiiliMiie Datcnvcraihcitiiiigsanlageii. whose Sihaliiiu gen nullt ιι.ιι Ii ilen L'in.iiink-ii sichelungstei-! mix (uMi lilspiinkli 'ι .ιιιΐμ'ιli.iiil, weave ohiir meanwhile .nil Ui hinsi lien (uliiiliii with Sithcrheitsveia. wiiilwiii isi-nh.ilin.ilil.igeii can be used

/ him Ki.ilisii 11 ιι vim Si liiill w ei wedge, ilic Ihm iimiii I) i Ii kl im> iiiiMi /nsl.iiul iiIhi IiiIhM wciili'ii. the Im ik ιι Ml MSi lh Il HMlI llie M.IS, MIIIlM klMIKMl llll 'SlI I] ClIlIMt 1) 1 ι Mill Ii lllli'l ll.li Il /ll.l.Mlll .Uli W CISlMI. K. Hill CIIH ¹ Ink.IMiHe Sn In ι heitssi li.illiin ^ zum Dun lililliiiMi ΙομΊ si In ι \ ι ι kiiiipliiiiui μ (Dl \ S I ") I / I / 'l) ιΜΐιμι-sel / l

WlI. llll DlI Si- SIl 111 I III llsSi Ιΐ, ΐΙΐΙΙΜί! Il ΠΚΙμ'Ικ III IMIU

! lulu- I ilik ι sii Ium Inn. nliue J, ill the individual thereby \ ci turned \ ei knotting and-'or l.ikli.'esteiiei I spill liii Mik'ii Si h.iltirliediM ιι.ιι h ilem In knew I .ill S.ile l'iiM / ip .iiiIl'i li.int -, im iiiiissimi Him Ji .--. rr luk.iiiii liii Sk Ium lii'ii .μ li.illiin; ' ii | nli-r \ 11 kiiiipliiiii. ^f -.li.iii .Il III / ι \ ι ik.lll I III '.11 Isi'i'll llll IW ι ib.M 1 111 l'i Il ir M k .11 II Il ■ llll "ItIlIIHh ¹ Si'. I. Ι III. IM llilliill .Ulli, .ill IHl ¹ Iu ¹ MlK

to lead. The antivalence can be more advantageous Way to be monitored independently of the data flow, whereby the required security with regard to the Error detection does not depend on the general switching status of the switchgear. Particularly characteristic is for the well-known safety circuit, because it has rectangular signals as the switching variable, which with constant frequency alternate between high and low potential, the two values NULl. and ONE dun. '·, a phase difference of 180 differentiate. This means that the two cannulas are in proper operation of the switchgear dynamic signals regardless of the value of the respective switching variable.

A system's own clock (DE-PS 21 3Ϊ683) for different signals and especially for the square wave signals of the switching variable is designed in such a way that a further processing step is only possible is triggered if the signal equivalence could previously be determined in the switchgear. In addition The purpose of each pair of switching elements is one by one before each further processing step Clock emitted query pulse associated with controllable non-equivalence monitoring element. These are linked in their entirety. In the event of fault-free operation, the clock generator thus forms together with the rear derailleur a kind of self-holding circuit. Hey one Any .Signalequivalence the clock is automatically switched off. This causes the previously d> in the two channels of the switching mechanism nautical signals in static, in the sense of the railway safety lechnik signals defined as harmless, via.

In DEAS 21 43 375, the system-compatible clock-controlled logic for the above-mentioned security circuitry performing logic operations is described in more detail. Ks fulfills the truth table listed at the beginning and also succeeds in the Boolean equation given there. Components that each have two of these memory elements in conjunction with an i'lfo. watchdog included.

When outputting active signals .ms safety systems with safety responsibility, attention must be paid to the fact that a defect in one of these (in a suitable output circuit also in the safe sense) can at most have an operational impact Wechselspannungsvcrstärker. the irmalor their iicigie I / inn taxes of any consumers. / M Kel.ns. iibci a Iransf and cn by the ^one-fed {ileichrichtersch.iltung wc! granted. Dcr.iitigc scarf liingcn have the advantage that beliel · i / c Defects, inslicsonderi a Kiir / schlii.'t in the Sehalisiicike von Verslärkcrlransislorcn. always lead to a reduction of the output voltage, but never / in an output coil, which the / u controlling relay to the I Ui / in iiiul il.iniil a f.ilsihcs.gcfahrlu lies signal fuler a niilil wanted pro / cHslciicriing hcibciliihrcn iviirde

line output 1 unit lur a logjs »read Nvsicni. Ki the L'lektrisihe V provided in an Aiillenanlage ubci different seams'! / wipe the Aiillcu.inl.tgc and the rear derailleur controlled by slit / e vv.-rden. is described in more detail in DK OS 2 \ I i ί ·) Ιι Heidiesei edition Kinheit is assumed that! the signals coming from your associated Si h.iltucik are Ocis oi'duiingsgerei lit, iiml ilalS it matters to me mκ Ii il.ii.nil, these signals ι.ίΙι the above mentioned safety principles by creating a galvanic separation of input and output circle. Since the output unit works in conjunction with a transistor blocking oscillator circuit with a feedback transformer, there is, however, the risk that in the event of a defect, impermissible vibrations will occur which can simulate a dangerous signal state.
The invention is based on the object of a switching mechanism which processes square-wave signals as switching variables which alternate between high and low potential at a constant frequency, the two values ZERO and ONE of the switching variables differing by a phase difference of 180

• Specify the security output circuit which the Presence of the switching variable with the value ONE at its input a consumer, z. B. a relay, is switched on via galvanic isolation and if the other value of the switching variable is ZERO safely switches off the consumer. Furthermore, the sickness output circuit should be designed in such a way that that when creating exclusively -iefem or only high potential at the input of the consumers indirectly present at the output of the output circuit as well remains switched off.

According to the invention, the object for the switching mechanism mentioned at the outset is achieved in that the pair of channels at least two separate memory elements are assigned, each of which has a .Signalingang an original information or complementary information leading line is connected and the Clock input of the memory elements of one of the square-wave signals of the switching variable and the respective second signal input of the first and second storage element is at a constant low or high potential and that the consumption 'indirectly via at least one the output of an amplifier connected to the memory elements is fed.

The particular advantage of this .Safety issue circuit is that for decoding the special to represent tier two widths KINS and NlIU. required square-wave signals em minimum of components is required in an advantageous manner can be monitored for complementary work in accordance with the system. Also occur when entering the switching variables with the value NULL no .msgangssciiit.cn Stor, paii ming up. which could ultimately turn on the consumer in an undesirable manner.

If .Memory elements are available that the option table mentioned at the beginning and the Boolean equation

(Jl I - S R + QK) (Sf K)

succeed, being the one of the l'aarcs of memory link a negated clock input aiifweis'. /eichr.il suit a preferential provision of the I ι hung il.idiirih out. that the negated faculty of the one Speu her link the Kechtei ksignale of one value The Si stop variable nid the lactation input of the other The other member's recluse signals The value of the switching variable.

If so desired. the Kolgcfrei | iicnzi! er ν on ilen Rechieiksiguale output to storage elements doubling is another requirement I ifindiiiig of Vorlei ', which is thereby marked. Yes it «lein pair of ducts, two more salivary segments / iii! coiilnct are related to the / iiliiln nng of

Original and general partner norms first Heiden memory links similarly connected in parallel! are and bc / üglich the supply of Square-wave signals and the constant potentials are connected in parallel to the first two storage elements! and that / ur feeding with phase-shifted square wave signals to the output of one of the two first and at the output of one of the two temporary storage elements a exclusive ODLR element is connected sen is. which is directly connected to the relay.

Exemplary embodiments of the invention are shown in FIG Drawing shown and are explained in more detail below. Is / eigt

I'ig. I d.is block diagram of a switching mechanism mn / white signal warning and a security issue.

Cig. 2 in several diagram lines different signals on the safety output line.

I i g. j and 4 .Circuit variants of the safety output circuit and

Cig. 5 a safety output circuit with Irequen / doubling the square wave signals controlling an amplifier.

The block diagram according to C i g. I / e owns all / necessary assemblies and min / elicilc independently in order to understand the company. Hin Schallwerk .SA receives a TC clock! with an integrated shut-off part, not shown in Cin / elheücn, via a number of supply lines, the signals necessary for operation. The shut-off part of the TCJ clock is configured in this way. Then only when the maintenance works are working properly and of course only when the clock Td itself is intact, the square-wave signals explained in more detail below via the supply lines / I to /. 5 can be issued.

The over the bumped supply lines /. 1 and /. 2 wim the clock generator Td output square wave signals weclT-a with a given constant Crequcn / with a duty cycle sun I: I / wipe high F'otennal / V / how <uif the supply line 1.7 it is present and / wipe low potential II .. the ,, , .- K -,., ( , (...- ν. ,,. Ι ..;.; C .. ", ι,.,. · .....! ·., Li ...

taklgesiciierle storing sound links needed! who the.

The data for the Ivw. Information processing in the switchgear SA inputs required are guided over a line symbolically represented for all necessary Cingaheleitcn. With regard to a better overview of the drawing, there is only one output in F-shape of a channel pair with the output lines for the footwear SK /.Otind / A 'for the output of original information b / vv. Complementary information. The sound system SK / ugeguie Ubcrwathiingsptils /' / 'is output again via the I / 81 to an in the N . hallungs / mil usamtiienli.uig the Sichcilteits-Aiisgabeschaltimg provided Aniivalen / T Iberwachungsglied AIJ. berwachungspuls to which the I I ¹ I 'further conductive line is on the output side ^to! /.8 connected. the SicherheilsAusgabesch.iltung. attached to the through lines LO and LK is connected represented channel pair. shall look in the embodiment of two separate lakl their controllable memory elements .SI and .S 2. each of which has a signal input SIl b / vv. .V2I mn of the line LO b / w. / A 'is connected. So the memory device .S 'I b.'w S 2 are the original information b / w output by the switching mechanism .SA'. Complementary information supplied.

The storage element VI has a negated clock input S 12. iver not like the taktgeslcuert storing .Sound elements of the switching mechanism SK with a tier clock signals OT b / w. Kl (lines /.4. /.5) is acted upon. but iiiil the leakage signal of the supply line 1.2 representing the value LINS of the switching variable. The same applies mutatis mutandis to the clock input S'22 of the storage element S 2 with regard to the square-wave signal on the supply line / which represents the value ZERO of the sound van.iblcn. I. The second signal input SiI b / w. .V23 of the storage element .S'l b / w. .S'2 receives over the line l.fi b / vv. 1.7 from the clock Td constantly low potential f 7. b / w. high potential I H. Both storage elements 5 I and 52 are so ... f. "" U .... ·, 1..Il li ,. .1 ... W-yourhpitctuhpllp

two square-wave signals of the supply lines /. I and 1.2 represent the two values ZERO and F IMS of the switching circuit provided for the switching mechanism SA: they are characterized by a phase shift on 180. The supply line /. i carries a monitoring pulse (V of the double frequency of the square leakage signals ■ of the supply lines, /. I and 1.2. such that for each Verarr) e: iurgs: .chr "t sees an interrogation pulse -A.S 'available in proper operation . How to hand the .Sicherhcits output circuit will be explained in the near, the abgege- v via the supply line L 3 to the rear derailleur SK, surrounded monitoring pulse uP is used to check whether the switching mechanism SK to the stripes on the two processing channels. processing step for processing step Only in this case can the checking interrogation pulse AS finally get back into the clock generator TG via the line LS to trigger a further processing step SK spent more - \ given .

The supply lines L 4 and Z. 5 lead clock signals OT and KT. those in the switchgear SK for

S. R. Qi and equation CAi I. I) η Il 1 I. I ι I. Il I. 1 1 Il I) 1 0 and damn the boolean

Qt I = S ■ R + QtO- (S + R)

fulfill. Here, instead of the reference numerals 511 and 521, the symbols 5 and, instead of the reference numerals 513 and 523, the symbols R used sub QLO output signals at the output 5IO of the storage member 51 to be understood at the time iO at a predetermined processing step: the index 1 1 during the symbols Qt 1 means that these are signals that are generated on the subsequent processing step at time / 1 at the output 51Q of the memory element 5! vorha are ends.

The antivalence monitoring gued Au connected to outputs 5IO and 52Ο has. as already briefly explained above, using the upper

29 00

chiingspiilses I ¹ I ' tlie task of monitoring the signals emitted by the two storage elements SI and 52 for antivalence. The anlivalence liberaluings link Al) consists of a Sehalllransisior / 5. whose switching path is connected in series with a resistor R to ile (ileichstromzwcig a crutch (ileichrichierschaltung in the form of four diodes / Jl to 1) 4 always existing analog output signals with a similarly rectified U 'V supply voltage. regardless of which value, i.e. I.INS or NULI, is output via output 5 IQJ or S 2QJ oiler but static a; ii \ .ilcnte signals in l' orm Mim high and deliver potential.

I in the operation of the security aiisgabcsdiallimg is

it is unimportant whether the anti-valence monitoring element WJ and and the storage elements SI and 52 from

UIMMtILlI IfIlIKIl [Il ^ IfHIt | t (llf; ll (lllll illlll, im mii «lmi \ VlV '

mentioned parts are provided in integrated technology or whether a highly integrated two-channel Hausein is used, which holds the two storage elements SI and S 2 as well as tlas Antivalcnz-l Jhcrwacluingsglicd ■ l / Jentluill. as it is customary in the trade.

An amplifier VR is connected to the output 5 IQJ of the storage element 5 I, the output cable of which is the primary winding of a transformer 77? feeds. A relay Rl. Is connected to the secondary winding of this transformer by means of a linear circuit with a diode D 5 and a capacitor K as a consumer: however, it is also possible to connect a signal lamp to the secondary winding of the transformer / 7? The mode of operation of the arrangement according to I ig. I is explained in more detail below with reference to FIG.

F i g. In several diagram lines, FIG. 2 shows various signals that can be present at the fin or outputs of the two storage elements 5 1 and 52 (I ig. I). To define further signals shown in the lower diagram lines, those keehleek voltages are shown again in chronological order in the upper bcitien diagram lines. lic on the utility lines /. 1 and /. 2 are present and the two values ZERO and! "INS represent the switching variables. In the third diagram line from above, the interrogation pulses of the monitoring pulse ί 'Pdargestdlt the Signalcingang 511 and 521 of the Spsichergliedcs 5 1 and 5 2 abut. Fs can be seen that up to the time ta at Signalcingang 5 11 Shah variable with the value ONE is present as original information. while the complementary information at the Signalcingang 521 of the storage member 52 has the value ZERO of the switching variable.

From time ta to time tb , the value ZERO of the switching variable is at the signal input 511 of the memory element 5 1 and consequently the value ONE of the switching variable is at the input 521 of the memory element 52.

In the course of time after time tb , the square-wave signals are predominantly shown in dashed lines, since it is intended to show that a shutdown occurred in the clock generator TG because, for example, the interrogation pulse of the Uberwachungspiilses /// 'triggered after time tb is no longer over the line due to a defect /.8 (I ig. I) came back to the clock as the error-free message. Correctly it should be pointed out that in the way in which the key signals in the upper three diagram lines are presented, no account was taken of the error case described.

In the two lines in the diagram, signals are shown which are emitted from the output. In the line up to the point tu , a return signal is output from the output SIi.) Of the memory clock 5 I, which has half the duration of the clock signal representing the sound variables. These square-wave signals, shown in the circle in the diagram, pass through the amplifier I'W. the Transfoi malor TR and its secondary winding as well as the nachgesi held (ilcichrichtcrschalliing on the relay Rl. which

Storage element 5 2 are not processed further in the case of the gcmäll T "ig. I version: they are only available for control purposes in the case of the antivalence evil wacluings glietl / WJ.

The example shown here can be recognized by the example. that the safety output sound based on original information output on one channel (line LO) with the value LINS finally tlas relay Rl. turns on. Because of this sound process, a dangerous situation can exist. may the relay Rl. be switched on or remain switched on when no groove is used when the original information is transmitted from the switching mechanism via the line /. According to a further working example, this is the case between the times /;) and /. As can now be seen from 1 land of the penultimate diagram line in I "i g l'orm of supply potential before (lower diagram line), so that the anlivalence monitoring element AD can still recognize an orderly signal state - albeit statically antivalently - in the /.cit space between the point in time in uml If 5IQJ of Speicherglicdcs 51 now existing static potential is not transmitted from the amplifier \ R, so that the Sckundärkras of the transformer 77 is? energized, the relay Rl. drops and remains energized.

The relay RL remains switched off even after the fault assumed at point lh. This may consist in the fact that an internal short circuit in the

■ Storage element 51 sends the signals present at clock input 5 12 to output 5 IQ? reach. Because of the interim equivalence of the signals at the non-equivalence monitoring element AD tu, this leads to a complete shutdown of the clock generator TG when otherwise

¹ rectangular signals triggered for proper working. Thus, a constant high potential remains at the output 5 IQJ , as it was already given between the times ta and tb , and the relay RL is switched off at the same time.

«In the circuit arrangements according to FIGS. 3 and 4 are safety output circuits according to the example! according to Fig.! shown, but with the difference that two amplifiers VR I

29 00

and VW 2 are connected to the outputs of .Speicherglieder .SI and .S'2. For the circuit arrangement, according to Γ ig. A transformer TWI is provided, the primary winding of which is connected to the two amplifiers VW I and VW 2. this primary winding having a millenapot which is at ground potential. Home the example according to Fig. 4 there is no communication on the primary cable of the transformer IR 2.

As with the two lower diagrams in I i μ '. 2 / u can be seen, the square wave signals emitted by the storage elements SI and 52 only have the low-key l're (| iien / of the check signals shown in the upper two diagram lines hi the circuit of Γ ig. I or the saliva divided .S 'and I .V 2 nachgcschaltetcn llbertra-Iiingsmitteln is considered vorleilhafl, said race / of the output signals / u double, is a ii'haliungsanordniing to Cig. ^r> In this case, an advantage aiiller the two already g for the circuit arrangement according to F i. I near explained Speit hergliedern J 'I and S2 mil associated Antivalenz llberwathiingsglied .Λ / J yet another pair of memory fliedein V 10 and with associated .S'20 Non-equivalence Jberwai link Al) \ provided. With regard to the management of the original information and the complete internal information, the signal inputs of the control elements S I and S IO or S'2 and S'20 are connected in parallel. From the clock supply point of view, the clock input of the memory element .SI is parallel / around the clock input of the memory element .S'20. The clock input of the memory element S'2 is connected to the clock input of the memory element S 10. The static signal passed to the memory element Vl / !! also received the memory element V 20. and the static signal passed to the memory element V 2 / !! is still at one of the signal inputs of the memory element SK). As a result of such a sound system, it is achieved that the output signals of the second pair of storage elements S 10 and S 20 are reduced by a step I (Fig. I) in relation to the output signals of the first pair of storage elements S S and S 2. are educated. An exclusive-ODKR-Cilied l'.ODm I-Orm of a diode circuit is connected to the output S2Q of the memory element .S'2 and to the output .S ' \ 0Q of the memory element .S 10. This feeds a subsequent two-stage AC voltage amplifier VR J. whose unclion is generally known and is the same as that of the amplifier VW. VWI and \ R 2. The amplifier VW i feeds as in the example embodiment according to I g. I galvanically cut the relay Rl.

Is se ¹ mentioned, dall by connecting the two AiMivalenz-l'lberwachungsglieder WJuiid \ D \ in animal circuitry to I'ig.) All four latches .SI. .S "2. .SIO and S'20 are included in the antivalence control required for safety.

In practical operation, several .Sicherheils-Aiisgabeschalliingen are required for a switchgear. Then the switching mechanism not only has the two lines IX) and LK (FIG. I) for outputting original and / or combined information. but a multitude. Each pair of such output glue lines is then routed to a further separate pair of storage elements, for example in accordance with the nut guide form according to I- "i g. I.

llicizu. ' KIaIl

Claims (1)

Patent claims: I. Safety output circuit with a galvanically isolated consumer for a switching mechanism, which has several connecting and / or clock-controlled storing switching elements provided in pairs in separate, complementary signals processing channels, each memory element having a clock input and two signal inputs 5 and R as well as an output Q has and the truth table is closed, which is indirectly connected to the consumer (RL) (Fi g. 5).