DE2746523B2 - Computerized communications equipment - Google Patents

Description

The invention relates to a computer-controlled communications equipment, in particular television, Radio receiver and hi-fi control device, with on the device and / or on a wireless or wired signal

transmitting remote control arranged control elements, buttons, sensors and / or actuators for Controlling, switching on and switching of variable and fixed device functions, with each control element having a Matrix circuit is connected to a coding circuit which encodes the command in a specific code and to a receiver circuit, which stores and converts the control command, and to the electrical function controller switches through.

In the journal "Funkschau", 1977, issue 17, pages 763 to 768, a television set is described at all of the functions that can be set by means of a remote control via one arranged in the television set Microcomputer controlled.

By pressing the buttons on the transmitter, different frequencies between 33.9 and 44.9 KHz are set which are each assigned to a function (30 functions). The received frequencies are counted in 7-bit counters, their counts in a interrogated by the microprocessor at a certain time interval and deleted after each interrogation with a time delay by resetting the counters from the microcomputer.

All remote control functions and the functions that can be controlled on the device itself, these are: network, Program sequence selection, combined with the automatic programming of the timer and the fine-tuning controller to fine-tune the tuned station, are via the microcomputer by a entered program controlled. Two PSUs (Program Storage Units) are more likely to be used as program memory needed. As a memory for on / off, the toggle commands, Tuning voltage, fine tuning and range information for 19 programs as well as four analog values and four normalized analog values are used by an electrical J5 erasable memory that is connected to the central processing unit (CPU, central processing Unit) is connected. The counter readings of the receiver module of the infrared remote control are obtained from the computer queried and read into the program memory. In parallel, there is a second program storage unit the display is controlled in multiplex mode. Via the entrance and exit of the former Program memory, the television receives control signals from the microcomputer, z. B. Area information, Signals for the AFC shutdown, among other things, are carried out in parallel with the function control and numeric display a storage in a data memory, which retains the data even when the device is switched off variable setting variables are controlled directly by the computer by sending the control command to a D / A converter is fed, which feeds the analog signals to the corresponding function controllers. With this well-known In the microcomputer-controlled device, the microcomputer also serves as a timer, which lasts for a long time The time period for the functions to switch the device on and off is programmable.

A major disadvantage of this computer-controlled device is that the input commands be queried cyclically again and again in the multiplex process. The polling cycle always generates interference frequencies within a wide range of frequencies. These disruptions can only be dealt with economically Eliminate unjustifiable expenditure on interference suppression measures. The use of the control circuit in Hi-fi devices or radio receivers of a general kind are therefore only possible to a limited extent or not.

From the specialist journal “Components Report” from Siemens A.G., 14, 1976, issue 5, page 150, an infrared remote control system with pulse code modulation is known, in which all commands of the remote control as well as those of the operation on the device are each one transmitter which converts the command into a 6-bit biphase code, with a Start bit is set, which allows an additional distinction for the recipient. The advantages that result from This remote control, which no longer works on a pure frequency basis, is at a higher information speed and, in addition, increased interference immunity through pulse code modulation in the biphase code. There are no disturbances from flexions, clinking noises and Doppler effects. Furthermore, higher Transmitter peak powers are generated by intermittent operation. Thus, this remote control method compared to that mentioned in connection with the aforementioned computer-controlled device significant advantages. The transmitter modules used also allow, as already stated, the Parallel operation on the device, as the same output signals are generated for the same input commands.

The infrared signals coming from the transmitter are converted into a selective one after electrical conversion bipolar preamplifier, with a first false signal suppression. A parallel input can A command can also be entered from the control unit of the device via a preferred circuit. That Receiving part has a program memory, via which fixed manipulated variables can be called up, and an analog memory in which the analog values corresponding to the variable quantities are stored and called up will. The analog values present at the outputs are used to control the analog functions, z. B. volume, brightness, color saturation and the like.

Another advantage of this infrared remote control system is that after the transmitter stage, so also on Input of the receiving part, both from the remote control and from the controls on the device for the same Functions binary coded (in a special case: 6-bit biphase code) input signals with a start bit issue. However, the receiver module allows different arithmetic operations to be offset, which are necessary to control the possible multitude of functions are not

On the basis of this prior art, the invention is based on the object of a computer-controlled communications equipment, e.g. B. to train a television, radio or hi-fi device in such a way that all operating functions that are entered via the remote control, parallel to it or can be controlled serially on the device itself, and that the logical linkage of the control commands with the to controlling output quantities (fixed quantities and variable quantities) takes place via a computer, whereby ensured should be that the control commands through signal lines within the television set not can be influenced more and superimpositions of the RF interference generated as a result of interrogation clocks Interference frequencies can be avoided without having to provide for special interference suppression measures.

According to the invention, the object is achieved according to the teaching given in the characterizing part of claim 1 solved

Advantageous further developments of the invention are described in the subclaims.

The invention, as well as other advantages achieved by their Application are given below in a

Exemplary embodiment for a hi-fi device described in more detail with reference to the drawings. In the drawings shows

F i g. 1 shows an overall block diagram of a computer-controlled operating and control unit designed according to the invention Voting unit in a hi-fi device,

2 shows a block diagram of the interconnection of device-based operation and remote control,

3a shows a circuit diagram of the device input keyboard,

F i g. 3b shows the transmitter part of a remote control which is one of the input keyboard according to FIG. 3a equivalent downstream is,

F i g. 4 is a block diagram of the display controller, FIG. 5 a DA warmer for the sound controller and

Figure 6 is a block diagram of one of the computers controlled PLL frequency synthesis circuit.

The operating unit for a hi-fi system, described in more detail below, has a microcomputer which 2 ·) is programmed in software so that the functions mentioned below can be controlled via it.

NF part

2 "i

1. Analog functions. Bass, treble, balance, volume,

2. Numeric display of the setting of the four analog functions,

3. Switching functions: rumble, muting, scratch, linear, _ilt

4. Switching functions: Phono, Tape 1, Tape 2, ultra-short wave reception, short wave, medium wave and Long wave reception (FM, KW, MW, LW),

5. decrease the volume to a certain value,

6. Issue a mute command to suppress j-> of on / off and switch noises.

RF part

1. Control of a PLL frequency synthesis circuit for all areas (FM, KW, MW, LW), _{4 (t}

2. Switching from one receiving tuner to another,

3. Control of a simple numeric display for frequency and set program,

4. Monitoring of the range limits, so that also 4, compliance with the frequency bands with crystal stability takes place,

5. Acceptance of the commands from manual tuning and automatic station search or from the Keypad for numeric input of frequencies,

6. Control of a program memory with 12 stations per waveband, manual tuning for all four areas, one electronic search for all four areas and one numerically adjustable transmitter for all four areas,

7. Separate setting of the volume for AM and FM area and its storage,

8. Detection of frequencies that are outside the permissible reception range, the current is set, with numerical frequency entry t, o and display of the error and

9. Set all multi-bit information for the functions in a data memory so that when Switching the device off and on again not only preserves the set stations, & 5 but also all NF functions saved with the last set value will.

The listed functions can be used in a computer-controlled hi-fi system according to the exemplary embodiment is created, can be controlled. With appropriate changes and additions to the software the computer circuit are of course also extensions or other space allocations for the Control of other communications equipment, e.g. B. televisions, possible, which also Hardware seen from the point of view of the invention must be adapted.

In the overall block diagram of FIG. 1, the input keyboard on the device is shown under reference number 1 and the input keyboard of a remote control is shown under 2, the command signals being transmitted from the remote control to the receiver module 3 via infrared light. By pressing each function key on the input keyboard 1 on the device, a coding stage 4 is keyed via a matrix circuit, which converts each command into a word in 6-bit biphase code, which is read in serially via a common input A of the microcomputer 5. In the remote control 2, a pulse processing takes place in the same way, whereby when a function key is pressed, a coding stage is also activated, which converts the command into a word in 6-bit biphase code and sends it to a pulse output stage of the transmitter stage of the infrared transmitter. The infrared signals coming from the transmitter are fed to a selective preamplifier of the receiving stage 3, in which a first interference signal is masked out. The 6-bit biphase code at the output of the preamplifier is also read into the microcomputer via the common input A.

Contrary to the prior art first mentioned in the introduction, there is no readout of a Counter reading, but the direct input of a certain control command is pulse code modulated. It it can be seen that this data input is the most interference-proof, since the control command is present as a multi-bit code word and can be less falsified by external interference pulses and interference. Furthermore, there are no interfering frequencies on. The microcomputer is programmed in software to read the attached 6-bit biphase code can decode and from this the desired information for adjusting the readjustment Function controller calculated. This is done in such a way that for all variable quantities such as volume, balance, Treble, bass or brightness and saturation in televisions, which are generated by the coding level in one cycle given words are counted directly according to the actuation time of the function key, whereby from the counting position stored in the central memory of the computer upwards in positive or downwards in negative direction is counted. The command is thus issued to enter the corresponding memory register counting a certain number of steps in positive or negative direction. The one in the computer multi-bit information obtained even by decoding and addition or subtraction or other arithmetic operations to set the digital function controller is via a data bus 6 to the actuated Information memory assigned to the function key, e.g. for volume on the 7-bit DA converter 7, submitted. The multi-bit information is available at all other information memories at the same time. You win. but not read, since only the information memory 7 is activated, which is addressed by the computer, the Address is decoded via the address decoder 9 and

is switched through via an address bus 10 to the information memory 7 to be activated. The information memory 7 (latch) holds the entered digital information, changes the written information if there is a change in the combination of numbers, or leaves the data unchanged. The written information is saved as fixed information and is used to set the function permanently. Corrections as a result of analog deviations are not necessary, since the multi-bit information present as a control variable is not variable and is prone to failure due to the short transmission time. Different digital to analog converters 7a, b and c are provided for the variable values to be set individually: bass, treble, balance, volume, all of which achieve the same effect, namely the storage of the digital value and the conversion of the digital value into an analog control value. They are activated individually via the address bus and the address contained therein. If there is no such command, the multi-bit information from the microcomputer cannot change the stored number compared to the new one. Parallel to the writing of the multi-bit information in the addressed information memory, the value is stored in a central data memory 11, which records the values of the last setting of all functions and records them for a long time when the device is switched off or when the voltage source 12 of the computer fails. When the device is switched on again, i.e. when the energy supply source 12 is switched on again to the computer and all other device functions can be performed, a special program is read into the computer that writes all functions to the last set function in the information memory and the central data memory 11 for this purpose queries. The time sequence between the command input in the computer and the setting of the function controller is so short that it is beyond the visual or acoustic perceptibility. The multi-bit information that is written into the addressed information memory via the data bus is written in a few milliseconds via the data bus, so that interference does not occur even with longer cables being fed to the individual information memories, which is not the case with the transmission of analog values. Elaborate shielding measures are not necessary.

The same conditions have been set for the alphanumeric display, namely that the display result is not influenced by interference frequencies. For this reason, after the digital multi-bit information has been written into the addressed information memory of the function controller to be set, the computer outputs multi-bit information proportional to this setting with an address for the alphanumeric display, the alphanumeric display 14 being preceded or readable by an addressable information memory for the information to be displayed is integrated in the display. in which the multi-bit information is written. In the exemplary embodiment, information memories 13a and t3b are also provided, via which the switchover is carried out in addition to the illuminated display of the activated function. This is done via line 24 by activating the individual electronic changeover switches. The alphanumeric display consists of a segment display made up of several digits and symbols, with a column of digits available for each variable to be set in order to ensure a common display of all function positions at the same time.

In the exemplary embodiment there are further inputs of the microcomputer with an automatic tuning circuit and a manual tuner connected. How this arrangement works

ίο is to be described in connection with the description of the PLL frequency synthesis circuit used with a digital frequency display which is controlled by the computer.
As is well known, PLL frequency synthesis circuits with digital frequency display offer, in addition to the advantage of accurate frequency display, that of quartz-stabilized regulation of the oscillator frequency of the receiver.

The basis of this type of circuit is the phase-locked loop (PLL phase-locked loop), which

.-> ■ - frequency synchronization between crystal frequency and Local oscillator manufactures. For the design of the frequency synthesis circuit for the frequencies of 600 KHz to approx. 120 MHz, i.e. from the long wave range to the ultra short wave range, it is necessary for use different frequency dividers for the individual frequency ranges. It has been found to be functional proven, in the MW and SW reception ranges in 1 kHz steps and in the FM range in 10 kHz steps adjust the frequency synthesis circuit.

3n Since there are no frequency dividers that can be programmed up to 120 Mhz there must be a prescaler before the programmable frequency divider of the frequency synthesis circuit to be ordered. In order to achieve the required division ratios: a maximum frequency to be processed of To obtain currently 2.5 MHz of the frequency synthesis circuit, it has turned out to be optimal, the FM and SW area a 50/51 and the MW and LW area a 5/6 division.

The variable prescaler 50/51 was chosen because at a fixed prescaler of 1:50 the reference frequency in the phase comparison circuit at FM 200 Hz (10 KHz divided by 50) or for SW 20 Hz (1 KHz divided by 50) must be 10 KHz resp. To be able to realize 1-KHz-steps. Since the reference frequency is used as an interference voltage in the phase-locked circuit is present and has to be screened out, integration time constants would arise at 200 or 20 Hz result, which make a quick major tuning from one end of the range to the other impossible would.

The lowest interference frequencies to be suppressed are in the designed frequency synthesis circuit in the phase locked loop at 1 or 10 KHz and thus 50 times higher.

The block diagram of a frequency synthesis circuit used is shown in Fig.6 The mode of operation of the frequency synthesis circuit is based on this block diagram is briefly described. Part of the voltage of the local oscillator 71 or 72

bo passes through a crossover network 73 and is in the Divider 74 divided down and pushed on to the synchronous divider 75/76, which can be programmed by the microcomputer. The output frequency from the synchronous divider 76 is in the phase comparator 77 with the reference frequency

b5 frequency free compared to that by a switchable Divider 78 is obtained by dividing the frequency of the crystal oscillator 79. The switchover of the asynchronous divider 78 is also computer-controlled

controls by entering the frequency range to be set. The phase comparator 77 supplies a DC voltage which readjusts the frequency of the receiver oscillator controlled via the AM / FM switch 80 until the divided frequency agrees with the reference frequency. The synchronous divider 75 switches the division factor of the variable prescaler from 50 to 51 or from 5 to 6 during the counting process. For this purpose, information is available both from the microcomputer and from the programmable synchronous dividers 75/76 which, when the frequency range is entered, effect the switchover after a counting process. For the desired reception frequency setting, the synchronous dividers 75/76 receive corresponding multi-bit information from the microcomputer, which, coming back to FIG. 1, is written into the assigned, addressed information memory 15/16 via the data bus. The corresponding frequency is entered either numerically using a Zener keyboard via input A, which can be entered either on the device or via the remote control, or by an electronic search that works as follows: If the »electronic search + or - «after entering the appropriate command to the microcomputer, binary information is sent to the microcomputer via a matrix circuit and a coding stage 17 , which in turn clocks frequency steps from an integrated or a clock generator in the preprogrammed counting rhythm and multi-bit information for control in the selected receiving area of the programmable divider 75/76 in Fig.7 outputs which binary information is held in the information memories 15 and 16 , which must be addressed at the same time. The set values cause the PLL frequency synthesis circuit 18, which based on the in FIG. 7 detailed block shown -

Receive frequency
+ ZF

Oscillator frequency

87.5MHz 10.7MHz 98.2MHz 20

35

circuit of the frequency synthesis circuit, the corresponding readjustments of the local oscillator 19 (FIG. 1) or the oscillators 71/72 (FIG. 7).

Manual tuning is carried out in a similar way, with pulses being generated by means of a setting wheel 20 (FIG. 1), which is provided with a perforated disk, which are generated by two photodiodes offset by 90 ° below a light source passing through the perforated disk and the direction of rotation , ie + / - signal setting. In a downstream pulse shaper stage 21 , the applied pulses are processed and entered directly into the computer and added or subtracted from the actual value.

The microcomputer outputs digital multi-bit information for setting the PLL frequency synthesis circuit, which corresponds to the respective control value. This Mehrbitinformation is read via the data bus into the addressed information storage 15/16.

The offsetting by the microcomputer is necessary, regardless of the reception areas described here, also for the reception areas in televisions or other signal receivers, which is explained below using the radio reception area, for example. The binary information for the synchronous divider 75/76, which are buffered in the information memory 15/16 (Fi ^. 7), are in no direct relationship to the reception frequency, since otherwise the hardware expenditure, ie the individual coding stages, would be so expensive that this is no longer economically viable. This is now done by the programmable microcomputer using suitable software. The VHF reception frequency of 87.5MHz should serve as an example for the following consideration.

The programming inputs of the synchronous dividers A and B receive corresponding information from the microcomputer so that the desired reception frequency is set.

1OkHz

(1)

a = division factor of the divisor A.

b = division factor of the divider B

1OkHz = reference frequency

= Division factor from the distributor

This is the case when Formula 1 is met.
The formula shows that the division factor a has a value of 1 and the division factor b has a value of 50, i.e. if a is increased by 1, the oscillator frequency changes by 10 kHz and if the division factor b changes by 1, the frequency changes 500 kHz - For the frequency 98.2 MHz, £ = 196 and a = 20 must be. One then obtains:

/ _{O £ Z} = (20 + 50 χ 196) χ 10 kHz = 98.2 MHz

The prescaler will divide the oscillator frequency by 51 for the number _H that the divider A needs to count from 20 to 0 and then continue to work with the division factor 50. The switchover signal for the scaler is provided by the divider A.

The equation below corresponds more to the practical functional sequence, but delivers that same result:

The division factors a and b must be made available by the microcomputer as binary information.

D ₂₅ *

0.28

D ₃₂

O ₁₆

D ₄

D ₂

a = 20 =
6 =! 96 =

0 0 1 0 1 0 0 1 0 0 0 1 0 0

Parallel to entering the individual frequencies, be it via the usual, manual setting, via the fast or slower station search, retrieving stored stations and direct numerical frequency input, all digital multi-bit setting information output by the microcomputer is processed in parallel for the PLL frequency synthesis circuit for the numerical display converted and serially in the numeric display is entered, provided this is addressed via the address bus. Also takes place in parallel an indication of whether a correct frequency has been selected in the set reception range. If there is no result this signal is changed so that the operator is immediately informed that a Incorrect setting 22 (Fig. 1) has occurred. The storage of the digital value takes place via information memory not shown in detail in block diagram 1, so that the actually set frequency value is always displayed, with an addressed switchover between the MHz and kHz range is also carried out.

It is essential to the invention that all the data for the setting via a common data bus are fed to the information memory, but only the addressed information memory is set, so that few connecting lines between the function controllers to be controlled and the central computer unit must be present. This ultimately also leads to a reduction in the connection line in a telecommunications device. The addressing takes place in such a way that after or during the Output of the multi-bit information to the data bus directly to a further multi-bit information as an address Address decoder 9 is issued, which releases a certain line of the address bus 10 (Fig. 1). Only an output from the computer via the address decoder 9 is sent via this free line Strombe pulse switched through, the addressed Information memory for storing the multi-bit setting information activated

In Fig.2 it is emphasized that the output data of the infrared receiver after the preamplifier 3 are completely identical to the input data on the keyboard on device 1, and that this output data via a

ίο common input A are written into the microcomputer 5, whereby at least one additional input of the microcomputer can be kept free for other functions, for. B. Manual voting circuit.

A circuit diagram of the input keyboard on the device is shown in FIG. 3a, the various functions being controlled via the keys 30 with the matrix circuit. In the coding stage 31, the pending control commands are converted into a binary code (6-bit biphase code) and, after amplification, are output serially via output B , which is connected to input A of the microcomputer. The coding stage 31 is clocked by an oscillator 32.

The same module is also used in the remote control, where the output signal is fed to input C of the transmission stage shown in FIG. 3b with the infrared light-emitting diodes 34/35. As can be seen from FIG. 1, the transmitted and received pulses are amplified in a preamplifier 3 and then serially read into the computer as a direct command variable.

To illustrate the input commands and their coding, the following command list is intended for the Keyboard input on the device are used.

command code No. FLDCBA 0 000000 1 00000 1 2 0000 10 3 0000 1 1 4th 000 100 5 000 10 1 b 000 1 10 7th 000 1 1 1 8th 00 1000 q 00 100 1 10 0 0 10 10 11th 00101 1 12th 001100 13th 00110 1 14th 001110 15th 0 0 M 1 I. Ib 0 1 0 0 0 0 17th 0 10 0 0 1 18th 0 10 0 10 14th 0 I 0 0 I 1

button

command

la Off Ib Phono Ic Tape I. Id Tape 2 2a - tuning 2 B + Tuning 2c Contour 2d Linear 3a + Bass 3b -I- Treble 3c R balance 3d + Volume 4a - bass 4b - Treble 4c L balance 4d - volume 5a KM 5b K 5c M. 5d L.

Search

15th

To continue

command

No.

code

F i: OCBA button

command

20th
21
22nd
23
24
25th
26th
27

28
29

32

48
49
50
51
52
53
54
55
56
57
58
59

010100 010101 0 10110 010111 011000 0 11001 011010 011011

0 11100 011101

100,000

110000

110001

1 1001 0 1 1 001 '110 100 110101 Π 01 1 0 110 111 1 1 1 000 111001 1110 10 111011

6a Program »1« 6b Program »2« 6c Program »3« 6d Program »4« 7a Program »5« 7b Program »6« 7c Program »7« 7d Program »8« 8a Program »9« 8b (Zero) NULL "0" 81a Memory 85a Rumble "on" 85b Scratch "on" 85c Mono 85d Muling "on" 86a Rumble "off" 86b Scratch »Off« 86c stereo 86d Muting "off" 87a Manual voting 87b Volume low 87c comma 87d Decimal switching F

In Fig. 4 shows the alphanumeric display for the frequency setting, for which a 8-bit data bus to each of the alphanumeric displays the multi-bit information is placed, but only the Display is changed, which is activated via the address bus, including the address bus an address decoder is connected downstream, which controls the individual displays.

In Fig. 5 shows a DA converter for a sound adjuster, the multi-bit information being sent to the information memory 7 via the data bus, provided that this is addressed via the address input D. The information memory connects directly to a resistor matrix, at the output of which an analog voltage corresponding to the multi-bit information is applied, which is supplied as a manipulated variable to a differential amplifier 60, the differential voltage being supplied to the analog controller 61 as a setting voltage.

The advantages given by the invention lie in the linking and optimization of Software within the computer with the hardware of the control and functional circuit. The device furthermore, by optimally utilizing the inputs of the microcomputer, it is possible to select four stations different types:

1. Usual manual setting,

2. fast channel search,

3. Recall of stored stations and
4. direct numerical frequency entry,

there is a PLL frequency synthesis circuit for tuning was chosen, which enables a precise vote and z. B. additional AFC circuit and the like.

makes it superfluous from the start. By arranging the control and function circuit according to the The teaching of the invention is an economical use of a microcomputer for the operation of all Device functions given in a telecommunications device, as standard digital ICs and none complex environment circuits can be used. Furthermore, all mechanical components replaced by electronics, with only the keypad, which can also be designed as a sensor field

5 "> can, must be present.

When the arrangement is transferred to televisions, all that is required is to switch to another Divider ratio of the prescaler 40/41 or 16/17 necessary; the other functions can be used in the same way

μ way to be controlled.

In addition 5 sheets of drawings

Claims (16)

Patent claims: 1. Computer-controlled telecommunications device, in particular television, radio reception s and hi-fi control device, with control elements, such as buttons, sensors and / or actuators, arranged on the device and / or on a wireless or wired remote control that transmits signals, for controlling, on and off Switching between variable ι ο and fixed device functions, each control element being connected via a matrix circuit to a coding circuit which encodes the command in a specific code and sends it to a receiver circuit which stores the control command, converts it and connects it to the electrical function divider, characterized in that
that the coding circuit (4) is connected to the computer (5) via a single data line,
that the encoded instructions are read serially via a single input r in the computer (5),
that the decoding of the binary coded commands takes place according to certain programs written into the computer, that the multiple information output by the computer (5), each containing a control command, is fed via a data bus (6) to a number of information memories (7a to 7c, 13a, 136, 15, 16) (latch) corresponding to the functions to be controlled, w that the computer (5) sends an address multi-bit information to an address decoder (9), and
that via the address decoder (9) and a downstream address bus (10) to the addressed information memory ( Yes to 7c, 13a, 136, 15,16) a control pulse (strobe pulse) is sent, which the information memory (7a to 7c, 13a , 13i>, 15,16) for the purpose of storing the multi-bit setting information, which is entered into the information memory (7a to 7c, 13a, 13Z), 15, 16) and remains stored until a new, different digital, addressed multi-bit information item is applied, and that the multi-bit information stored in each information memory (7a to 7c, 13a, 136, 15, 16) is fed directly and / or indirectly to the electrical function controllers via digital analog converters, and that all multi-bit information and addresses are stored in parallel in a non-volatile, readable data memory (11), and that when the device is switched on, the data memory (11) is read by the computer (5) and all information is stored in the addressed information memory (Yes to 7c, 13a , t3b, 15,16. 2. Computer-controlled communications equipment according to claim 1, characterized in that that both the activation of the function keys or buttons on the remote control (2) commands issued as well as the commands when pressing the control buttons (1) on the device via each a matrix circuit each to a coding circuit (3, 4) of the same type are supplied, and that of the Coding circuit of the remote control transmitter (2) coded signals by wired or wireless means Ultrasound or infrared light carriers are transmitted, and that the received digital commands and the digital commands of the device-bound operating unit into one via a common data line single input of the computer (5) are read in serially, the decoding of the encoded Commands according to certain written programs by the computer (5) takes place 3. Computer-controlled communications device according to claim 1 or 2, characterized in that after the storage of the Mehrbitstellinformation in an addressed information memory (7a to 7c, 13a, i3b, 15,16) the computer (5) calculates a numerical value corresponding to the set function and converts this into a code determined by predetermined programming of the computer (5) for the purpose of alphanumeric display and writes it via the data bus (6) into an information memory (13a, b) also addressed by the computer (5), which has a visual display (LED display ), which displays the entered multi-bit information numerically or alphanumerically, which is proportional to the value of the set function 4. Computer-controlled telecommunications device according to one of the preceding claims, characterized in that the coding circuit is connected to a clocked transmitter stage which when pressing a function key to set a variable function (+ or -) the coded Command (word) is repeatedly issued in a specific cycle, the actuation time being proportional Number of individual words corresponds to the analog value to be set, and that the during the Actuation time pending words are evaluated by the computer r (5) as a setting, and that the computer (5) calculated a corresponding one from the number of adjacent words Multi-bit information via the data bus (6) as setting information and to the addressed information memory gives away 5. Computer-controlled communications equipment according to claim 4, characterized in that that each function key or each function organ has an address identifier in the form of a binary code is added, which also forms the control command. 6. Computer-controlled telecommunications device according to one of the preceding claims in Connection with an electronic station search with in upward and downward direction Voting, characterized in that the wave range to be set in the computer (5) is entered by pressing the appropriate function keys that in the computer (5) at Operation of further function keys (automatic search + or -) via a coding circuit (17) digital control commands are read in via free inputs, and that the computer (5) automatically enters Depending on the application of the digital control command, pulses are generated and these after a certain program counts in a predetermined counting grid, and that the one present at the output Multi-bit information proportional to the count via the data bus (6) into an addressed Information memory (15, 16) of a PLL frequency synthesis circuit for setting the division ratios a programmable divider (75, 76) of the circuit is read, and that in the predetermined division ratio divided frequency of a voltage-controlled oscillator (71,72) in an known way with a reference frequency in a phase comparison circuit (77) is compared, the generated DC voltage being the voltage-controlled oscillator (71, 72) readjusts until between the comparison frequencies Equality exists, and that when a worthy transmitter is found by the receiver circuit Depending on the transmitter level, a signal is input into the computer (5), which the The search is interrupted, and only when a new digital control command is received does the computer (5) triggers another search 7. Computer-controlled communications device according to claim 6, characterized in that that if a station search function key is pressed continuously to find a receiver that is worth receiving Transmitter the computer (5) interrupts the internal clock counting and automatically time-delayed again records 8. Computer-controlled nachrichtentcchnisches device according to claim 6 or 7, characterized in that when searching through all frequency ranges of the receiving device, the computer (5) switches the division ratio of the programmable divider (75, 76) of the frequency synthesis circuit upstream of the prescaler (74) according to a predetermined program, and that the corresponding multi-bit information is written into an addressed information memory assigned to the prescaler (74) via the data bus (6). 9. Computer-controlled communications equipment according to claim 8 in conjunction with claim 3, characterized in that the multi-bit information transmitted via the data bus (6) to the information memory (15,16) of the frequency synthesis circuit (18) is read in, in parallel or in series in the addressed Information storing a numeric display (23) is stored and displayed. 10. Computer-controlled telecommunications device according to claim 9, characterized in that that the computer (5) after a certain program after finding a receivable ended Transmitter the last output, the division ratio of the programmable divider (75, 76) determining multi-bit information directly or after conversion into another from the alphanumeric Visual display (23) processed code via the data bus (6) to the code assigned to the visual display (23) adressiertün gives information memory. U. Computer-controlled telecommunications device according to one of claims 7, 8 and 9, characterized in that the transmitter set by automatic tuning is stored in a program memory (RAM) of the computer (5) with the correspondingly displayed frequency by pressing special program keys, and that the stored frequency is read in as multi-bit information in the addressed information memories (15, 16) of the PLL frequency synthesis circuit (18) by calling it up using program selection buttons via the computer (5) and the data bus (6). 12. Computerized communications Device according to one of the preceding claims, characterized in that manual tuning is provided, which consists of a pulse generator (21) which, when the setting wheel (20) is actuated, a emits a number of pulses corresponding to the rotation, which are read serially into the computer (5), counted and converted by the computer (5) into a multi-bit information and via the data bus (6) into the addressed information memory of the PLL frequency synthesis circuit (18) are read. 13. Computer-controlled communications equipment according to claim 12, characterized in that that the adjusting wheel consists of a perforated disc with holes or slots arranged on the circumference is below which two diodes at 90 ° ίο arranged offset in relation to the breadboard which are illuminated by a light source arranged above the setting wheel, wherein the direction of rotation of the tuning wheel is signaled by the pulse train generated in the photodiodes which is read serially into the free input of the computer (5), which according to the Decoding determined direction of rotation of the setting wheel emits a multi-bit information that is stored in the information memory the PLL frequency synthesis circuit (18) is saved and a change in frequency in positive or negative direction of the last saved causes 14. Computer-controlled telecommunications device according to claim 13, characterized in that that the computer can be activated by pressing the function keys "Program selection" and "Reception area" is programmed for the digital frequency input and that the one to be set is via a numeric keypad Frequency can be read into the computer (5) via an encoder and that the multi-bit information output to the addressed information memory of the frequency synthesis circuit (18) stored therein and causes a change in the division ratio of the programmed frequency divider, provided the entered frequencies fall within the reception range that is selected and that one No display occurs if the set frequency is outside the programmed reception range lies 15. Computer-controlled telecommunications device according to one of the preceding claims, characterized in that the last set variable, optically or acoustically detectable function variable is stored in the data memory (RAM) belonging to the receiving area and that when switching to another receiving area, this value remains stored and when the Reception area is set to the last set value. 16. Computer-controlled communications equipment according to one of the preceding claims, characterized in that the multi-bit information for the individually adjustable variable, optical and / or acoustic device functions are fed to a digital analog converter, whose analog output information proportional to the set digital value corresponds to the controlled Adjusts the function divider to the desired value.