DE2733364A1 - SYSTEM FOR IDENTIFICATION OF OBJECTS - Google Patents

Description

PATEKTASWÄLTi:

mi. ing. il. NKGIiNJ) ANK <-iu73> · Inn.-ing. II. HAUCX · niPL.-rnYS. W. SCHMITZ L-jNG. Ii. GKxVALFS WIrJL-INO-W-WElINERT du'l-phy8. W. CARSTENS

HAMBURG-MUNICH - "

ZCSTÜlI-UXOSANSCnHIFT: 2OOO HAMBUKG £ 6 · NEW «WALL 41 _Ι11ΜΟ * (O4O) 36 74 28 AND 36 41 IS

TEI.EQH.

KILO CORPORATION ^8OO ° Munich 2 mozaotstr. ss

55Ο ¥. Fort Street tblkfok ωββι β se 03 se

TKLBOH. NEOXDAPATSNT HtNGIIR Detroit, Michigan 48226 HAMBURG. July 19, 1977

Identification system of objects

The present invention relates to a system for the identification of an object from a distance and is an additional patent -to the patent ·. · (Patent application 2 636 4i4). The inventive remote identification system is suitable for identifying any object that carries a transponder or transmitter of the type disclosed here in a position so that the transponder is in infrared light communication with an interrogator or interrogator. A particularly useful application of the remote identification system according to the oex invention is the identification of motor vehicles when they enter or leave a parking facility so that their entry and exit can be recorded and their identity checked against a list of registered vehicles. The system according to the invention switches the otherwise usual and necessary in an advantageous manner

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Stopping the vehicles to obtain a ticket or using another authorization device, such as a machine readable card.

To date, there are many systems for the remote identification of objects · Generally these systems can be divided into two main classes, namely 1) systems with passive devices and 2) systems with active devices. The systems with passive devices can use tags or use other structures on the object which can be read or which cooperate with an interrogator to generate an identification code «In general and devices for reading indicia such as Pattern recognition systems are costly and complex, and consequently they are unsuitable for many uses, in which the identification of an object without human intervention is desired «Passive reading devices, such as those with facilities that oppose either ultrasonic vibrations or high frequency electromagnetic waves resonant are, have the disadvantage that they have to keep a large number of different passive structures as well require a very precise manufacture of the passive devices Furthermore, the number of special codings is limited can be economically stored or transferred within the available time.

Active object identification systems can be divided into the following categories: 1 * Electromagnetic high frequency systems, 2 «systems using light and 3 · systems

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using an electromagnetic field * The high frequency devices have the disadvantage that they have to comply with the legal and postal regulations, they are also sensitive to radio frequency interference. This susceptibility to interference, as well as the requirement for selectivity, dictates the use of highly sensitive directional receiving and transmitting antennas. The magnetic field devices are difficult to start up due to the shielding effect of the steel bodies of automobiles and the presence of highly variable magnetic interference fields generated by generators and other devices that assigned to the vehicle go out.

The identification system according to the invention avoids numerous the difficulties encountered with known identification systems, due to the use of novel optical and electronic structures and processes. The transponder of the article identification system according to the invention can be a year without a refresher

Working long hours does not require any operation from the person wearing the transponder for sending out the identification code, is spatially small, i.e. it is about the size of a cigarette packet, so that it can also be used with many smaller objects and is able to provide information quickly enough to transmit so that, for example, a binary number of 18 bits from an interrogator at a fixed location several times can be received while the item is on. past the place of the interrogator at a speed of about

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Moved 100 km per hour, so that even at high speeds • is given in redundant queries.

As already stated, the remote identification system of the invention is particularly applicable as a device for identifying vehicles as they enter or leave parking facilities. A wide variety of methods are currently used to identify vehicles as they enter parking facilities. Such a system consists in providing each registered vehicle with a label or sticker that can be checked by a guard at the parking facility. This system for identifying vehicles has the advantage that the driver does not drive the vehicle when entering the parking facility needs to stop, however, has the major disadvantage that it requires the employment and constant attention of a parking attendant. This system is therefore subject to human error and the inattentiveness or insincerity of the parking attendant, so that unauthorized vehicles or vehicles with an expired license

entry can be permitted. Another, economically used system uses magnetic cards which the driver must insert into a slot in an outdoor receiver at the entrance to the parking facility. The driver has to stop his vehicle, which leads to a slowdown in the speed of entry of the vehicle into the parking facility and causes discomfort for the driver. The slow driving speed complicates the provision for traffic at the entrance to the parking facility and often requires additional entrances for the parking facility in order to cope with the slow entry speed.

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to compensate. As a result, the cost of the parking facility is increased.

The article identification system according to the invention has at Use to identify vehicles when entering a parking facility has the significant advantage that it is fast and allows accurate identification of vehicles without the need to employ a guard at each entrance or stop any vehicle at the entrance would be required. As a result, the vehicle can travel at a relatively high speed, for example Drive into the parking facility up to 50 km per hour. aside from that this system creates a high level of convenience for the user. Furthermore, in the system according to the invention Digital code used automatic parking monitoring, computation and verification by computers, as well as monitoring of the vehicle stock by computer · Ee can, for example, the digital code of the vehicle entering the parking facility indicates a computer for automatic comparison with a list in its memory for registered vehicles Timing as well as recording the vehicle entry and exit data are fed to an accurate and high degree to ensure reliable control over access to the parking facility, the vehicle inventory and the calculation.

In the preferred embodiment, the inventive article identification system has a transponder carried by the object to be identified and an interrogator, which can be in a fixed position and has visual contact with the transponder. Preferred are transponders and

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Interrogator able to generate light pulses, such as infrared light pulses to determine or to send. The transponder is provided with a memory that stores a digital code, which only identifies the object that carries the transponder. In the preferred embodiment, the memory is des Transponder is a rotating shift register that is programmed with the digital code. The code used is specifically about this designed to form an optimal number of possible combinations for a given word size while allowing is maintained to distinguish each particular word when transmitted in a repeating sequence of bits will. In order to avoid the need for an internal clock in the transponder and the difficulty of making the circuitry To synchronize the transponder and the interrogator with each other, the transponder is removed from the Clocked distance. This is achieved in that an interrogator is provided which a sequence of light pulses in emits a clock frequency which is determined by a clock generator arranged in the interrogator or an associated controller is, and which is received by the transponder, as well as by measures in the transponder, these light pulses in electrical Convert clock pulses. The electrical clock pulses are sent to the clock terminal of the recirculating shift register of the Transponders delivered. Thus provides the circulating or recirculating Shift register when emitting light pulses by the interrogator successively those stored therein Identification code on the output port, The output port of the recirculating shift register of the transponder is with

/ 07 0

connected to a circuit which activates an infrared light emitting device so that the code is transmitted to the interrogator. In the preferred embodiment, the transponder inserts a delay between the reception of the interrogation pulses and the emission of the corresponding transponder pulse, so that the transponder pulses can be differentiated in time from the reflected interrogator or interrogation pulses. Clocking from a distance also provides an advantageous option to distinguish whether the pulses were validly transmitted by a transponder and differentiate them from pulses received by other, non-associated infrared signals. In addition, the remote clocking is used to closely monitor the time delay caused by the transponder, whereby the interrogator in the ability to determine whether the power supply in the transponder needs to be renewed is displaced.

Further novel and advantageous features in the erfindungsgemäJßen article identification system in conjunction with the detailed description of the preferred execution ί or- ■ df! 'Tin' eh.

. \ ; t:: . View of the object according to the invention! ; f. · .. ι, ssystens, which is used in the exemplary Axu-enäimg ± n Fig. 1 to identify motor vehicles that are entering or leaving a parking lot;

, .. / 8 BAO ORIGINAL

The figures are further views of the transponder when it is arranged on the surface of the dashboard of a motor vehicle, scijfie the interrogator shown in Fig. 1}

Pig 3 is a general block diagram of the item identification system of the present invention}

Fig ^ h is a block diagram of the transponder according to the present invention}

Fig. 5 is a signal diagram showing various signals used in the transponder of Fig. K }

Fig. 6 is an example of the position of the binary code in the recirculating shift register of the Transponder according to Fig. 4}

Figure 7a is a circuit diagram of one embodiment

of the transponder according to the present invention}

Fig. 7b is a scarf tungsdi agramtn, which is another Execution of the transponder according to Fig. 7 shows}

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Fig. 7c is a circuit of a third embodiment the transponder according to the present invention;

8 is a block diagram of the interrogator of FIG of the present invention}

-DIO figures are diagrams of the circuit of Interro-9a and 9b _ga tors _f shown in Fig. 8}

Figure 9c is a circuit diagram of an alternative preamplifier design for that of Figure 9b. shown interrogator}

Fig. 10 is a graph showing the ambiguous pulse area of the interrogator}

Figure 11 is a general block diagram of the controller according to the present invention}

11a is a more detailed block diagram of a portion of the controller shown in FIG Fig. 11 is shown}

Fig. 12 is a circuit diagram of the trancponder program - rors shown in Fig. 11a} and

Fig. 13 is a view of the control device embodying the

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Front panel controls shows.

In FIG. 1, the object identification system according to the invention is shown in an exemplary application for identifying vehicles that are entering a parking facility. The system 10 has a transponder 12, which is preferably arranged on the dashboard of the vehicle, and an interrogator i4, which is arranged in a fixed position above the entrance to the parking facility. The transponder 12 and the interrogator 14 are in mutual optical connection. The interrogator 1h can be operated continuously so that it detects and identifies every transponder in its field of view, or it can be activated by a conventional motor vehicle detector, as shown at 11. It should be noted that the interrogator 14 and the transponder 12 have overlapping transmission and reception fields, the transmission and reception field of the transponder being marked with the dash-dotted border, which represents a conical volume, and the field of the interrogator with the dash-dotted lines which roughly enclose a pyramid-shaped space. When the interrogator comes into contact with a permitted transponder 12, the gate 17 opens for parking.

In Figures 2a and 2b, the relative position of the trans-

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ponders 12 to the interrogator lh shown both from the front and from the side. In these figures, the overlap of the transmission and reception fields of transponder 12 and interrogator 1U can easily be recognized.

3 shows a block diagram of the article identification system 10 according to the invention. The system 10 has the transponder 12, the interrogator lk _t, an optional read-out device 13, the control device 16 which controls the gate 15, and the read-out device 18, as shown in FIG. The transponder 12 is usually in the receive-only position and is activated for the transmission position when infrared light pulses are received, as shown for example at 20. The transponder 12 is designed to sequentially emit a coded set of pulses, e.g. a repeated word containing eighteen binary bits, along a light beam, e.g. The interrogator 11 continuously delivers interrogation pulses, which are designated by 20, and receives the transponder pulses 22 when a transponder 12 is within the interrogation field of the interrogator 14. The interrogator decodes the transponder information and supplies a signal on line 2k to the control device 10 which is representative of the coded number which is transmitted by the transponder 12. In addition, the decoded information can be shown optically in a read-out device 13. The controller 16 for its part

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compares the coded number with a list of permitted numbers contained in the memory and delivers a suitable output signal on line 26 to the reading device 18, which visually indicates the present status of the motor vehicle or the identified object. In addition, the controller 16 automatically opens the gate 15 and allows the vehicle to enter if the controller determines that the identified vehicle is required to enter the Parking garage is authorized.

The interrogator is preferably equipped with a suitable optical or LED arrangement-scattering system, so that the light pulses transmitted by the interrogator 14 are limited to a predetermined area through which the objects carrying the transponder 12 pass. In the example according to FIG. 1, this area is the entrance to a parking garage directly in front of the entrance gate 15, which allows the vehicle to enter. In the preferred embodiment, the interrogator Ik is equipped with an optical diffusion system which has a cylindrical Fresnel lens which is arranged with its axis transverse to the plane of the entrance to the parking facility. The query field resulting therefrom is approximately that shown in FIG. 1. In particular, the field of view is limited in the vertical direction and very wide in the horizontal direction. In this way, the entire width of the driveway is monitored, which is important because not every vehicle drives in the middle of the driveway and the transponders 12 in the vehicles are different at different locations

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where dashboards are attached. In addition, the interrogator 1Ί is offset by an angle of about U ^ from the vertical, as shown, so that the interrogator pulses are less likely to be reflected by the windshields of the approaching vehicles) a situation that could result if the angle at which the Infrared light hits the windshield is small enough.

The interrogator's optical system should also be designed to receive returning infrared pulses from the same area. Therefore, the highly directional nature of the optics of the interrogator "Ml" can provide a common and very accurate device for receiving responses from a transponder 12 located within a selected illuminated detection space. Thus, the detector 50 is equipped with a cylindrically-shaped lens ,

same
the etva a / Go field of view captured like the cylindrical Ft-i »;; iio1-

Zer :; t regret? 1 into the e.

The interrogator 14 repeatedly emits infrared pulses a constant frequency generated by dtsn transponder 12 within des Abf T- ^ u r »j j rooms 3 are received. In speech The transponder 12 emits intcrrogator pulses on dfc £ € IhH> ulse, which represent the code. Dor code is in Airür form before, so that after receiving mg iodine impulse over the wave ? 0 the transponder 12 emits a pulse for the purpose of communication

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a binary one, - or no pulse emitted to represent a binary zero. The interrogator ik is designed to receive a transponder pulse after a predetermined time has elapsed after the emission of its own pulse, so that it can distinguish between binary ones and binary zeros. This pulsed operation is repeated at a high repetition rate, for example 7 kHz.

Although the code stored in the transponder 12 has a logical start point and a logical end point, the code transmitted to the interrogator i4 can be started at any point including the points between the logical start point and the logical end point. However, since the code is repeated several times during a single interrogation of the transponder 12 by the interrogator lh and the code in the transponder 12 is selected so that the logical starting point can be identified, any point at the start of operation can be accepted.

FIG. K shows a block diagram of a transponder 12 according to the invention. The transponder 12 is characterized in that it consumes extremely little energy and has low manufacturing costs, as will become clear to a person skilled in the art from the following description. In particular, the transponder 12 can work with a conventional 9 volt battery for up to twelve months. The energy consumption

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at rest is 0.5 - 0.72 mW with a quiescent current from the battery between 50 and 80 χ / Α. The transponder 12 has a detector 30, which preferably consists of a phototransistor 30. A phototransistor would be preferred to the more sensitive photodiode, which thus appears to be cheaper, because it is cheaper Emitter is grounded through load resistor R-2. The emitter is also connected to the positive input of a high pass amplifier 3 ² via a coupling capacitor C-1, which effectively suppresses sunlight and a 50 or 60 Hz hum caused by light sources operating at 50 or 60 Hz. The high-pass amplifier 32 compensates for the low sensitivity of the phototransistor 30 and provides a signal at the output.

The output of the high-pass amplifier 32 is fed to a high Q active filter 3 ^ which is tuned to the fundamental frequency of the interrogator pulses. The tuned resonant band-length characteristic of the active filter 3 ^ effectively distinguishes interrogator pulses from other extraneous infrared pulses and electronic noise in a manner which will now be described. The output of the active filter "} h is connected to a Schmitt trigger 36, which in turn generates a right-wing output which is then set in motion when

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the output of the active filter Jk exceeds a preselected threshold which ends when the output of the active filter falls below zero. Accordingly, at the output of the Schmitt trigger 36 there is a series of square-wave pulses which are suitable for supplying a conventional integrated logic circuit.

The output of the Schmitt trigger 36 leads to the clock input of an eighteen-bit shift register 38 and a one-shot or univibrator kO recirculating shift register 38 is stored. In particular, the recirculating shift register 38 is programmed to provide a pulse when a logic one is stored in the next position in the register and not to provide a pulse when a logic zero is stored in the next position in the register. Both the recirculating shift register 38 and the one-shot kO 'respond to the falling edge of the pulses from the Schmitt trigger 36, so that the addressing of the recirculating shift register 38 and the one-shot kO through the duration of the pulses from the Schmitt trigger 36 can be delayed relative to the reception of an interrogator pulse at the phototransistor 30. The impulses from the one-shot knockout lead to a

- ¹ W.

Light-emitting diode LED 42, which is in visual contact with the interrogator "\ k , so that the interrogator 14 the

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Output pulses of the transponder 12, which are transmitted via the LED kZ , receives.

Referring to Fig. 5, the operation of the transponder 12 will now be explained. In Fig. 5, the output pulses from detector 30 are shown as modified square-wave pulses of constant frequency. The second row represents the output signals from the active filter Jk obtained from the amplified output signal from the detector 30. It should be noted that the output signal from the active filter Jh initially has a small amplitude which slowly increases as energy subsequently reaches the input of the active filter 34 at the tuned frequency. This is due to the bandpass resonance characteristic of the active filter 3 ^, which enables the resonant build-up of pulse amplitudes when pulses of the resonant bandpass frequency are received at the input of the active filter 3h . After receiving a sufficient number of pulses in the resonant bandpass frequency, the active filter reaches an amplitude which is sufficient to activate the Schmitt trigger j6. The output signal of the Schmitt trigger "} 6 is shown in the following line. As can be seen, square-wave pulses are triggered after the fourth interrogator pulse received. In the fourth line of FIG. 5, the output of the one-shot 40 is shown as a row of square-wave pulses triggered by the falling edge of the output from the Schmitt trigger It should be noted that the output pulses from the one-shot 40 are relative to the start of the output pulses

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from detector 30 are delayed by the duration of the positive pulses from Schmitt trigger 36. Since the pulses from Schmitt trigger 36 in turn depend on the signal amplitude from active filter Jh , the delay time can vary somewhat, but the differences are not sufficient to affect the operation of the system 10. This delay is selected so that the pulses from the one-shot ko, which deliver output pulses emitted by the LED k2, lie between the output pulses from the interrogator 14.

Referring to Fig. 6, the operation of the recirculating shift register 38 will be explained in general terms. The binary code contained in the recirculating shift register 38 can be regarded as having arranged its bits in the shape of a circle as shown in FIG. An arrow kk indicates the optional starting point for the circulation of the pulses through the circulating shift register 38. It should be noted that the arrow is located at a shift register location that has a binary zero. When an interrogator pulse is received by the transponder, the arrow is pushed to the next position in the clockwise direction, as indicated by the arrow k6. If the next digit contains a binary one, as shown, the recirculating shift register 38 supplies an output to the one-shot bO, which in turn generates an output pulse to the transponder 12. Every time

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when the recirculating shift register 38 is switched one step further to the next position, the transponder 12 either delivers an output pulse, Tails the next digit has a binary bins, or no output pulse, if the next digit has a binary zero. The starting position of the pulses in the shift register before an interrogator pulse is received is not determined * The starting point, for example the position of the arrow kk, can be any position in the shift register. When the transponder 12 receives impulses from the interrogator 1 k , the position of the impulses is shifted further in a circle is described.

In Fig. Yes is a schematic representation of the transponder 12 is shown. The factors that dictate the structure are as follows:

1. low energy consumption or long battery operation,

2. low cost,

3. high processing speeds, and Ί. small size.

As noted above, the cost consideration makes it desirable to use a phototransistor 30 in place of the more sensitive but more expensive photodiode. However he

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additionally requires the use of a phototransistor

a high pass amplifier 32 whose high gain compensates for the lack of sensitivity of the phototransistor. In addition, the active filter Jh is preferably a high Q filter so that the increased noise from the phototransistor 30 is filtered out.

The transponder 12 is also equipped with an optical filter 28 which is arranged over the phototransistor 30, the light energy received by the phototransistor 30 to be limited to the infrared range. The phototransistor 30 requires a separate bias voltage provided by resistors R-1 and R-2 applied to the base and emitter of the phototransistor 30 are connected. The collector of the phototransistor 3 ° is biased at 9 volts tied together. The values of R-1 and R-2 are selected so that that the phototransistor 30 receives a bias with the he works in the linear domain. Resistor R-2 is selected to have a value low enough so that the phototransistor 30 does not operate in the saturation range during high ambient light intensities, but does not so low that power consumption is adversely affected. In this way the voltage depends on the emitter of the Phototransistor 30 directly from the amplitude of the incident light.

The emitter is also connected through the coupling capacitor C-I

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the negative input (pin 2) of a high-pass amplifier 32 is connected. The AC coupling created by C-1 blocks low frequency noise and decouples constant light sources, such as sunlight. The positive input (pin 3) of the high pass amplifier 32 is connected to a voltage divider network consisting of the series resistors R-3 and R-4, and the capacitor C-2. This network supplies a direct voltage value of h volts for the positive input of the high-pass amplifier in order to accommodate the alternating current signals, which oscillate from 0 to 9 volts «

The four operational amplifiers used in the transponder 12 are all counteractive conductance amplifiers (transconductance amplifiersX in which the output current is proportional to the difference in the input voltages. A suitable operational amplifier of this type is manufactured by RCA with the designation CA 3094. The current through the programmable input ( pin 5) this amplifier controls its sensitivity, inertia and power supply.A very low program current (e.g. 3M A) is used in all four amplifiers to provide low power consumption · This is determined by resistor R-9 which is the operating power controls for the first three stages.

The output of amplifier 32 (pin 6) becomes negative Input (pin 2) fed back through the feedback resistor R-5 to prevent the amplifier 32 from saturating. The output of pin 6 is also connected to earth through the setting

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resistance R-6 and at the positive input (pin 3) of the active filter Jk. The active filter Jk is in the second stage of the circuit instead of the first in order to avoid a continuous change in the input resistance of the phototransistor 30, which could lead to instabilities of the active filter Jk

The output of the active filter Jk (pin 6) is fed back to its negative input (pin 2) through a multiple feedback network consisting of resistors R-7 and R-8 and capacitors C-3 and Ck . The feedback network is used to tune the active filter Jk to the frequency of the interrogator pulses. Thus, when the filter Jk begins to oscillate in response to the initial pulses received by the interrogator ik , successive pulses amplify the previous oscillations of the filter 3 ^ »until the magnitude of the output signal from the filter Jk is sufficient to close the Schmitt trigger j6 activate as graphically shown in the pulse trains in FIG. In this way, it can be seen that the present transponder system avoids a major problem affecting other transponder systems. This problem is that the transponder output signals are picked up by the input detector 30, which can cause false triggering or instability. In the present system, the combination of the external interrogator pulses and the transponder response pulses results in an overall frequency that

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Double that of the interrogator pulse β alone is and

is thus twice as high a frequency / as the old that that active filter "} k is tuned. Thus, signals are effectively ignored by the active filter Jh , since pulses received at other than the tuning frequency coine amplifying oscillations in the active filter 3h that are necessary to trigger the Schmitt trigger 36 to activate.

The output of the active filter 34 (pin 6) is connected to ground through the setting resistor R-10 with the negative input (pin 3) of the Schmitt trigger 36. It should be noted that the signals at the inputs to the first and third stage of the transponder circuit are inverted. This is because low power circuits of this type necessarily require the use of high impedance components throughout. These components are of course easily exposed to external interference. Feedback between stages is also a very serious problem that can lead to various types of switching instabilities. In order to keep these effects as small as possible, the phase change in the present circuit is carefully controlled so that the stages that draw the most current, especially the Schmitt trigger and the one-shot, kO _t with the more sensitive input stages, especially the High pass amplifier J2 and the active filter 3h are out of phase. The structure thus provides a switching

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tung that no instability between the individual stages has _t even if the components are arranged on the circuit board in high density.

Positive feedback from the output (pin 8) of Schmitt trigger 36 is provided to input pin 2 through resistor R-13 and capacitor C-7. Pin 8 is also ait connected to the plus 9 volt voltage through the setting resistor R-i4. Pin 2 is also connected to the center connection a voltage divider made up of resistors R-11 and R-12 is connected. In the idle state, the output of the Schmitt triggers 36 through the resistor network R-II, R-12 and R-13 and has a value of about 9 volts. If the signal at pin 3 exceeds the voltage level from Resistor network is generated, the output on pin 8 drops to zero. The voltage on pin 2 drops equally if the resistors R-12 and R-I3 ground the potential at pin 2. The output on pin 8 does not return to the original 9 volts until the input on pin 3 falls below the lower bias value that is now on pin 2. Thus becomes a zero cross square wave signal is generated at the output of the Schmitt trigger 36, as shown in line 3 in FIG is. Resistor C-7 in the feedback circuit provides a fast switching response, which generates a sharp square-wave output «

The capacitor C-5 and the resistor R-15 differentiate the square wave output from Schmitt trigger 36 to generate

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generation of peaks which are capacitive through the capacitor C-6 to the positive input (pin 2) of a one-shot or univibrator Uo are connected * The signal on pin 2 is biased to a level determined by the voltage divider is determined, which consists of the resistors R-16 and R-17.

The output of pin 8 of the Schmitt trigger j6 is also at the clock input (pin 3) of the recirculating shift register 38. As explained above, the shift register 38 is precoded with an 18-bit binary number that specifically identifies the respective transponder. When pulses from Schmitt trigger 36 clock the shift register, the 18 bits circulate, as has been described with reference to FIG. 6, so that successive bits are presented at the output on pin 9. It should be noted that the output from the shift register 38 is also connected to the input (pin 1) of the register 38 via the feedback resistor R-19, so that the encoded binary number is stored again in the shift register 38 at the same time as it was ■ is issued. A new number can be stored in the shift register 38 in that "it is applied to pin 1 and this new number is forced into the input during the clocking. This will be explained in detail later.

As far as the one-shot kO is concerned, it should be noted that the k volts

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DC voltage, which is generated by the voltage divider from the resistors R-3 and RU and the capacitor CZ, is applied directly to the negative input (pin 3) of the One-Shot ^ O. If there is a negative peak on pin 2 and crosses the bias level applied to pin 3, the ono-shot conducts current through the LED k2 for a period of about 10 microseconds. However, the one-shot kO at pin 5 is gated by the shift register 38 in such a way that an LED pulse is only delivered when the output of the shift register 38 is a binary one. If the bit output from the shift register 38 supplies a binary zero, no pulse is generated by the one-shot kO and thus no pulse is emitted by the LED h2. It should be noted that the diode D-1, which is parallel to the resistor R-I8 between pin 5 of the one-shot kO and the output (pin 9) of the shift register 38 »helps to eliminate parasitic capacitances, which ensures fast switching will.

A further embodiment of the first stage of the transponder 12 is shown in FIG. 7b. The primary motivation for employing this structure is to keep the quiescent current from the battery to the transponder 12 poring when the phototransistor 30 is exposed to direct sunlight. In particular, it should be noted that in the embodiment shown in Fig. Ja the battery is connected directly via the phototransistor 30 and the resistor R-2 W ¹ Td 'ITtVf in other words, a direct one

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Power connection is given through resistor R-2 between + 9 volts and ground as soon as phototransistor 30 becomes conductive through incident light. Accordingly, any activation of the phototransistor 30 causes a current drain of the battery of the transponder 12. Thus, it can be seen that in the event that the phototransistor 30 is in this embodiment of the transponder 12, which is shown in Fig. 7a is continuously exposed to direct sunlight, the battery of the transponder 12 is unnecessarily burdened will.

The embodiment shown in Fig. 7b improves the situation in that the phototransistor 30 is so connected becomes that it acts as a photodiode. In particular, the base of the phototransistor 30 is connected to 9 volts and the Collector through capacitor C-30 to the base of a transistor 198 connected. However, the emitter of phototransistor 30 is not grounded, as in that described in Figure 7a Execution carried out. This way is the only one current caused by the phototransistor 30 is the base-collector current (i.).

The +9 volt bias is also applied to the collector of the phototransistor 30 through resistor R-60, at the base of the Transistor 198 through resistor R-61, and directly at the emitter of transistor 198. The collector of the transistor is connected to the base of another transistor 199,

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grounded through resistor R-63, and fed back to the base of transistor 198 through feedback resistor R-62. The transistor 199 is likewise connected with its emitter to +9 volts via the resistor R-64 and with its collector grounded.

With this, as described, modified circuit, the Phototransistor 30 also as a variable resistor, where the voltage at its collector depends on the strength of the incident light. However, the quiescent current is from The battery, if the phototransistor 30 is exposed to direct sunlight, is significantly reduced, since a direct one Power connection no longer through phototransistor 30 to earth is provided. In addition, changes in the magnitude of the output voltage from phototransistor 30 caused by Irradiation caused by sunlight will render transistor 198 non-conductive due to the DC blocking which is formed by the capacitor C-30. Thus, the energy stored in the battery is canceled.

However, by using the base-collector current (i.) Of the phototransistor 30 instead of the collector-emitter current (i), the gain of the phototransistor 30 is lost. Accordingly, a transistor amplifier 198 is included, to restore the magnitude of the signal from phototransistor 30. However, as is known to those skilled in the art of electronics, the high gain provided by transistor 198 also causes one

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high output impedance. Therefore, the transistor 199 is iw an output follower arrangement connected to the impedance to adapt, whereby essentially no gain is achieved, but a signal output of low impedance is wrong the high pass filter 32

A problem that can cause binary numbers from the output of the shift register 38 to be lost and thus cause the wrong code to be transmitted is a sluggish clock pulse from the Schmitt trigger J6. In the embodiment shown in FIG. 7a, the rise time of a clock pulse from the Schmitt trigger 36 is approximately 5 microseconds, in particular due to the value of the setting resistor R-1 k. In order to reduce the rise time and reduce the possibility of occurrence of inert clock pulses of Vert of the resistance would have reduced h R-1 · However, increasing, decreasing the value of resistor R 1 k is the current draw, which naturally limited due to the predetermined power supply is undesirable. Accordingly, another solution must be chosen.

In order to improve the accuracy of the clock and thereby the Operational reliability of the triggering of the shift register 38 can be achieved by a further embodiment of the transponder 12, which is shown in FIG. 7c is shown to be used .. The one shown in Tig. Tc «Large-

The set up essentially uses a pair of D-type flip-flops 252 and 25k instead of the Schmitt operational amplifier

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Triggers 36 and the gated one-shot 40, which are used in the embodiment shown in FIG. 7a. The flip-flops 252 and 25k are CMOS types that have a rise and fall time of 100 nanoseconds. The current draw is in the range of nanoampere.

In the embodiment shown in FIG. 7c, the output from the active filter Jk is alternately coupled to the base of a transistor 250 via a capacitor C-33. The base of transistor 250 is also connected to the anode of a diode D-3t whose cathode is grounded. The collector of the transistor 250 is connected to B + via a resistor R-70 and to the clock input of the flip-flop 252, the emitter is grounded. The emitter and base diode of transistor 250 serve as a "half-wave" current source for transistor 250. The data input (D) of flip-flop 252 is connected to B + and the Q output is connected to the reset terminal (κ) through a time delay network formed by resistor R-71 and capacitor C-31. Another diode D-4 is connected to the junction of resistor R-71 and capacitor C-31 and is grounded so that the full delay time is only effective in one direction.

The Q output from flip-flop 252 is at the clock input terminal (pin 3) of the shift register 38 and at the clock input of the flip-flop 254, the output connection (pin 9) of the shift register 38 is at the data input (D) of the flip-flop 254.

709886/0704

The Q output of flip-flop 2 $ k is connected to its reset terminal (r) through a time delay network consisting of resistor R-72 and capacitor C-32. Diode D-5 is also between the common point of the time delay network and ground and has the same function as Diode DU.

The Q output of the flip-flop 25 ^ operates an LED supply

transmission network 260 comprising a pair of transistors 256 and 258. The base of the transistor 256 is connected to the output of the flip-flop Z ^ h via a resistor R-73, the collector is grounded. The emitter of transistor 256 is connected to B + through a resistor R-7 ^ »and to the base of transistor 258. The emitter of transistor 258 is also connected to B + and the collector is grounded through LED k2 and a resistor R-75 . The LED driver circuit 2 ^ O provides a relatively constant power source for the LED h2 regardless of changes in the battery supply voltage. Accordingly, the intensities of the pulses emitted by the LED h2 are the same over a wider range of supply voltages.

During operation, the transistor 250 ignites when the output signal from the active filter 3h exceeds the cut-in voltage of the transistor 250, as a result of which a relatively steep clock signal is supplied to the flip-flop 252. When clocked, the flip-flop 252 provides a strong and unique

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Clock or clock pulse to the shift register 38. However, since both the shift register 38 and the flip-flops 252 and 25k are clocked by the trailing edge of a positive pulse, the shift register 38 shifts, as shown in the associated timing diagram, as long as until flip-flop 252 is reset or reset after a time delay ti determined by resistor R-71 and capacitor C-31. After resetting the flip-flop 252 the flip-flop is also clocked 2 $ k. However, the Q-

high or H output of the flip-flop 2 ^ k not / until a logical one is also formed at the data input (D) of the shift register 38. If both conditions are met, the Q output of the flip-flop 2 ^ k H for a period of time t2, which is determined by the resistor R-72 and the capacitor C-32 is, whereby the driver circuit 260 turns on the LED k2 for a corresponding period of time. If a logic zero is present at the output of the shift register 38 when flip-flop is clocked 25k , the Q output of the flip-flop remains low or L,

/ and driver circuit 260 is not supplying power

the LED k2. Accordingly, it can be seen that the LED k2 lights up only when there is a logical one at the output of the shift register 38. It should also be noted that the time delay between the clocking of the flip-flop 252 and the clocking of the shift register 38 ensures that the from the transponder 12 emitted pulses are inserted in a suitable Veise between the reception of the interrogator pulses.

In Fig. 8, the interrogator i4 is shown in a block diagram.

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Dor interrogator 14 has a lens 48 to the received To focus pulses from the transponder 12 on the detector 50. A filter 52 is between lens 48 and detector 50 inserted in order to limit the transmission of light to the infrared band. For example, this can Filter 52 only allow light with a wavelength greater than 9500 A to pass. And the detector 50 is designed to to respond to light energy that has a wavelength of less than 9700 A. Accordingly, the filter limits 52, which is operated together with the detector 50, the Response of the interrogator 14 to light with a wave

o β
length between 9500 A and 9700 A. The output of the detector 50 is picked up by a preamplifier 54 which, as will be explained below, serves as a high pass filter. This low frequency filter eliminates the effects of sunlight or 50 Hz or 60 Hz hum. The output of the preamplifier $ k shows pulses as shown in the figure and contains large signals representative of the reflected interrogator pulses and a much smaller signal representative of the received transponder pulses. The signal from the preamplifier 5 ^ is picked up by a fade-out circuit 56, which also fades out pulses, as shown, to a suitable

around

Time receives / the signals that the reflected interrogator pulses show, hide. This masking operation is of course not quite perfect, which makes it small trailing flanks or "glitches", as is the case in the Figure is shown. The signal from the fade-out circuit

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is provided to summing point 58 via direct signal connection 16 and via delayed and inverted signal connection 62. The delayed and inverted connection 62 has a delay line 6h and an inverter 66. Assuming that the signal from the masking circuit 56 is superimposed at a low frequency, as can be caused, for example, by a stepwise change in the background level of the radiation, the signal appears on the direct connection i6, as shown in the figure, as a gradually decreasing signal on which the transponder pulses are superimposed, while the signal through the delayed and inverted connection 62 appears as a gradually increasing signal on which the inverted transponder pulses are superimposed · It is note that the delayed and inverted signals gradually rise in the same manner and by the same amount as the falling portion of the direct signal. It should also be noted that the delay period of the signal through the delayed and inverted connection 62 is selected to be approximately equal to the duration of a transponder pulse. The signal from summing point 58 represents the sum of the signals through direct connection 60 and delayed and inverted connection 62. The resulting signal therefore appears as combined square waves, with one square wave being positive and the subsequent square wave being negative. The square waves * are connected to one another due to the time delay through the delay line 6 * 1, which is essentially equal to the duration of a transmission

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ponderimpulsos is. Thus, how to remove the summation can see only the unwanted low-frequency background noise and not the desired information from the transponder 12. It should be noted that the subtraction of the Low-frequency background noise in the present system is essentially compensated in the real-time method when the signals are sampled. In this way the present system avoids to a large extent the disadvantages

the

which are inherent in the system in which the / signal and the background are sampled at different times and then subtracted from each other. In the latter system, the background now varies so that an inaccuracy is introduced into the background compensation. An integrating circuit 6o receives the connected square waves and provides an integration at the output to provide a signal which is triangular in shape as shown. In particular, the integration gives an increasing rising signal during the duration of the first square wave and a falling oblique signal during the duration of the second or inverted square wave. Since the two rectangular waves enclose essentially the same area, the signal from the integrator rises essentially linearly to a given value and then falls essentially linearly to the original value of the signal. It should be noted that the connected square waves can be superimposed by a high-frequency plane. The function of integration is os _f this Hochfrequenzrauschcn to remove from the signal. In accordance with this it can be seen that the combination of the summation

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of the delayed and inverted signals with the original signal and the integration of the summation result is highly effective in removing both the LF noise and the RF noise from the signal.

The integrated signal is provided through an AC coupling capacitor C-8, which compensates for different DC voltages, to a comparator 68 which has the output compares the integrator with a bias threshold, as shown in FIG. The comparator converts the triangular wave of the integrator 60 to a square wave, which is switched on by the exhibition for signals of greater amplitude than the bias threshold.

The signal from the integrator 60 is also provided to an ambiguous pulse suppression circuit 70 which distinguishes between "good" transponder pulses and ambiguous signals. The circuit 70 recognizes as ambiguous digital information which falls into a predetermined “gray area” and accordingly outputs a reset pulse to the four-fold redundancy counter 76. This ensures that "weak" and therefore possibly erroneous information received by the interrogator ik while the transponder 12 is in the edge area of the connection zone or when the battery of the transponder 12 is too weak, is not used to unequivocally supply the interrogator lk Identification of the transponder 12 are used. Rather, a reset

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of the redundancy counter 76, the decision-making process of the circuit is postponed until the transponder * 12 is reliably in the receiving field of the interrogator or, where appropriate, it is indicated that the battery of the transponder 12 must be replaced.

The output of the comparator 68 is received by a memory circuit or latch circuit 72 which, as shown, also receives a clock pulse. The latch circuit 72 is capable of delivering an output pulse for the duration of the CIock pulse when a comparator output pulse is received at the input. Accordingly, the comparator output is provided after the clock pulse has been caused, which is why the latch starts Output pulse usually coincides with the beginning of the comparator output pulse. However, the latch is capable of maintaining the output until both the clock pulse and the comparator output pulse have ended. Therefore, since the comparator pulse usually falls before the end of the clock pulse, the La Teil-Aus output pulse usually ends with the end of the clock pulse. Viewed overall, the latch output pulse is usually started at the beginning of the comparator output pulse es and usually ended when the clock output pulse ends. This timing of the latch output ensures that only ' ^Kom P ^{arato: r} output pulses that are representative of transponder pulses have been recognized, as only those pulses that are generated during the

Pulses of a defined temporal "window" occur, i.e. are effective for the duration of the clock pulse, to deliver a latch output pulse to the subsequent part of the circuit.

The output of the latch circuit 72 is led to an auto-synchronous decoder 7 ^ which detects the sequence of binary ones and binary zeros and serves to determine the beginning of the binary code. When the start of the code is determined by the decoder 7 ^, a pulse is given on line 78, which sets the quadruple redundancy counter 76 in motion. The auto-synchronous decoder 7 ^ then receives the next sequence of bits from the latch circuit 72 and repeats the checking process until the beginning of the code is determined again. When this occurs, another pulse is provided on line 78, which in turn drives the quad redundancy counter 76. If the sequence occurs twice more, the quad redundancy counter 76 emits a pulse on line 79t which enables the code to be lived to the decoder 7 ^ to be transmitted to the controller in the appropriate sequence to be passed through the system to be further processed.

In Figures 9a and 9b is a schematic diagram of the Interrogators 1 ^ shown. As will become apparent from the following detailed description, an essential part of the circuit of the Interro? '-: rs 1h is intended for Background noise removal.:. and false signals

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of the information you want. This circuit is necessary to ensure the proper operation of the system under possible adverse conditions. In general, it can be stated that the interrogator ik clocks the transponder from a distance, receives the returned transponder pulses, "cleans" the signal, determines whether the information is "good", decodes the signal and finally sends the information to a controller, in the various checks are carried out for the condition of the identified item.

As noted above, the interrogator 14 emits an Sequence of infrared pulses at a clock frequency that the transponder 12 is activated. The transmission section of the

be Interrogators 1 * 1 / feitzt an arrangement of light emitting Diodes LED 75 supplied by a number of driver transistors 73 * The base connections of the LED driver 73 are located together at the output (pin 13) of a univibrator or one-shot 165. The one-shot I65 is clocked by pulses that at the clock connection (pin 2) from a free-running local Clock 110 is supplied, hereinafter is described in more detail. Venn an output pulse through the one-shot 165 is generated, the LED drivers 73 conductive, whereby the LED arrangement 75 is switched on. When the pulse from the one-shot 165 ends, the LED drivers 73 block and the LED arrangement 75 is switched off. the The duration of the pulse from the One-Shot 165 is determined by the

70988ß / 07 (H.

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constant determined by the adjustable resistor R-39 and the capacitor C-21 can be adjusted · Thus By adjusting the value of resistor R-39, the percentage of the on-time of the LED array 75 can be determined during each clock period can be varied. The resistor R-39 is generally set to be one staging period to form that has a sufficient duration (e.g. 30 Microseconds) in order to ensure a suitable clocking of the transponder 12 on the distance.

The receiver section of the interrogator i4 has a cylindrically shaped lens 48 which focuses the received transponder pulses onto detector 50. The cylindrical shape of the lens 48 determines the receiving field of detector 50. Between lens 48 and the detector a filter 52 is inserted which, as mentioned above, the Light transmission below a predetermined value of the

Wavelength, for example 9500 A, limited. Additionally the detector is designed in such a way that it only works on wavelengths

responds below a certain maximum, for example 9700 A. The response of the interrogator 14 is thus limited to a predetermined wavelength band.

The detector 50 has its anode connected to earth and its Cathode on the gate of a field effect transistor FET 80. The FET 80 has a high input impedance to accommodate the To keep noise in the system small. The drain of FET 80 is

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connected to +15 volts and grounded through a shunt capacitor C-9 · The source is connected to the negative Input of an operational amplifier 62 and a bias resistor R-20 connected. The other end of resistor R-20 is at - 15 volts. The shunt capacitor C-10 is used to dissipate high frequency interference on the - 15 volt supply to earth. The output of the operational amplifier 82 is made through a multiple feedback network fed back to the gate of FET 80. The multiple feedback network has two parallel connections 84 and 86. The radio frequency feedback connection 84 consists of a resistor R-23 »which has a large resistance value for high gain possesses. The low frequency feedback connection 86 consists of a series of resistors R-21 and R-22 and capacitors C-11 and C-12, the are grounded in parallel between the common connection point of resistors R-21 and R-22. The capacitance values of C-11 and C-12 are relatively large, so high frequencies be effectively grounded. Accordingly, low frequencies will have a significantly larger amplitude fed back to the input of the preamplifier 54 through the feedback network. This is how the preamp becomes 54 prevented from being saturated by low frequency signals or DC light levels when sunlight hits the detector 50.

Reference is made for a moment to Figure 9c, which an alternative version of the Vor- "-'-- cärkers 54 in the Intor.ro-

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gator i'l shows. The embodiment shown in FIG. 9c essentially contains a single-coupled differential amplifier 81 which is connected to a constant current source 83. This circuit functions as a comparator by a comparison of the potential of the signal at the base of transistor 85 'which depends on the voltage drop across the photodiode 50 with the grounded potential at the base of the transistor 87. The difference between the two potentials is by the operational amplifier 89 reinforced.

This embodiment of the preamplifier $ k _t, which is shown in FIG. 9c, causes less noise than the embodiment according to FIG. 9a, and the frequency bandwidth of the interrogator 1h is improved. The improved frequency bandwidth of the preamplifier 5k in Figure 9c is desirable because it provides for the generation of sharper square wave signals. This can become significant because overlapping long trailing edges can interfere with the reflected interrogator pulses detected by detector 50 with the much smaller transponder pulses that lie in between. It should be noted, however, that the implementation of the preamplifier 5 ^ shown in FIG. 9a likewise performs the intended function.

Reference is now made again to FIG. 9a. The output from the preamplifier 5k is connected to the negative input of the amplifier 88 via a resistor R-2 ^.

709886/0704

bound. The positive input of amplifier 88 is grounded and the output of pin 6 is fed back to the negative input (pin 2) through a feedback resistor R-25. Of the Amplifier 88 amplifies the signals by a factor of about 10.

The amplified signal is then fed to a masking circuit 56 which receives the reflected interrogator pulses from fades out the signal. The masking circuit 56 is essentially a circuit that switches from a low impedance state to a high impedance state, if an appropriate one Start-up pulse is received. The fade-out circuit 56 is caused by the leading edge of a negative square pulse which is received on line 92 from a one-shot 90. The One-Shot 90 is his turn triggered by the trailing edge of a clock pulse, the on line 91 from the local clock pulse generator 110, the

is received, as described below / The duration of the from the one-shot 9O generated pulse is "bestisssi-t by the Time constant that is formed by resistor R-25 and capacitor C-14 and that is achieved by adjusting the potentiometer R-25 can be set. However, it should be noted that the duration of the fade-out pulses generated by the one-shot 90 are greater than the duration of the LED arrangement pulse ο must be generated by the one-shot 165 to ensure is that the total reflected interrogator pulse is subtracted from dfcu signal.

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... / hh

Reference is again briefly made to FIG. 8, from which it can be seen that the transponder pulses between the reflected interrogator pulses lie, as in the The signal diagram shown there is shown. In front of the BM

In response to a reflected interrogator pulse, the one-shot 90 generates a switch-on pulse which switches the masking circuit 56 to the high-impedance state. The circuit remains on for the duration of the pulse from the one-shot 90, which results in the reflected interrogator pulse being blocked from the signal. The voltage in the fade-out circuit 56 is kept in the hold state by the holding capacitor C-15. The fade-out process, however, is not entirely perfect, but leaves a small trailing edge at the end of the subtracted interrogator pulse. The switch-on pulse is then terminated, as a result of which the masking circuit 56 can return to the low-impedance state or sampling state, while the portion of the signal that contains the information / the interrogator i4 receives from the transponder 12 is allowed through. At the end of the sampling period before the next reflected interrogator pulse is received, the circuit 56 is switched on again by a further pulse from the one-shot 90, which in turn switches the masking circuit 56 back to the high-impedance state. Again, the information on the line is removed from the signal appearing at the output of the masking circuit 56 for the duration of the one-shot pulse. Accordingly, it can be seen that the signal thus obtained consists of a series of transponder pulses superimposed by a series of small subsequent edges

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that remained from the subtracted interrogator pulses are.

The signal from the fade-out circuit 56 is supplied to a summing point 58 via a direct signal connection 16 and a time-delayed and inverted signal connection 62. The signal from the fade-out circuit 56 typically contains a certain amount of low-frequency background noise. It is the operation of this portion of the circuit to remove these unwanted changes from the signal without destroying the desired transponder information.

The output of the masking circuit 56 at pin 10 is connected in a delay line 6k to the summing point 9k via a series resistor R-26. The other end of the delay line 6k is grounded via the resistor R-28 and connected to the negative input (pin 2) of an operational amplifier 96 via the resistor R-29. The positive input (pin 3) of the amplifier 96 is also grounded, while the output of the amplifier 96 is fed back to the negative input (pin 2) through the feedback transistor R-30. The output of op amp 96 is also connected to summing point 9 ^ through resistor R-27. The value of the feedback resistor R-30 is selected so that the amplifier 96 has a gain slightly greater than 1 to compensate for the losses in the time delay operation.

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273336Α

Referring again briefly to the signal diagram in FIG. 8, there is shown a graphical representation of an exemplary portion of the signals appearing at summing point 9-4. It can be seen Vie, that is to the summing junction yh signal emitted via the direct connection 60 substantially equivalent to the signal at the output of the blanking circuit 56 · The signal h to the summing $ leads train on the delayed and inverted connection 92, is has now been by the delay line 6h is time-shifted and inverted by the amplifier 96. It should be noted that the amount of delay imparted to the signal in connection 62 is equivalent to the width of a transponder pulse, typically 10 microseconds. The purpose of selecting the time delay in this precise amount will be apparent from the following discussion of the integrator stage 60 of the interrogator 14. As the person skilled in the art can recognize, when the two signals are summed at point 9 ^ the undesired low-frequency noise background is essentially subtracted from the signal. This is due to the fact that the two opposite signals are sampled at approximately the same point in time in the real-time relationship. Therefore, the amount of change in low frequency background noise that can occur during the time period between the two sampling points is kept to a minimum. In this way the subtraction process is more complete and leaves an essentially constant signal on which a series of successive square-wave pulses is superimposed at a distance. Ea is to be noted that as

709886/0704

By-product of the summation the negative version of each transponder pulse is added to the signal.

The result signal at the summing point 9k is applied to the negative input (pin 2) of an operational amplifier 96, the positive input (pin 3) of which is grounded. The output (pin 6) of the operational amplifier 96 is passed through to the negative input (pin 2) a parallel connected capacitor C-15 and a resistor R-28 are fed back, which allows the amplifier 96 to operate as an integrator. In this way, the connected square wave pulses applied to the input of the integrator 60 are transformed into triangular shaped pulses as shown in FIG. In particular, the negative half of the square wave input signal (which is applied to the negative input) produces a positive rise signal at the output, and the positive half of the square wave signal produces a negative fall signal which reduces the output signal to its original level. Thus, in order to obtain a "good" triangle pulse from the output of integrator 60, it can be seen that it is important that the time delay imparted to the signal by the previous stage of the circuit is at least as great as the width of a transponder -impulse is. If the delay is less than the width of a transponder pulse ^ würdo in Summieroporation a part of the Traiisjxj nderirapulses been subtracted from the signal, RV a cut vas

7'0 9886/0704

Triangular pulse at the output of the integrator 60, the maximum amplitude of which could fall below the bias threshold of the comparator 68 under certain circumstances. Thus, the integrator would lh this information can not be recognized as a transponder pulse, which would of course mean a loss of information.

The signal at the input of integrator 60 also contains some amount of high frequency noise which appears as irregularities or spikes in the square wave signals, as shown in the signal diagram in FIG. The integration operation effectively eliminates these spikes from the signal, so the integrator acts as a high frequency filter for the system.

The triangular signal from integrator 60 is applied to the positive input (pin 2) of a comparator amplifier via an AC coupling capacitor C-8. Coupling capacitor C-8 removes any DC bias that may be present in the signal. The positive input of amplifier 98 is also grounded through resistor R-29. The negative input (pin 3) is grounded via the capacitor C-16 and via the wiper e ^A ..ia adjustable resistor R-31. A variable resistor R-31 is connected to ground, the other side connected to +15 volts through resistor R-30. The resistance of R-31 is set to be one suitable bias threshold at pin 3 of the grain

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partner preamplifier 98 delivers. The output remains in operation (pin 7) of the parallel amplifier 98 L until the signal on positive input (pin 2) exceeds the threshold at the negative input (pin 3). When this happens, the exit will be of the! Comparator II. and remains H until the potential at pin 2 falls below the threshold at pin 3. Thus can be seen be that the comparator 68 emits a square wave signal at the output as soon as the integrator 60 has a triangular shape Transponder impulse supplies the threshold of the parallel amplifier 981 as shown in the signal diagram of FIG is, exceeds.

The output (pin 7) from a comparator 98 is set to a the inputs (pin 9) of a NAND gate 106 are supplied. The same input to NAND gate 106 is also at + 5 volts via a setting resistor R-35 · This is used to fix the voltage of the input pulses to the NAND gate 106 from the comparator 68 to a maximum of + 5 volts. The other input (pin 10) of the NAND gate 106 is with the output of a one-shot 113 connected. The input (pin 5) of the one-shot I13 is connected to the output of a further NAND gate 108. There is a between pin 10 and pin 11 of the One-Shot II3 Capacitor C-30. Pin 11 is also on one side of a potentiometer R-60, whose slider is connected to + 5 volts is, and with pin 1 ^ of the one-shot 113. The function of the one-shot 113 is used below in conjunction with the description the circuit 70 for suppressing ambiguous pulses described.

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One of the inputs of the NAND gate 108 is connected to the output of the local clock generator or the local clock 110. Since dor other input of the NAND gate 108 is directly connected to 5 volts, NAND gate 108 is used only for inverting the Ausgangesignals by the local clock 110. Thus, d of pin 5 * ⁸ One-Shotβ 113 the inverted clock signal, which is labeled CLOCK is generated.

The local clock 110 has a pair of one-shots 112 and ΙΐΊ that are connected in series and that are together determine the three to the clock impulses. In particular, dia forms the time constant determined by the values of the resistor It-36 and the capacitor C-18 is determined to be the leading edge of the Clock-Jmpulses, and the time constant represented by the values dos resistors R-37 and dos capacitor C-19 is determined, forms the trailing edge of the clock pulse. Because the exit (pin 12) from the one-shot 114 to the input (pin 2) of the one-shut 112 is returned via line 1i6, the local Clock 110 free running.

Dir: / ur> (riiii & o of the NAND gates 106 and 108 are each at the Set and Ilesot Kingöngon of an R-S flip-flop 118. It should be in the

Moment ruif.encnirrtoii will be that the exit from the one-shot 113 lii.fMi odor H low or L

/ iiit. vena the clock signal / ipt. JHwith one can recognize ·; ·.,

doll the flip-flop II8 is set, i.e. the output is on I, oit; in.'v ιLO increases when both the Ausfa * g§i.ci-Uuig des Kivijj.-irntoi's 68 II and dns on the entrance of UANU-Gate 108 nurtil ^ Ctc GiocK. Signal J- ij5 "fc. In addition, the latch 72 remains off on line 120H until both the

ratoraur.giui *; p \ i ' h goes back, and the Ciock-S:' · gnr \ l B becomes,

709886 / 07ΠΑ. ,, / 51

Reference is again made to the timing diagram in FIG Fig. 8, therefore it is clear that as long as the comparator output pulse During the time period when the clock signal is low, the latch circuit 72 is high Output generated. This time period during which the clock signal is low is referred to as the clock "window", since during this interval the interrogator 14 after looks out for a transponder pulse *. Since the clock * Signal resets flip-flop 118, it does not matter when the transponder pulse appears exactly within the clock window.

For a moment, reference is made again to the comparator 68 taken. It should be noted that the bias level is preferably at a level which is greater than the amount of possible noise changes that may be present in the signal from integrator 60, however low enough to be able to recognize "good" transponder information, however, signals will inevitably be received by the interrogator 14, which in a "Gray areas" fall, i.e. those greater than -typical noise are, however, smaller in their amplitude than the expected "good" transponder signals. This occurs

mostly on when the transponder 12 through the edge of the interrogator receiving field is running. When the transponder 12 entering this area are the strong output impulses from the interrogator sufficient to generate the transponder to vei * anlasoen of his code. But the much weaker ones

709886/07 (H.

Transponder signals from this distance from the interrogator detector received, do not appear much larger than random noise signals that are also transmitted through the detector 50 can be included. Thus is to see that at this point in the identification process it is entirely possible that the interrogator 1 * l · good information "drops", which does the quadruple redundancy check 76 would happen and lead to mistaken identification would lead.

To minimize the possibility that this occurs hold is a circuit 70 for suppressing the ambiguous Impulses provided. This circuit 70 consists of a further comparator amplifier 100, at which positive input (pin 2) the same signal is given that at the positive input (pin 2) of the comparator amplifier 98 lies. In addition, the same bias threshold, which is at the negative input (pin 3) of amplifier 98, also to the negative input (pin 3) of the amplifier 100, but through a voltage divider network consisting of resistors R-32 and R-33 and capacitor C-17 consists. The values of the components of this network are selected so that they have a bias potential on pin 3 of amplifier 100 by about two thirds of the bias threshold, which is supplied to pin 3 of the amplifier 98, form. As a result, the threshold at amplifier 100 is below the amplitude of a transponder signal transmitted by

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is received in a peripheral area. In this way, signals which would be ignored by the comparator 98 are recognized by the comparator amplifier 100. However, since the bias threshold at pin 3 of amplifier 100 is substantially below the "safe" level associated with comparator 68, there is also the possibility that amplifier 100 can generate an output signal in response to a random non-transponder signal. Accordingly, it should be understood that pulses detected by comparator amplifier 100 but not by comparator 68 represent ambiguous pulses.

In order to identify these ambiguous pulses, the output of the comparator amplifier 100 is connected to a latch circuit which is similar to the latch circuit 72 and consists of a NAND gate 102 and an RS flip-flop 122. The output from flip-flop 122, like the inverted output from flip-flop 118, is connected to the two inputs of a further NAND gate 104. The output from NAND gate 104 is connected to the data input (d) of a JK flip-flop 124 , which is clocked by the clock signal of the local clock generator 110. The positive (q) output of flip-flop 124 is provided through a three input NAND gate 138 on the reset terminal of counter device 140 in quad redundancy counting circuit 76. Thus, as can be seen, if an ambiguous pulse is detected becomes, that is, the output from flip-flop 122 H and the output from flip-flop

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L is (which provides two H inputs to NAND gate 10 **, since the inverted output from flip-flop 118 is fed to NAND gate 104), an L signal is supplied to the data input of flip-flop ihk which when it is clocked by the back edge of the clock window, an L pulse is generated at the Q output. The L pulse at the input of the NAND gate 138 makes the output of the NAND gate high, which in turn supplies a reset pulse to the redundancy counter 140.

The function of the one-shot 113 will be explained below. When the state of the transponder battery approaches the limit, the pulses emitted by the transponder 12 appear later in the clock window. In addition, since the greatest energy draw from the battery occurs when the transponder 12 is emitting an infrared signal, a significant voltage drop can occur during the transmission of a train of infrared pulses. In particular, the subsequent binary ones in a sequence of ones appear noticeably later within the clock window as the first binary one in the sequence, or they may even be outside the clock window and read as binary zeros. It is clear from the following description of the parity check in the four-fold redundancy counting circuit 76 that the interrogator lh detects the error and starts the query process again as long as the error is not repeated continuously.

However, when the transponder battery is pretty low

709886 / 07OA

and the coded word continues to be a sequence of binary zeros that allow the battery to recover, the same error may recur if the Sequence of binary ones is repeated. The possibility that such an error could be repeated is then of course greatest when the transponder 12 is located within the edge area of the receiving zone of the interrogator.

In Fig. 10, a state is shown in which such repeated errors can occur. Fig. 10 illustrates a situation in which a sequence of three binary ones be emitted by a transponder 12 with a depleted battery. The first transponder pulse in the sequence (i) exceeds the upper limit of the ambiguous range before the clock window is closed and is therefore in appropriately read as binary one. Likewise, the second transponder pulse (s) also exceeds the ambiguous one Area before the end of the clock window and is has been read as a binary one, it appears but later in the Ciock window than the first transponder pulse due to the 3 waste of the transponder battery that is on the Emission of the first transponder pulse is to be reduced. Due to a further voltage drop in the transponder battery, caused by the emission of the second transponder pulse ', -irti, becomes the third transponder pulse in the sequence (ill) erroneously read as binary zero. Because the third jii: puls (ill) not even ambiguous the lower threshold dos l't'i'ciclis exceeds before the boarding of the clock window,

709886/0704

the interrogator Th does not consider this pulse to be ambiguous.

As mentioned above, this situation can repeat itself if the battery of the transponder 12 is given the opportunity to to recover ahead of time before emitting a sequence of binary ones again. To the possibility of this To prevent repeated error, which causes erroneous identification, becomes a "temporal" ambiguous Zone added to the last 5 microseconds of the clock window. In particular, it was decided that transponder pulses, which appear within the last 5 microseconds of the clock window, may be incorrect and are therefore ignored should be.

Thus, returning for example from Fig. 10, it can be seen that the second transponder pulse (il) in the sequence falls within the time zone and is therefore treated as an ambiguous pulse. Furthermore, since the horizontal distance (x) between two consecutive pulses in Fig. 10 represents the maximum amount of delay that can occur between consecutive transponder pulses as a result of the battery failure , it can be seen that it is for a trumpondor pulse similar to that von (ill) is impossible to occur without a previous

in
Transponder impulse either / the ambiguous or the specific

Zone falls. Furthermore, if the status of the transponder

709886/0704

Battoi-ie is such that the third (Hl) transponder pulse is the first itnpulü detected, all characters appear in the coded word as binary zeros and the code would not be satisfied. The «of course would indicate that the transponder battery needs to be renewed.

The concept of the temporally ambiguous zone is made possible for the interrogator 1A by the addition of a one-shot 113. In particular, the value of the potentiometer R-60 is set so that the time period that the one-shot 113

she
as determined by the values of capacitor C-30 and potentiometer R-60, is 5 microseconds shorter than the period of the clock window. Accordingly, since the one-shot 113 is switched on by the leading edge of the clock window, an L output pulse is generated at the input (pin 10) of the NAND gate 106 5 microseconds before the end of the clock window. Thus, if the comparator 68 produces a high output signal after the output from Ono-shot has fallen to L 113, the output from NAND gate 1o6 does not fall on length and sets the RS flip-flop 11S. _S thus be seen that the flip-flop 118 is not switched to its Sot state kajin after the output from the one-shot has fallen to L 113th

However, if a signal has already occurred during the clock window that has exceeded the upper threshold and set the flip-flop 118, the flip-flop becomes not reset if the output from the One-Shot 113 drops to L

709886/0704

falls. In addition, if a signal exceeds the upper threshold and has not yet been detected when the output of the one-shot 113 drops to L, the flip-flop 118 is held in its reset state, whereby a II. Signal at the input (pin 12) of the NAND gate 104 is retained. Thus, if a signal occurs that exceeds the lower threshold of comparator 100 within the remaining 5 microseconds of the clock window, thereby setting flip-flop 122, the output of NAND gate 10 ^ goes low and the last signal goes low treated as an ambiguous impulse.

Overall, if the R-S flip-flop 122 is set and flip-flop 118 is reset when the output from the one-shot 113 is on Goes low or when flip-flop 122 is set after the output from one-shot 113 goes low, but before termination of the clock window, the signal is treated as an ambiguous pulse and the four-fold redundancy counter becomes 1Ί-0 reset to zero. In other words, any signal that crosses the lower threshold of the ambiguous range, however, the upper threshold of the ambiguous range does not exceed 5 seconds before the end of the clock window, is treated as an ambiguous impulse, causing the query process to be repeated until none are ambiguous Pulses encountered during the quadruple redundancy check procedure will.

It should also be noted that a JK flip-flop i Zh is provided to ensure that the decision, the

709886/0704

... / 59

RedundaiiKisähler 1 '; O to zero is not carried out until the entire clock window period is over. This has the effect that a possible, premature decision by the logic gate 104 is prevented and the counter 1 ^ * 0 does not erroneously receive a reset pulse. Since the voltage level at the comparator amplifier 100 is significantly lower than that at the amplifier 98, it is possible for the RS flip-flop 122 to be set before the flip-flop 118, even though a "good" transponder pulse is in the Act is present. Since the switching time of a simple NAND logic gate is so fast, this small difference in the response time of the comparator amplifier 98 and 100 to a "good" transponder pulse can be sufficient for the NAND gate 104 to prematurely send an H reset pulse to the counter 140 supplies. The JK flip-flop 12 ¹ * waits for the end of the clock window before the output signal from the NAND gate 10U passes, which ensures that the redundancy counter 1UO only receives a reset pulse if an ambiguous pulse has actually been received .

Thus, the practical effect of the circuit 70 is to suppress of ambiguous pulses that the identification process is deferred until the transponder 12 is well within of the Empiangsfeld dos Interrogator lies. Additionally, if at any time during the identification process an ambiguous pulse is received, the pulse is reversed, and all the information, dio up to cliesoni time were received by the transponder 12 within the receiving zone of the interrogator, ignored, and the interrogation process

709886/0704

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will be repeated. As the interrogator 14 during the identification process cyclic (including the fourfold redundancy check) are every twelve inches the further movement of a vehicle almost two full

constant processes possible from a vehicle moving at 50 km per hour, so that the chances that the interrogator lh does not at least provide a good identification to the transponder 12 before it leaves the receiving field of the interrogator is extremely small, if the Transponder battery does not necessarily have to be replaced.

As a measure to check the queried transponder battery from a distance, the output signal from the One-Shot II3 becomes one of the inputs through an inverter II5 a NAND gate 117 with two inputs. The other input of the NAND gate 117 is connected to the output of the

comparator amplifier 98 is connected. In this wiscy ', if

would be considered something that would otherwise be considered a good transponder pulse / to another Time as received during the clock window is outside the time zone, through NAND gate 117 An L output signal is generated, which indicates that the transponder battery needs to be checked. Of course it works this type of distance check only with a battery whose output voltage drops due to battery drain.

The output of the latch circuit 72 is connected to an input of the NAND gate 126 given with two inputs. The other one

709886/07 (H.

The NAND gate 126 is connected to the Q output (pin i) of a Holt-One-Shot 13O. The output from gate 126 is applied to the inputs of a further NAND gate 128. The Halt One Shot is usually in the ^w Run ^w position, that is, an H output signal appears at Q, which makes logic gate 126 appear as an inverter. The Q output (pin 6) of the one-shot 130 is at the input of a third NAND gate 127. In the "Run" state, the Q output is usually L _t, which makes the output of the gate 127 H. Since the output from gate 127 is applied to the other input of NAND gate 128, logic gate 128 also appears as an inverter for the output signals from gate 126. Thus it can be seen that. while the halt-one-shot 130 is in the "run" state, the data signal on line 120 from the latch circuit 72 is inverted twice by the logic gates 126 and 128, whereby the same signal occurs at the output of the gate 128, appearing on line 120. It can thus be seen that the halt one-shot 130 controls the flow of data from the latch circuit 72. This ability will be made clearer from an explanation of the "half" condition as described below.

The output from NAND gate 128 is to the input of one 8-bit shift register 132 set. The serial output connector (pin 13) dos shift register 132 is directly connected to the input of a Kwoiten 8-lJii; ~ Schi.oborogisters 13 ^ connected, the in turn the series output (pin I3) with the input of one ^ -Bit shift register 136 connected. The three sliding

709886/0704

registers 132, 13 ^ and 136 have a total of 20-bit capacitance and are necessary to accommodate the i8-bit Yranspoii (lQr code. The shift registers 132, 13 ^ and 136 are loaded in sequence by the clock pulses, which are received on line 135 from local clock 110. The output from register 132 is loaded into register 13U and the output from register 13 '* is loaded into register 136.

As stated in the previous discussion of the transponder 12, there is no way to guarantee that the first bit that is output from the 18-bit shift register 38 corresponds to the first character of the transponder code. Rather, the first bit transmitted depends on the transponder 12 depends on where the recirculating shift register 38 happens to be holds when the transponder 12 was clocked for the last time. Accordingly, it can be measured that the chances that the first 18-bit word that goes into shift register 132, I3U, is programmed in, which represents the correct transponder location, is rather small (1 out of 18). Accordingly, it becomes necessary assign a code from which the interrogator 1U provides the beginning of the word that is transmitted by the transponder 12 can decipher.

The information stored in the shift register 38 of the transponder V. by previous input consists of pns 18 bits which are numbered consecutively with (i) to (18). Boim thinking up a suitable

70988B / 07IH

* '^ "273336A

note codes, it is desirable to use venig as possible To look for bits for coding constraint, so as to the total number of different words that are transmitted can keep it as large as possible. For example, in the event that 8 of the 18 total ~ bits have restrictions placed on the identification of the starting point, only 10 bits would be allowed for coding. This would become a whole of 2 or 102 ^ possible words. It can be mathematical however, it will be proven to be the most effective

in

Coding scheme for a / row transmitted 18-bit binary word Restrictions on 5 of 18 coding positions required. Accordingly the task of creating a code that leaves 13 bits open for encoding the message is reduced, which means a maximum of 8192 possible words can be created.

Reference is made again to FIG. 6. The entire bit stream is transmitted repeatedly from the transponder 12, which allows the analogy to a ring-shaped arrangement which rotates successively towards a fixed point hk. Accordingly, the code is referred to as a ring-shaped coding scheme. The constraints that must be applied to the 5 of the 18 bit positions in the devised ring coding scheme in order to determine the starting point of the sequence are as follows:

1. In position (i) or in position (1O) the content must be bok? "". ·· 'by a previous arrangement. Tn of the preferred version ww- '.- ti a logical "1"

709886/0704 OfIMNNAL INSPECTED * ^v * '

ΛΌ2>

arbitrarily selected for position (i).

2. In position (1O) the content must be the complement of the Content of position (1), so it is also known through the default due to the arbitrary Selection for position (i). In the preferred embodiment, therefore, the Position (1O) contain a logical "0".

3. In position (i4) the content is not known by default, but must be the complement of position

(5) be

U, In position (17) the inside is not known by default, but must be equivalent to the content of position (8).

5 · The content of position (i8) is not known by default, but must be equivalent to the content of position (9).

In linear form, the five constraints are preferred in the Execution shown as follows:

... / 65

709886/0704

273336A

oo

oo.

VO

pq

CVJ

CVJ

OS

oo

r \

oo

VO

»Π

... / 66

70988R / 0704

- GjS -

273336A

Thus, the bits represented by B1 through BI3 represent represent either logical ones or logical zeros, whereby a Coding ability of 8192 different words is achieved.

To illustrate the operation of the circulating coding scheme, suppose, for example, that the decimal number 5555 should be assigned to a special transponder. The equivalent binary representation of the decimal number 5555 is natural 1010110110011.

In linear form, the 18-bit coded Vort, which i ⁿ in the transponder shift register 38 a manner described below has been programmed has been to represent the decimal number 5555, shown in the stereotyped position as follows: (1) (2) (3) ( M (5) (6) (7) (8) (9) (10) (11) (12) (13) (14) 1 B1 B2 B3 Bk B5 B6 B7 B8 0 B9 B10 B11 Bi "110 101 101 01 0 0 1

(15) (16) (17) (18) B12 BI3 B7 B8 110 1

It can easily be seen that none of the seventeen other possible positions into which the above sequence of bits can be shifted meet the five specified conditions that! above was fulfilled. For example, if the entire word is shifted one unit to the right, so that bit (1) would now be in position (2) and bit (18) in position (1), the five conditions could not be met, since 0 ± e F.it position (1O) would now contain a binary "1". Likewise, if that

70988Γ> / η704

If the coded word is shifted two positions to the right, the five conditions could not be fulfilled, since position (i) would now contain ^{a binary 11} O ^11. The remaining fifteen positions would similarly violate at least one of the five conditions, which confirms the fact that only the position depicted meets all five conditions.

The electronic implementation of the above circulating coding « Schemas is effected by the autosynchronous decoder 7 ^. The car" synchronous decoder 7 ^ identifies the starting point of the encoded Words by continuously clocking the incoming data through the shift registers 132, 13 ^ · and 136 and at the same time Check the shift register output corresponding to positions (1), (5), (8), (9), (10), (1 * 0. (17) ujid (18), as shown in Fig. 9b is shown until the corresponding position has been recognized. When this happens, the data is in the right position in shift registers 132, I3U and 136, i.e. position (1) (pin 3) of register 132 contains the logic "1" in Position (1) iia transmitted bit stream, position (2) in the shift register 132 contains the B1 bit in position (2) in the encoded Value,

The five conditions outlined above are met by the autosynchronous decoder 7 ^ in the following way:

Position (1) (; -> in 3) of the shift register 132 is directly at the input of an AHD gate 1 ^ 2. Position (IO) (pin h) dos shift register- ^; 13 * 1 is through an inverter ΛΗΟ with the remaining Ein.-üii / .v:.! de:;.; j'iMJi-Gattoii. i '»2 connected. The output of the AND

709RRH / ί) 7ΠΑ

2733.36 *

Gate 1 ^ 2 is directly connected to one of the four inputs of the AND gate ikk. Thus it becomes clear that the AND gates 1 * »2 and IkU Jn act as a single AND gate with five inputs in their combination» The output from AND gate ih2 becomes Ii only when a logic ^M 1 "is in position (i) of shift register 132 and a logic "0" occurs in position (1O) of shift register 13 ^, whereby the first two conditions are met. Position (5) (pinio) of shift register 132 and position (i4) (pin 11) of the shift register 13 ^ are applied to the two inputs of an EX-OR gate 1 ^ 8. The output from the logic gate 148 is connected to another of the four inputs of the AND gate "\ kk . The output of the logic gate 1 * l8 is only H if the bit contained in position (5) is not equal to the bit contained in position (1 * O, whereby the third condition is fulfilled. Position (8) (pin 13) of shift register I32 and position (17) (pin 13) of shift register 136 are applied to the inputs of an EXNOR gate which has an EXOR gate 150, the output of which is fed directly to an inverter 152. The output of inverter 152 is with connected to another of the four inputs of the AND gate ikh . The output from inverter I52 is only II if the bit contained in position (8) is equal to the bit contained in position (17), whereby the fourth condition is fulfilled Finally, position (j?) (Pin 3) of shift register I3A xutL position (18) (pin 12) of shift register 136 is on a further EXNOR gate, which is an EXOli gate 15 '! And an inverter 156 r.uiVeist. The output from the luv or tor 1 ^ 6 is with the remaining input of the AND- Gatters 1'ιΊ connected. The output from the inverter

/ 69

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156 win! ntir then H if the bit contained in position (9) is equal to the bit contained in position (i8), which means that the fifth and final condition is met. Accordingly, it becomes clear that the output of the AND gate 1 ^ 4 is H only if if all five conditions are met at the same time.

As an additional precaution, a parity check is provided to ensure that a bit was not accidentally lost when the incoming data is clocked through shift registers 132, 13 ^ and 130. In particular, output pin 11 of shift register 136, which corresponds to position (19), and position (1) (pin 3) of shift register 1 32 are connected to an EXNOR gate which has an EXOR gate 160 and an inverter 162. The output from inverter 162 is at one of the inputs of NAKD gate I38. Since position (19) corresponds to position (i) in the previous 19-bit arrangement, the fact that at any given point in time the bit contained in position (i) does not correspond to the bit contained 3.11 position (19) indicates that a Bit was lost during signal processing, whereupon a zero input for the NAND gate .liefertj through inverter 162, whereby the output is II. As a result, the redundancy count ei '1 ^ 0 contains a reset pulse, which of course causes the query process to be started again from the beginning.

The output from the AND gate 1 ^ - is given by an inverter I58 to a Riiduadanzzähler 1 ^ 0 via the line 78. Every time a negative pulse hits line 78 (p * ^{n 1} M, the redundancy counter ihO is increased by one

709886/0704 ... / 70

Autosynchrondecoder 7 ^ however receives more new data from the latch circuit 7 ² 'and with the assumption that the first coded word was exactly identified, it recognizes the successive arrangement of the coded word exactly eighteen pulses after the first determination and delivers another pulse Line 78 »to increase the redundancy counter 1 ^ 0 a second time by one. It can thus be seen that the redundancy counter 1 ^ 0 counts how often the autosynchronous decoder Jk determines the starting point of an identically coded word.

If this method has been repeated four times, that is to say the redundancy counter ihO has counted to four, a pulse is emitted from the counter 14O on line 79 and delivered to pin 5 of the halt-one-shot 130. After receiving a pulse from counter 140, the one-shot I30 switches to the HALT state, which inverts the Q and Q outputs. If Q is now L, the output from NAND gate I38 becomes H, which zeros the redundancy counter 1 ^ 0. In addition, the L signal from Q on line i64 is given to the hold connection (pin 3) of the arrangement-s-one-shot 165, which suppresses the operation of the one-shot 165 and thus locks the LED arrangement. When the LED arrangement of the interrogator is switched off, the transponder 12, which is located in the transmission field of the interrogator 14, stops transmitting its code and returns to the inactive state 12 is switched again, the energy of the 9-volt battery of the transponder is preserved, which extends the life of the battery.

In the COLD state, the * Q output of the one-shot I30 is H, what

709886/0704 _## ./ ₇₁

^273336A

in turn leads to the fact that the NAND gate 127 appears as an inverter for the signals that are in position (18) (pin 12) of the Shift register I36 occur. The output from the NAND gate 127 is connected to the DATA OUT terminal through another inverter I66 connected to the controller 16. Because the coded word is in the same position in the shift register 132, 134 and 136 is when the one-shot 130 is on the HALT state is switched, it can be seen that the first 18 bits appearing on output pin 12 of shift register 136 are correct Correspond to the sequence of the coded transponder prefix.

In addition, when the one-shot 130 has switched to the HALT state, the H signal from the Q output is also applied to the input of the NAMD gate 1 ^ 5. The other inputs of the NAND gate 145 are connected to the output of the AND gate 144. Since the output of the AND gate 144 is always high when the one-shot has switched to the HALT state, it can be seen that the NAND gate delivers an L output signal as soon as the redundancy counter 76 has counted to four. The output signal (SYNC) from the NAND gate 1 ^ 5 is given to the controller Λ 6 to indicate to the controller 16 that the next 18 bits received from the DATA OUT terminal of the interrogator 14 correspond to the encoded transponder in the correct sequence »

In öex · preferred embodiment of the half one-shot I30 remains in HALT state for about 0.2 seconds, after which it returns to the RUN state. This time period is determined by the time constant of resistor R38 and capacitor C20 and is

709886/0704

chosen that it allows enough time for the encoded word is clocked by the shift registers 132, 13Ί and I36. Additionally clears the controller 16, since the controller 16 different Interrogators can monitor at the same time, a wide range of possibilities to recognize and process the information sent by each interrogator 14 comes.

Referring now to Figure 11, there is shown a block diagram of the controller or controller 16 in accordance with the present invention. The boxes located within the dashed line 25Ο represent the external devices for the controller 16. The devices located within the dashed line 2h represent the parts of the controller 16 that are related to the front panel control functions. The remainder of the block diagram represents the heart of the controller 16 including the memory unit 23Ο.

Generally speaking, the controller 16 is the one shown in the block diagram

in is shown in Fig. 11, in particular for use / the

present invention as an identification system for a Park-Für
garage «/ such an application is the controller i6

preferably suitable for sequential digital data

from the interrogator Ik to receive the encoded TransStatus or
represent ponder word to check the / status of the vehicle that was identified by the coded word, and determine from this status 2,11 whether the vehicle is allowed to drive into the garage or is allowed to drive out. In addition, in the preferred embodiment, the controller 16 has a device for visual

709886/0704

^273336A

Monitoring of the number of the requested vehicle and his Stand and a device for changing the stand of a particular vehicle · Also belongs to the block diagram of the controller 16, a programmer for programming the transponder 12 and immediately to check the operation to ensure that the intended coded word is appropriate Way was entered into the transponder 12.

In addition, it should be noted that as soon as the requested vehicle code has been transferred to the address shift register 232, the controller 16 performs the remainder of the status check and the Decision operation within a time that is significantly less than the duration of a single clock pulse, for example 150 microseconds is. Those skilled in the art will understand the following It is clear from the description that this enables the controller to use any number of different interrogators in to control and steer certain limits.

The controller 16 in Fig. 11 monitors three interrogators i4b and i4c. Each of the three interrogators i4a, ikb and the has its own DATA OUT connection which is connected to a data multiplexer 216 (DATAMUX) and the synchronization connection which is connected to a synchronization multiplexer 218 (SYNC MUX). In addition, the DATA OUT connections of the three interrogators i4a, i4b and i4c are connected to the various contacts of a multiple rotary switch 99 . The Ausvab ^ anschlufl Urehselialfcers of 199 m ± t * Aszeigeauswahl a multiplexer 201 which will be described below, respectively.

/ lh

709886/0704 " ^m "

Each of the multiplexers 216-220 has a plurality of Inputs, depending on the number of individual interrogators 14, the are to be monitored by the controller 16, and a single one Output · Of course, the demultiplexer 222 has a single input and a corresponding number of outputs. Accordingly is the description of multiplexers 216 through 220 alike applicable to the demultiplexer 222, only the terms "input" and "output" need to be interchanged.

In addition, each multiplexer 216-220 has a pair Select terminals connected to the output of a sample counter 224. From the following description it becomes clear that the number of required selection lines also depends on the number of interrogators 14 that are to be monitored. In particular, the number of select lines must be sufficient, a single binary representation for each interrogator 14 plus deliver one.

The sample counter 224 is connected to the system clock 225 and is designed to count successive sequences of 40 clock pulses. In particular, the counter delivers 224 a 0-0 output to the selection connections of the multiplexers 216 to 220 during the first 40 clock pulses, a 0-1 Output during the second 40 clock pulses, a 1-0 output during the third 40 clock pulses and a 1-1 output during the fourth 4o clock pulses. Each of the multiplexers 216

one
to 220 is suitable to output the signal one of the

four input lines to deliver, or in the case of OK

709886/0704 * ^{## /}

Demultiplexer 222 to deliver the input signal on one of the four output lines, and that during each of the four * kO clock pulse periods.

The serial output from DATA MUX 216 is applied to an address shift register 232. The address shift register is hardwired to provide the three most important bits in the encoded transponder word to a circuit 228 which determines whether the encoded word is a "valid thousand ⁿ ,

and the last ten significant bits in the coded word are given to memory unit 230. The phrase "valid Thousand "refers to a selected group

of a thousand consecutive numbers which are recognized by a special controller 16. All other numbers are ignored and are not under the control of controller 16. The output of SYNC MUX 218 also leads a synchronization gate or sync gate 225 to circuit 218 sur decoding the valid thousand. The circuit 218 for decoding the valid thousand is designed to generate a switch-on signal to deliver to the storage unit 23Ο if a Synchronisatioiisimpuls from the synchronization gate 223 is detected and if the three most important bits in the address sorting register 232 represent a valid thousand at this point in time.

The memory unit 23Ο has two output lines, an input / output line (Χ / θ) and a zxxr available / unavailable output line (l / l). Both outputs are connected to an OK DECISION circuit 238 which controls the

709888/0704 "* ^{/ l6}

Controls operation of gates 15a, 15b and 15c via OK DEMXJX 222. In addition, the output of a further multiplexer TYPE MUX 220 is also connected to the OK DECISION circuit 238. The inputs to the TYPE MUX 220 are hard-wired to match the input / output type of each of the three interrogators 1 * fa, i4b and 14c match. For example, suppose be that an L output signal to an output interrogator and an H output signal corresponds to an input interrogator, "and the interrogators 1 ^ a and i4b are supposed to be input interrogators and the interrogator i4c be an output interrogator, then the first two inputs on TYPE MUX 220 would be biased to +5 volts and the third input would be grounded.

As one recalls from the description of FIG. 9, the interrogator 1h is designed to generate a synchronization signal every time the same position of the coded transponder word has been recognized. Since there is no way to determine that the first bit received by an interrogator 14 corresponds to the first bit of the coded word, it is clear that it is very likely that a sync pulse will be provided to SYNC MUX 218 before the entire 18-bit word has been shifted into the address shift register 232. Since the memory unit is designed to read the contents of the address shift register 232 when it is triggered by a synchronization pulse from SYNC MUX 218 (assuming that the valid thousands test has been satisfactorily lost), it can be seen that in the event that the first synchronization pulse the storage unit 230 is already switched on,

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an incorrect vehicle test would be carried out.

To prevent this, each kO clock pulse period is divided into two periods of 20 clock pulses each. The first 20 clock pulses of each kO clock pulse period are used to delete and (hair the address shift register 232. To prevent

the
that the synchronization pulse was received during this period, the memory unit 23Ο switches on, a synchronization gate or gate 225 is provided. The synchronization gate 225 is inserted between SYNC JiUX 218 and circuit 228 for decoding the valid thousand and can send a synchronization pulse from the SYiJC MUX 218 only conduct when a signal from sample counter 224 is on line 227. In addition, sample counter 224 can only deliver a signal on line 227 during the last 20 clock pulses in every 40 clock pulse period from the SYNC MUX 218 only during the last 20 clock pulses in each kO clock pulse period. This ensures that the entire coded 18-bit word has been shifted into the address register 232 when the first synchronization pulse through the circuit 228 for decoding of the valid thousand was received.

Thus, during the last 20 clock pulses in each ho clock pulse period, the DATA MUX 216 continues to supply serial data to the address shift register 232 until a synchronization pulse arrives.

. •. / 78

709886/0704

The occurrence of a synchronization pulse during the lotzten 20 clock pulses indicates that the address shift register now contains the coded word in its successive position. After receiving a synchronization pulse from synchronization gate 225, the decoding circuit checks the valid ones A thousand the 3 most important bits in the address shift register 232, to determine if the word is an appropriate thousand. It should be noted at this point that in the event that the .Parking garage has a capacity of more than a thousand vehicles, valid thousand decoding circuit 228 can be easily adapted to check more than a thousand units.

If the three most significant bits of the encoded word in the address shift register 232 indicate that the word is a valid thousand, 228 provides the decoder circuit a switch to the memory unit 23O _f which supplies the memory address of the memory corresponding to the ten least significant bits in the address shift register 232 . To check the status of the identified vehicle, the memory unit 23Ο reads the information that is arranged in the memory address access. Each address arrangement in memory unit 230 contains two bits of information. The logic state of the first bit indicates whether the identified vehicle is in or outside the parking garage, the logic state of the second bit indicates whether the identified vehicle is permitted or not a capacity of a thousand vehicles

... / 79

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the writer unit 230 has a capacity of only 2000 bits needed. It will be apparent to those skilled in the art that these memory requirements are much less than those that are required if all individual vehicle codes were in the storage unit 230 would be stored. Thus, through the use of the vehicle code as a memory address Realized a substantial saving in the required storage capacity.

The one contained in the memory address accessed Information is given to the OK DECISION network 238. In addition, the two output signals from the memory unit 230 are sent to a group of status lamps 236 supplied, which visually indicate the status of the queried motor vehicle.

As mentioned above, the OK DECISION network 238 also receives the output from the TYPE MUX 220. The TYPE MUX 220 informs the OK DECISION network 238 whether the interrogator i4 is monitoring is an input or output interrogator. Since each interrogator 1U can only discover motor vehicles that approaching from a single direction, it is necessary to have a separate interrogator 1 ^ at each input and output the parking garage. It follows accordingly that in the event that an input interrogator is a particular vehicle is discovered to be the status of the vehicle in memory 230 "off" should. Likewise, if an input interrogator detects a vehicle, the vehicle's status should be "on" be.

709886/0704 ... / 80

The OK DECISION network 238 checks the on / off status of the vehicle against the output signal from the TYPE MUX 220 before it provides an output to OK DEMUX 222 to open the appropriate gate 15. In this way the system prevents a special one. Car in the parking garage, drives in, the transponder and gives it to a friend in an unauthorized vehicle so that he can also drive into the parking garage can.

In addition, before an output signal is supplied to the OK DEMUX 222 wi, rd, OK DECISION network 238 also requires that the queried Motor vehicle is suitably provided. Thus, it can be seen that the queried motor vehicle meets three conditions Its code must belong to the valid thousand, it must be appropriately provided, and its on / off status must be Add interrogator type.

In order to maintain the appropriate on / off status of the identified vehicle in the storage unit 230 of the controller 16, the status of the vehicle is automatically changed each time it enters or exits the parking garage. In particular, when an OK signal is provided by the decision network 238, an ⁿ write ⁿ signal is also generated which is fed to the storage unit 23O in order to invert the on / off logic status of the identified motor vehicle. In other words, if a suitably provided motor vehicle was just allowed to drive into the parking garage, the OK DECISION network 238 automatically changes the state of the motor vehicle.

709886/0704 ^{### / 81}

vehicles in storage unit 23O in "On", Likewise, If a properly prepared vehicle is allowed to leave the parking garage, the OK DECISION network 238 changes automatically the status of the vehicle in the storage unit 230 is "off".

To manually program the on / off or provided / not provided status of the vehicle is a program memory access (programmer memory access, PMA) 226 is provided. The input to PMA circuit 226 is connected to the output of one Sample counter 224, and the output from the PMA circuit 226 is due to a group of buttons 234 for modification of status. The PMA 226 can change the status buttons 234 turn on during the fourth 40 clock pulse period. However, in order to address the problems of access to the To avoid storage unit 230 before the desired information

in
mation complete / the address shift register 232 has been entered, the PMA circuit 226 is still able to activate the status change buttons 23 * 1 only when a signal from the sample counter 224 is present on line 227. In other words, only during the second half of the 40 clock pulse period, when the output from sample counter 224 is 1-1, can PMA circuit 226 turn on status change buttons 234 «

When switched on, the · on / off and provided / not provides status changes entered on the status change buttons 234 in the storage unit 23O to the Address places are written that last significant zshn

... / 82

709886/0704

273336A

Bits in the address shift register 232 correspond. Of the Memory address access during the PMA period is dependent on the deformation on the fourth input line to DATA MUX 216, which corresponds to the information that is on the Video ad 215 is displayed

For example, suppose that the provided / not provided status of a motor vehicle identified by the interrogator is to be changed a is provided to the display selection multiplexer 201. The manual selection button for the display MUX 201 is then set to "Interrogator" to allow the information from the interrogator 1 ^ a selected by the rotatable switch 199 to pass through. The output of the display selection MUX 201 is on the fourth input connection on DATA MUX 216 and also on an autosynchronous detector circuit 205. The autosynchronous detector circuit 205 is identical to the autosynchronous decoder 7 * 1 in "Interrogator 1 **, which was described above. The detection circuit 205 continuously checks the sequence of data received from the display selection MUX 201 until the identical position of the coded text has been recognized. Venn this occurs is IMD added 218 Synchroninipuls on line 207 to the fourth input of the SYKC MUX also on line 209 to the video display 215 "At substantially in dor same manner as the synchronization pulses supplied c by dio interrogators I4A, and 1 ^.

... / 83

709886/0704

273336A

The address shift register now also has the same sequence of data from the display selection MIJX 201 received as the detection slice 205 and contains the same encoded word in its consecutive position if the Synchronization pulse supplied by the detection circuit 205 will. Assume that the coded word is one of the valid thousands, the last ten significant bits of the coded word then becomes the address for access to the storage unit 230. The status change

of the provided / not provided status to the statusin
buttons 2Jh entered and / the program unit 230 on the

programmed into the accessed address.

In addition, the display unit 215 shows when the synchronization signal is received on line 209 from the detection circuit, the information from the display MUX 201 on. In this way, the user can visually verify the identity of the vehicle whose status has been changed through programming vurde.

More often, however, it will be desirable to program the initial status of a new transponder. To do this reach, the transponder 12 is inserted into the opening in the front panel of the controller 16, as shown in FIG. 13 is shown, and the number to be assigned to the transponder 12 is inputted by the setting circuit IS5. The number entered by the setting circuit 185 is stored in the transponder 12 by the transponder programmer

,., / Sh

709886/0704

273336A

200 programmed «As described in more detail below, the transponder programmer 200 has a" simplified "interrogator which optically clocks the transponder 12, detects the corresponding sequence of transponder pulses that represent the newly programmed information, and the information to the display selection MÜX 201 on line 203 returns. When the selection button on the display MUX 201 is set to ^M transponder ", the information from the programmed transponder 12 is passed to the fourth input of the DATA MUX 216 and to the autosynchronous detection circuit 205. The transponder information is then decoded and displayed on the video display 215 and in addition to the address shift register 232, where it determines the address which provides access to the memory unit 230, as mentioned above. When a synchronization pulse is generated by the detection circuit 205, again assuming that the programmed word belongs to the valid thousand the information entered through the changed status buttons 23 ^ is programmed into the memory unit 230 to the address contained in the address shift register 232 and displayed on the video display unit 215. In addition, to check that the correct status of the programmed transponder has been assigned, the status change is which has been entered into the memory unit 230 is indicated by the status lamps 236, whereby a visual check of the programmed status changes is made.

U.N

In order to authorize programming of the transponder 12 prevent, the controller 16 is preferably with a

... / 85

709886/0704

Closing switch 242 fitted in series with the setting switch I85 and the transponder programmer 200 switched is. In this way, everyone has information about the setting circuit 185 is entered while the key switch 242 is on display, does not affect the transponder programmer 200

Likewise, in order to prevent unauthorized program changes in the status of the motor vehicle, the controller is also preferably equipped with a key switch 244 placed in series between the programming memory access circuit 226 and the status change buttons 2jk. At issue, switch 244 prevents PMA circuit 226 from turning on status change buttons 234, thereby rendering status change buttons 234 ineffective.

Finally, the controller 16 has an anti-passage cutoff circuit 230, which is connected to the OK DECISION network 238. The purpose of the anti-continuity cutoff circuit is as follows: In the event of a power failure, it is possible that the entire memory 230 of the controller 16 will be destroyed can. In such a situation, the on / off and provided / not provided State that is checked by the OK DECISION network 238, cannot be varied prevent authorized cars from entering and exiting the parking garage. To prevent this, the anti-through output switch-off circuit 239 sends a signal to the OK DECISION network 238, if a power failure has occurred, which the

... / 86

709886/0704

allowed / not allowed and on / off checks eliminated. In other words, when the OK DECISION network 238 has an output receives from the anti-passage cutoff circuit 239, it improves its operation to allow any vehicle in the valid thousand to pass through.

It should be evident that the controller i6 is one of many possible embodiments that can be used to retrieve the information received from one or more

Interrogators are received to process. Generally depends the processing performed by the controller 16, on the needs of the user and the end use to which the system will be subjected.

For example, the controller 16 could also be connected to a printer that prints out the numbers of the vehicles entering the parking facility. The statement can then be used to generate monthly invoices. In addition, a timer can be used in conjunction with the printer to record the time each vehicle spends within the parking garage. This information can complement the above list and provide the information necessary to create a total billing list for hours at the end of each month. Thus, the device for processing the data information generated by an interrogator lh according to the present invention is not limited to the exact execution; of the controller 16 described above is limited.

... / 87

709886/0704

-pi-

A more detailed block diagram of the front control section 2h0 of the controller 16 is shown in FIG. 11a. The setting circuit 185 has a control panel 184, which contains a push-button number matrix, and the associated circuit which is necessary to display the binary-coded decimal representation of the numbers entered in the control panel The parallel output from the control panel 184 is equipped with a BCD binary converter 186, which converts the BCD signals from the control panel 184 to direct binary values. The parallel binary output of converter 186 is provided with an audio synchronous coding circuit 188 which is hard-wired to add the appropriate coding restrictions to the 13-bit binary word. In other words, the encoding circuit 188 adds the appropriate five restrictive bits to the 13-bit binary word in the appropriate bit positions to produce the encoded 18-bit word that is programmed into the transponder 12.

The series notification from the setting circuit I85 on line 189 is on the one hand to the inputs of a multiplexer 202 and on the other hand to the driver circuit 192 of the transponder programmer 200. As described in detail in connection with FIG. 12, driver circuit 192 amplifies the square wave signal from adjustment circuit 185 to a level suitable for input to the transponder The transponder 12 is designed to be inserted into the opening in the front panel of the controller 16 shown in FIG Fig. 13 is shown so that the input line 194 from the Driver circuit 192 to the PROGRAM IN connection (pin 1) of the

... / 88

709886/0704

Transponder shift register 38 is connected, and line 196 is connected to the ground connection (pin 7) of the transponder shift register 38 . When the transponder 12 is properly inserted into the front panel of the controller 16, so is it
arranged such that the phototransistor is 30 in optical communication with the LEO of the driver and the LED-S _c pose 190, and the discharge LED k2 of the transponder is in optical communication with the photodetector of the detector and processing circuit 19 ** 12th The 18-bit coded word is sequentially inserted into the
Shift register 38 of the transponder 12 entered via the charging line when the transponder 12 is optically clocked by the driver and the LED circuit 190.

To ensure that the correctly coded word has been programmed into the transponder 12, the driver and the
LED circuit 190 continues to optically clock transponder 12 after the encoded word has been entered into the transponder shift register. In this way, the newly pounded,
coded word emitted optically through the output LED kO of the transponder 12. The infrared output signals of the transponder are received by the detector and processing circuit 19 ^ which converts the optical signals into corresponding digital square wave signals.

The signal output from the detector and processing circuitry 194, which represents the coded word that goes into the transponder programmed is with a second input terminal of the multiplexer 202 connected. A third entrance on that

... / 89

709886/0704

Multiplexer 202 is connected to the rotary contact of a rotary switch 199. The various contact connections of the rotary switch 199 are connected to the DATA OUT connections of the various interrogators I ** which are monitored by the controller 16, as is shown in FIG. The multiplexer 202 provides an output signal to the video display unit 215 that corresponds to one of the signals on the three input lines according to the selection entered by the selector 198. As best shown in FIG. 13, the selector 198 has a pair of pushbuttons ^{labeled I1} Interrogator ^II and "Transponder ^M " and a "Control Panel" light which indicates activation of the control panel, which is automatic each time Each of the three states of selector 198 can provide a special digital signal on the two select lines to multiplexer 202 which is used to display one of the three input signals applied to multiplexer 202 for display of the video display unit 215. In addition, as described in connection with the description of Fig. 11, the ZaJxI shown on the display unit 215 also determines the address of the game unit 23Ο when accessed during the PMA period.

The row output from the multiplexer 202 is provided with an 18-bit shift register 204 of the autosynchronous detection circuit 205. Eight parallel output lines from the shift register 204, which correspond to the bit positions 1, 5, 8, 9, 10, 1 * 1, 17 and 18, are connected to an autosynchronous decoder circuit 206, which is identical to the decoder ^ k in the interrogator lh , with

709886/0704

... / 90

except that the controller-decoder 206 does not have a parity check performs. The decoder 206 continuously monitors the bit alignments that are displayed until they match Position of the coded word is recognized as soon as this occurs, the decoder 206 delivers a synchronization pulse or SYNC pulse on line 207 to the latch circuit 208, for the parallel input of the 13 information bits from the shift register 204 in latch 208 serves.

The decoded information from latch 208 is fed in parallel to a binary-to-BCD converter 210, which converts the binary information into binary-coded decimal form. This converted information is then supplied to the drivers and the display circuit, which receive at the same time h, the sync pulses from the decoder circuit 206 by a display gate 21, whereby the TasLber be set in a position to enable the video display ·

It can thus be seen that the programmed into the transponder 12 Number can be visually displayed on the display unit 215 as a direct check of the accuracy of the programming operation. In addition, as explained above, any number entered through the control panel 18 ^ is automatically displayed in the display unit 215 is displayed to provide a visual comparison with the number programmed into the transponder 12

Finally, it should be noted that as soon as the transponder 12 is programmed once with a new number and the number is shown on the display unit 215, the initial state,

709886/0704

which is assigned to the transponder 12 can be programmed into the memory unit 230 of the controller 16 simply by entering the desired status or state on the state change buttons 23k . As explained above, the status assigned to the transponder 12 is immediately indicated by the status lamps 236 which are arranged in the front window of the controller 16, as is shown in FIG.

Reference is now made to FIG. 12, in which a circuit diagram of the transponder programmer 200 is shown. The driver circuit 192 that conducts the coded word 19 ^ that is loaded in transponder 12 is designed to the voltage oscillations of the digital impulses, which from of the setting circuit I85 are received to increase. In particular the pulses appearing at the output of the setting circuit 185 have a voltage of about 0 to 3 volts, while the voltage of the digital pulses sent to the transponder 12 fed from driver circuit 192 on line 19 ^ will vary between 0 and 9 volts.

The driver circuit 192 has a pair of transistors 174 and 176. The output of setting circuit I85 on line 189 is connected to the base of the transistor 17 ^ through a resistor r46 and a diode D2. The emitter of the transistor

is grounded and to the base via the feedback resistor returned. The collector of transistor 17 ^ is with the base of transistor 176 through a resistor R ^ 9 and connected to + 9 volts via the resistor R ^ 8. The emitter of transistor I76 is also connected to + 9 volts, and the

70988S / 070A

Collector is earthed via the setting resistor R50. Of the Output of driver circuit 192 on line 194 is from the Collector of transistor 176 tapped through resistor R5I.

If there is a low signal on line 189, the missing makes positive bias at the base of transistor 174 den Transistor 174 not conductive If transistor 174 is switched off, there is a positive potential at the base of transistor 176, which means that transistor 176 is also not is conductive · Accordingly, there is a 194 on the output line L output signal · Conversely, if an H signal is on line 189, the positive potential at the base of the makes Transistor 174 this conductive. If transistor 174 is switched on, a direct current connection is created between + 9 Vafc and earth, creating a negative potential at the base of the Transistor 176 due to the voltage drop across the resistor r49 occurs · The negative potential at the base of the Transistor 176 "makes transistor I76 conductive, which in turn causes the output signal on line 194 to appear Swings 9 volts. Eventually, when the signal on line goes low again, both transistors 174 and 174 will turn again 176 not conductive, and the output potential on line 194 falls back to zero. Accordingly, it can be seen that the magnitude of the voltage rise of the square wave digital pulses obtained from the setting circuit I85, effectively through the driver circuit 192 for input to the Transponder 12 are amplified.

... / 93 709886/0704

The coded 18-bit word is optically entered into the shift register 38 of the transponder 12 clocked in by the LED and driver circuit I90. The driver and the LED circuit 190 have one Darlington transistor pair, the collector terminals of which are connected to a voltage of + 5 volts and the base of which is the clock signal received from the system clock 225. The emitter output terminal of Darlington transistor 170 is to the cathode connected to an LED 172, the anode of which is connected via a resistor R ^ 5 is grounded. Thus, the LED 172 supplies for each clock pulse that is applied to the base terminal of the Darlington pair of transistors 170 received, a corresponding infrared optical pulse,

The infrared pulses from LED 172 are sensed by phototransistor 30 of transponder 12 in the same manner as the sequence of interrogator pulses explained above. As has been described in connection with the operation of the transponder 12, the optical pulses which are detected by the phototransistor 30 are converted into digital clock pulses which are present at the clock connection (pin 3) of the shift register 38, which is shown in FIG . The clock pulses are circulating in the shift register 38, whereby the series according to the shift register 38, the encoded word from the ^one driver circuit 192 is programmed.

Once the 18-bit coded word has entered the shift register 38 has been entered, causes the further reception of infrared talct impulses from LED 172 to the transponder 12, with the Emission of infrared pulses that correspond to the newly programmed match coded word to begin. These infrared

709886/0704 ... / 9h

Transpband pulses are detected and converted into corresponding square wave digital pulses converted by the detector and processing circuit 19 ^.

The detector and processing circuit 19 ^ operates essentially as a "simplified x ¹ interrogator, it can be seen that a phototransistor I78 has its base connected to a voltage of +5 volts via a pair of series resistors R52 and R53. The middle point of the voltage divider network is grounded via a capacitor C25 and connected to the collector of the phototransistor I78. The capacitor-resistor combination R52 and C25 is used to eliminate any noise on the +5 volt supply line. The emitter of the phototransistor I78 is directly connected to the positive input terminal ( pin 2) of a comparator amplifier 180. In addition, the emitter of the phototransistor 178 is connected to the negative input terminal (pin 3) of the comparator amplifier I80 via a filter network comprising the resistors R ^ k and R55 and the capacitor C26 significant positive impulses on the output signal of the photo train sistors I78. It can thus be seen that the signal which is fed to the negative input connection (pin 3) of the comparator amplifier 180 represents a self-searching threshold signal which corresponds to the DC voltage value of the signal which is fed to the positive input connection (pin 2) of the comparator amplifier 180 is given, is related. The negative input (pin 3) of the comparator amplifier 180 is also with a + 5 volt bias through the resistor

709886/0704 * ~ ^{/ 95}

R56 connected to ensure that the threshold of the signal which is led to the negative input (pin 3) of the Koraparat or amplifier 180, always a little higher than the DC voltage of the Signal is given to the positive input (pin 2), as shown in the associated signal diagram.

The comparator amplifier 180 can provide a positive output signal every time the signal at the positive input terminal (pin 2) is greater than the signal at the negative input terminal (pin 3). It can thus be seen that the comparator amplifier 180 provides an output signal every time a positive pulse present at the positive input connection (pin 2) which occurs every time an infrared optical pulse is received was detected by the phototransistor 178.

The output from the comparator amplifier I80 is applied to a latch circuit 182 which is identical to the latch 72 of the interrogator Ik is-fc. Bex input of latch 182 is also biased ν <5η + 5 volts through resistor R75, and grounded through capacitor C27 to ensure that the input pulses from comparator amplifier 180 are between 0 and 5 volts. Thus, the latch circuit 182 ensures that a sharp digital signal is supplied to the multiplexer 202, which is in a suitable, temporal relationship to the system clock 225.

While the above description represents the preferred embodiment of the invention, it will be understood that the invention is susceptible to modification, variation and change without departing from the scope of the appended claims.

709886/07 (H ... / 96

Claims (1)

P ^α t entans p ruche: . ' System for the remote identification of an object according to Patent ... (patent application 26 36 414) with a transponder assigned to the object to be identified, which contains information that identifies the object and an interrogator for determining the Identification of the object, characterized in that the interrogator transmits an interrogator signal, that has a predetermined clock frequency to receive signals to detect from the transponder which are representative of the identification information, and that the transponder Has devices that are in resonance with the clock frequency and serve that they the transponder with the clock frequency in response to the receipt of the interrogator signal, a sequence of transponder pulses can be transmitted, which represent the identification information in signal form. 2. Identif izierungssystcan according to claim 1, characterized in that that the information transmitted by the transponder is coded in sequence in order to identify the of the beginning of the code. 3. Identification system according to claim 2, characterized in that that the interrogator still has decoding measures to the beginning of the sequentially encoded information to determine. 709886/0704 ^ • «•» NAL INSPECTED 4. Identification system according to claim 3, characterized in that that the decoder has a redundancy counter which requires the interrogator to have a predetermined one Number of sequences of transponder pulses recorded and queried in order to precisely identify the object to ensure. 5. Identification system according to claim 4, characterized in that that the decoder further has a device for parity checking to each pulse ir given sequence of transponder pulses check against the corresponding pulse in the subsequent sequence of transponder pulses and a signal supply, which is used to restart the interrogation process in the event that the compared pulses are not equal are. C. Identification system according to claim 1, characterized in that that the means for resonance are further designed to prevent the transponder from transponder pulses in response to the receipt of other, previously emitted transponder pulses. 7. Identification system according to claim 1, characterized that the interrogator signal processing means owns to mostly from the received signals remove relatively low frequency background noise. ... / 98 709886/0704 8. Identification system according to claim 7, characterized in that that the signal processing means have a delay which is responsive to the received signal, to provide a delayed signal that corresponds to the received signal. 9. Identification system according to claim 8, characterized in that that the signal processing means furthermore have subtracting means for subtracting the one of the delayed and detected signal from the other of the signals and provide a resultant signal corresponding to the detected Signal is related, but the low-frequency background noise is significantly reduced. 10. Identification system according to claim 9, characterized in that that the delayed signal includes the detected signal delayed by a period of time that is substantially the duration of one of the transponder pulses is equivalent. 11. Identification system according to claim 10, characterized in that that the delay means have a delay line connected to receive the received signal and supplies a time-delayed detected signal to the subtraction means. 12. Identification system according to claim 10, characterized in that that the subtraction means measures for inverting the delayed signal or the detected signal 709886/0704 ... / 99 own and the inverted and algebraically sum the non-inverted signal. 13. Identification system according to claim 1, characterized in that that the interrogator has a first comparator for determining whether the detected signal from the interrogator contains the information transmitted by the transponder. 14. Identification system according to claim 13, characterized in that that the first comparator is designed to receive the detected signal at its input and to deliver a signal at the output when the signal at the input exceeds a first predetermined threshold value. 15. Identification system according to claim 14, characterized in that that the interrogator further has an integrator for integrating the detected signal before it is fed to the input of the first comparator. 16. Identification system according to claim 15, characterized in that that the first comparator has a comparator amplifier, one input of which is designed to record the detected signal, and its other input n is connected to a first predetermined threshold DC voltage, such that when the detected signal via the first threshold voltage, a signal is generated at the output of the amplifier. 709886/0704 ... / 1OO 17. Identification system according to claim 16, characterized in that that the interrogator is AC coupling owns that with a. Input of the comparator amplifier is connected to any DC voltage that is detected in the Signal is present, remove it. 18. Identification system according to claim 14 ,. characterized, that the interrogator has a first suppression to suppress ambiguous pulses, so that the Interrogator previously used by the first comparator as recognized transmitted by the transponder / discards information as soon as the detected signal does not match the first predetermined Exceeds threshold value, but a second predetermined Exceeds threshold. 19. Identification system according to claim 18, characterized in that that the first suppression has a second comparator which has the detected signal at its input receives and delivers a signal at the output when the signal at the input has the second predetermined threshold value exceeds. 20. Identification system according to claim 19, characterized in that that the second comparator has an amplifier, one input of which receives the detected signal can, and the other input of which is connected to a second DC threshold voltage which is lower than the first threshold voltage, so that when the detected signal exceeds the second threshold value, a signal is generated at the output of the amplifier. 709886/0704 ... / 101 21. Identification system according to claim 19, characterized in that that the first suppression for ambiguous pulses still has a logic that is suitable for signals from the outputs of the first and second comparators and to determine when the detected signal exceeded the second predetermined threshold but not the first predetermined threshold. 22. Identification system according to claim 21, characterized in that that the first logic contains a logic gate which is designed to generate a first logic signal at the output to occur as soon as a signal occurs at the output of the second comparator, but not at the output of the first comparator. 23. Identification system according to claim 22, characterized in that that the logic gate is also designed to allow a second logic signal to appear at the output, as soon as a signal appears at the outputs of both the first and the second comparator. 24. Identification system according to claim 18, characterized in that that the interrogator also has a clock generator for generating a clock signal with the clock frequency, and a second logic to cause the interrogator to ignoring the output signals from the first comparator that are not during a predetermined interval of the clock signal are pending. ... / 102 709886/0704 25. Identification system according to claim 24, characterized in that that the interrogator has a second suppression for ambiguous impulses that the interrogator Discard information previously determined by the first comparator as being transmitted by the transponder as soon as the first comparator has no output signal v / uring a predetermined period of time of the clock signal supplies. 26. Identification system according to claim 25, characterized in that that the predetermined time period includes the period at the end of the predetermined interval specified in is essentially the same as the duration of a single transponder pulse. 27. Identification system according to claim 25, characterized in that that the second logic has a logic gate which receives the clock signal at one input and the output signal of the first comparator ara other input and a logic output signal is generated each time a Output signal from the first comparator v / is received during the predetermined interval of the clock signal. 28. Identification system according to claim 27, characterized in that that the second suppression for ambiguous pulses has a circuit between the clock and one input of the logic gate is connected to prevent the logic gate from generating logic output signals upon receipt of an output signal from the 709886/0704. ... / 1Oj ί 273336Α first comparator during the predetermined period of time of the predetermined interval of the clock signal. 29. Identification system according to claim 28, characterized in that that the circuit has a univibrator that sends a first logic signal to the logic gate during of the predetermined period of time and provides a second logic signal to the logic gate during equalization of the predetermined interval of the clock signal. 30. Identification system according to claim 1, characterized in that that the interrogator signal is a sequence of pulses transmitted at the predetermined clock frequency will have. 31. Identification system according to claim 30, characterized in that that the transponder continues to have a delay for the transmission of the sequence of transponder pulses in relation to the reception of the sequence of interrogator pulses possesses, so that the transmission of the transponder pulses lies between the reception of the interrogator pulses. 32. Identification system according to claim 31, characterized in that that the interrogator also has a mask to remove the detected reflex signal of the interrogator impulse that is detected by the interrogator. 33. Identification system according to claim 32, characterized in that that the blanking is a blanking circuit 709886/0704 ... / 104 seated, the connected to the recording of the detected signal, and is capable of preventing the passage of a portion of each cycle of the detected signal derived from the clock frequency is intended to block, the blocked part of each cycle being the segment of the detected signal in which the reflected interrogator pulses are to be expected. 34. Identification system according to claim 33, characterized in that that the masking circuit is designed to go from a usually low impedance state to a high impedance state during the signal parts switch. 35. Identification system according to claim 1, characterized in that that the transponder draws energy from a portable energy source. 36. Identification system according to claim 35, characterized in that that the transponder is designed to be a much larger. Power from the portable power source to be obtained when it sends out transponder pulses, in contrast to the one obtained when pulses are not emitted Power. 37. Identification system according to claim 36, characterized in that that the intenogator is an oppression to oppression transmission of the interrogator signal as soon as the transponder is identified by the interrogator 709886/0704 ... / 105 273336A has been verified so that the life of the portable transponder power source is increased. 38. Identification system according to claim 37, characterized in that that the suppression suppresses the transmission of the interrogator signal for a predetermined period of time, after which the interrogator resumes transmitting the interrogator signal. 39. Identification system according to claim 35, characterized in that that the output voltage of the portable energy . source decreases as the portable power source becomes weaker. 40. Identification system according to claim 39, characterized in that that the interrogator clock generator for generating a clock signal at the predetermined clock frequency to control the transmitted interrogator signals. 41. Identification system according to claim 40, characterized in that that the interrogator a device for checking the state of the portable energy source from the Distance by comparing the temporal arrangement of the detected transponder pulses relative to the clock signal. 42. Identification system according to claim 1, characterized in that that the interrogator signal is a sequence of op- 709886/0704 ... / 106 - κ has table pulses. 43. Identification system according to claim 42, characterized in that that the transponder has an optical transmitter for receiving the optical interrogator pulses, which generates corresponding electrical impulses. 44. Identification system according to claim 43, characterized in that that the optical transmitter comprises a phototransistor which is biased so that it is in the linear Area is entered. 45. Identification system according to claim 44, characterized in that that the transponder has an amplifier that receives the output of the phototransistor to the electrical To amplify pulses generated by the phototransistor. 46. Identification system according to claim 45, characterized in that that the amplifier has an operational amplifier with a Q operating characteristic. 47. Identification system according to claim 45, characterized in that that the transponder still has an AC coupling between the output of the phototransistor and the input of the amplifier is arranged to substantially receive interference from the amplifier off caused by constant light sources. 709886/07 (H. - 19 / - 48. Identification system according to claim 43, characterized in that the optical transmitter with a portable Energy source is connected. 49. Identification system according to claim 4 "8, characterized in that that the transponder has a circuit to prevent a substantial current drain from the portable Energy source possessed by the optical transmitter when the optical transmitter is directly exposed to sunlight is. 50. Identification system according to claim 49, characterized in that that the optical transmitter and the circuit have a phototransistor connected so that it acts as a photodiode. 51. System for remote identification of objects according to Patent ... (patent application 26 36 414), characterized by a transponder assigned to the subject is and can transmit a sequence of transponder pulses that contain information in signal form, the identifies the item, and an interrogator to identify the object with a detector for detecting the sequence of transponder pulses and Delivery of a detector signal which corresponds to the recorded sequence of transponder pulses and an interrogation option for interrogating the detector signal to determine the identification information, with suppression for ambiguous impulses to give the interrogator the identity 709886/0704 ... / 108 Then repeat the fizing process of the object each time to let v / enn the detector signal a preselected one Has signal characteristic that, by definition, does so is designed to indicate the possibility that the detector signal may be related to a random one, which is detected by the detector instead of the transponder pulse became. 52. Identification system according to claim 51, characterized in that that the suppression for ambiguous pulses has a circuit that generates a reset signal can be used to restart the processing for identification of the object is used each time the amplitude of the detector signal has a second predetermined Value exceeds, but does not exceed a first predetermined fourth. 53. Identification system according to claim 52, characterized in that that the circuit has a first comparator which can detect the detector signal at the input and provides a signal at the output when the amplitude of the detector signal exceeds the first predetermined VTert, a second comparator detects the detector signal at the input and supplies an output signal at the output, when the amplitude of the detector signal is predetermined at the two sides Value exceeds, and a logic for generating the reset signal ε each time when the second communication and
parator an output signal / from the first comparator none Output signal is supplied. 709886/0704 ... / 109 54. Identification system according to claim 53, characterized in that that the query continues to have an integrator for integrating the detector signal before it starts the inputs of the first and the second comparator is applied. 55. Identification system according to claim 54, characterized in that the query further has an AC coupling which is connected to the output of the integrator and the input of the first and the second comparator for removing any DC voltage component from the integrated detector signal. 56. Identification system according to claim 51, characterized in that that the suppression for ambiguous pulses has a circuit that can generate a reset signal, which is used to restart the processing of the identification of the object every time the temporal arrangement of a detector signal relative to that of the transponder pulse within a predetermined Time period. 57. Identification system according to claim 56, characterized in that that the circuit has a comparator which then produce an output signal at the output each time can, if a detector signal, which corresponds to one of the transponder pulses, appears at the input, and a logical one Circuit generates the reset signal every time there is no output signal during the predetermined time period is generated by the comparator. 709886/0704 ... / no 58. Identification system according to claim 57, characterized in that that the logic circuit has a logic gate, one input of which is to receive the output connected by the comparator and the other input is connected to the output of a univibrator, which is a can supply a first logic signal to the logic gate during the predetermined period of time and a second logic signal for a predetermined time interval immediately after the predetermined time period. 59., identification system according to claim 58, characterized in that that the query also has a clock that is designed to generate a clock signal, the logically vahr, during the predetermined period of time of the prepaid time interval, and logically false at any other time. 60. Identification system according to claim 59, characterized in that that the logic circuit still has latches whose set input connection to the output of the logic gate is connected, and the reset input terminal is connected to the clock generator, the latches provide a latch signal on the reset output terminal during the predetermined time period only if the capacitor does not provide an output signal to the logic gate during the predetermined time interval. 61. Identification system according to claim 60, characterized in that that the logic circuit continues to be a logic 709886/0704 ... / 111 that is connected to the reset output terminal of the buffer is connected to generate the reset signal each time the latch signal and an output signal are generated by the comparator at the same time. 62. Identification system according to claim 51, characterized in that that the query still has a redundancy counter, which requires that the interrogator a predetermined Number of .Sequences of transponder pulses recorded and interrogated in order to start the identification process of the subject and that the suppression for ambiguous pulses provide an output signal can, which is used to set the redundancy counter to zero every time the detector signal a preselected signal characteristic to v / eist. 63. Identification system for removed objects according to Patent ... (patent application 26 36 414) with a transponder assigned to the object to be identified and an interrogator to determine the identification of the object, characterized in that the interrogator is a sequence of interrogator pulses with a outputs predetermined clock frequency, and the transponder has a first stage with a receiver for receiving the Sequence of interrogator pulses and delivery of an output signal in relation to the received sequence of interrogator pulses owns and a second S ^ tafe saifc a resonance filter that uses the clock frequency to filter the signals received by the receiver 709886/0704 ... / 112 a frequency other than the clock frequency is in resonance, and in The third stage is a clock generator for delivering a clock signal of the clock frequency in response to that of the Resonance filter received signals is provided, a fourth stage has a memory that contains data to identify the object and the successive data stored in response to the Receipt of the clock signal from clock generator can output, and a fifth stage transmission means for receiving the sequence of data from the memory and for the transmission of a corresponding sequence of transmitter pulses owns. 64. Identification system according to claim 63, characterized in that that the clock continues to transmit the sequence of transmitter pulses relative to reception the sequence of interrogator pulses can delay, so that this transmission of the transponder pulses between the reception of the interrogator impulses. 65. Identification system according to claim 64, characterized in that that the contactor has a Schmitt trigger, which has an output signal with a sequence of square wave pulses can output, which is started when the output of the resonance filter a predetermined Trip height exceeds, and that is terminated when the output of the resonance filter drops to zero. ... / 113 709886/0704 6ό. Identification system according to claim 65, characterized in that characterized in that the memory respond to the trailing edge of the sequence of square-wave pulses can. 67. Identification system according to claim 63, characterized in that the polarity of the third stage of the transponder is inverted with respect to the polarity of the second stage of the transponder. 68. Identification system according to claim 63, characterized in that the polarity of the fifth stage of the transponder is inverted with respect to the polarity of the second stage of the transponder. 69. Identification system according to claim 63, characterized in that the polarity of the third stage of the transponder is inverted with respect to the polarity of the first stage of the transponder. 70. Identification system according to claim 63, characterized in that the polarity of the fifth stage of the transponder is inverted with respect to the polarity of the first stage of the transponder. 71. Identification system according to claim 63, characterized in that the polarities of the third and fifth stages of the transponder are inverted with respect to the polarities of the first and third stages of the transponder, whereby the stages of the transponder spatially 709886/0704 can be arranged relatively close to each other without interstage instabilities in arise from the transponder. 72. Identification system according to claim 63, characterized in that that the sequence of interrogation pulses a Contains sequence of optical pulses, and the unit receiver an optical transfer carrier / ^ which on the responds to optical interrogation pulses for generating a corresponding sequence of electrical pulses. 73. Identification system according to claim 72, characterized in that the transponder also has a Has portable power source connected to the optical transmission. 74. Identification system according to claim 73, characterized unit marked that the optical transmit) / a optical transmitter and circuitry to prevent significant power draw from the portable Source of energy through the optical transmitter if the optical transmitter is directly exposed to sunlight is exposed. 75. Identification system according to claim 74, characterized characterized in that the optical transmitter and the circuit have a phototransistor which so is connected that it serves as a photodiode. ... / 115 709886/0704 76. System for remote identification of an object according to patent (patent application 26 36 414) with a transponder assigned to the object to be identified, which contains the information relating to the object identifies, contains, and an interrogator to determine the identification of the object, characterized in that the interrogator has a transmission for transmitting an interrogating Has signal with a predetermined clock frequency, and the transponder has an input circuit for reception of the interrogation signal, and an output circuit for transmitting a transponder signal that the has identifying information in response to receipt of the interrogator signal in the input circuit, wherein the output circuit is inverted with respect to the input circuit to the spatial Allows arrangement of the input circuit and the output circuit in close proximity without causing a detrimental interaction between input and output circuitry, the instabilities could cause in the transponder. · ■ 77. Identification system according to claim 76, characterized in that that the input circuit has a first stage with a receiver for receiving the interrogation signals and provides an output signal associated with the received interrogation signal, and has a second stage with a resonance filter, ... / 116 709886/0704 that in the clock frequency for filtering the signals received by the receiver with a different than the clock frequency is used. 78. Identification system according to claim 77 »characterized in that the output circuit is a third Stage with a clock for supplying a clock signal with the clock frequency in response to that of the input circuit contains received signals, a fourth stage has a memory that contains the contains identifying information and the output of the stored information in response to the reception of the clock signal from the clock is used, and a fifth stage has a transmitter for Receiving the identification information from the memory and related to the transmission of the transponder signal with the identification information. 79. Identification system according to claim 78, characterized in that the clock has a Schmitt trigger which can deliver an output signal with a sequence of square-wave pulses that are started, if the output of the resonance filter exceeds a predetermined trigger threshold and the are terminated, when the output of the resonance filter drops to zero. 80. Identification system according to claim 79 »characterized in that the memory on the rear Can respond to edges of the sequence of square pulses. 709886/0704 ... / 117 - ryf - 81. Identification system according to claim 78, characterized in that the sequence of interrogation pulses contains a train of optical pulses and that the receiver unit has an optical transmission on the optical interrogation pulses to generate a corresponding sequence of electrical pulses appeals to. 82. Identification system according to claim 81, characterized in that the transponder also has a portable power source that is compatible with the optical unit
Transmitter / is connected. 83. Identification system according to claim 82, characterized unit characterized in that the optical transmits a optical transmitter and circuitry to prevent substantial drainage of power from the portable Contains energy source through the optical transmitter, unit when the optical transmit / direct sunlight is exposed. 84. Identification system according to claim 83, characterized in that the optical transmitter has a Phototransistor, whose base is connected to the portable power source, whose emitter connection is open and its collector is connected to an amplifier via a capacitor. ... / 118 709886/0704 23 273336Α 85. System for remote identification of an object according to patent (patent application 26 36 414), characterized by a transponder that is assigned to the object and is used to create a sequence of transponder pulses with an object to transmit identifying information, and an interrogator with a detector for detection the sequence of transponder pulses and delivery of an output signal in connection with the detected Sequence of transponder pulses, and a Signalver ~ processing for receiving the output signal and for ·> Substantially removing the low frequency background noise from the output signal, the signal processing applying a delay in response to the output signal to provide a delayed signal representative of but delayed with respect to the output signal by a time period substantially equal to the period of one of the Corresponds to transponder pulses, and a subtracter subtracts the output signal or the delayed signal from the other to obtain a resultant signal corresponding to the output signal from which the relatively low frequency background noise has been substantially removed . 86. Identification system according to claim 85, characterized in that the delay is a delay 709886/0704 ^{tti / i19} line that has to receive the output signal is connected and connected to the delivery of the delayed signal to the subtraction device is. 87. Identification system according to claim 85, characterized in that that the subtraction means an inversion for the output signal or the delayed Signal and a summer algebraically sums the inverted and non-inverted signal. 88. System for remote identification of an object according to patent ... (patent application 26 36 414) with a transponder belonging to the object to be identified, which contains the information for identifying the object, and an interrogator for determining the identification of the object, characterized in that, that the interrogator can be operated to transmit an optical interrogation signal and to detect the signals from the transponder, which represent the identification information, and the transponder has an input for receiving the optisdien interrogator signal and generates a corresponding clock signal, and an output on the clock signal for transmitting a Transponder signal responds »< generally represents the identification information, the input having an optical transmitter which is connected to a portable electrical energy source to convert the optical interrogation signal into a corresponding electrical signal 709886/0704 ... / 120 273336A to convert, and a circuit connected to the optical transmitter to convert a prevent substantial current flow from the portable electrical power source through the optical transmitter, when the optical transmitter is exposed to direct sunlight. 89. Identification system according to claim 88, characterized in that the optical transmitter has a Has phototransistor whose emitter connection is open is. 90. Identification system according to claim 09, characterized characterized in that the circuit provides a connection between the base of the phototransistor and the portable Energy source and the collector of the phototransistor via a capacitor to the input of an amplifier. 91. Identification system according to claim 88, characterized in that the interrogator for transmission des.optischen query signal is designed with a predetermined clock frequency and that the input of the The transponder also has a resonance filter, which is used in the clock frequency to filter out signals, which are received by the optical transmitter and which have a different frequency than the clock frequency, is in resonance. 709886/0704 ... / 121 92. Identification system according to claim 88, characterized in that the transponder signal is one Has sequence of transponder pulses. 93 · Identification system according to Claim 92, characterized in that the Information is encoded in order to identify the beginning of the code enable. » 94. Identification system according to claim 93, characterized in that the interrogator furthermore a Has decoder for determining the beginning of the successively encoded information. 95. Identification system according to claim 94, characterized in that the decoder has a redundancy counter which requires that the interrogator a predetermined number of sequences of transponder pulses detected and interrogated in order to establish the exact identification of the object. 96. Identification system according to claim 95, characterized in that the decoder further has a parity checker for checking each pulse in a given sequence of transponder pulses against the corresponding pulse in the subsequent sequence of transponder pulses and a ... / 122 709886/0704 Provides a signal that is used to answer the query in the In the event that the compared pulses are not equal, start again. 97. Identification system according to claim 91, characterized in that the resonance filter furthermore serves, the transponder in the transmission of the transponder signal in response to the reception of the preceding transmitted = to prevent transponder signal. 98. _N identification system according to claim 88, characterized in that the interrogator has signal processing in order to essentially remove the relatively low-frequency background from the detected signal. 99. Identification system according to claim 98, characterized in that the signal processing has a delay responsive to the sensed signal to provide a delayed signal relevant to the sensed Signal is representative. 100. Identification system according to claim 99, characterized in that the signal processing continues a subtracter for subtracting the delayed signal or the detected signal from each other and produces a resultant signal that corresponds to the detected signal, but in which the low frequency Background noise is essentially removed. 709886/0704, ... / 123 101. Identification system according to claim 100, characterized in that the delayed signal is the includes detected signals delayed by a period of time, the period of time being substantially equivalent to that of Duration of a transponder pulse. 102. Identification system according to claim 101, characterized in that the delay is a delay line which is connected to receive the detected signal and to the subtracter provides a time-delayed detected signal. 103. Identification system according to claim 101, characterized in that the subtracter has means for inverting the delayed or the detected signal and a summer algebraically sums up the inverted and the non-inverted signal. 104. Identification system according to claim 88, characterized in that the interrogator furthermore has a has a first comparator for determining whether the signal detected by the interrogator is that of the transponder contains transmitted information. 105 · Identification system according to Claim 104, characterized in that the comparator for receiving the detected signal at its input and then to supply a signal at the output, when the signal is at Input exceeds a first predetermined threshold value, is designed. 709886/0704 ... / 124 106. Identification system according to claim 105, characterized characterized in that the interrogator includes an integrator for integrating the detected signal prior to analog to the input of the first! comparator. 107. Identification system according to claim 105, characterized in that the first comparator is a Has comparator amplifier, one input of which is designed to receive the detected signal and the other input of which is connected to a first predetermined DC voltage threshold value in such a way that if the detected signal exceeds this threshold voltage, a signal is sent to the output of the amplifier is produced. 108. Identification system according to claim 107, characterized in that the interrogator furthermore a Has AC coupling connected to one input of the comparator amplifier to each Remove DC component in the detected signal. 109 · Identification system according to claim 105, characterized in characterized in that the interrogator further has a suppression for ambiguous pulses, thereby the interrogator one previously determined by the first comparator as being transmitted by the transponder Drops information every time the detected signal does not exceed the first threshold value, however, exceeds a second predetermined threshold value. 709886/0704 ... / 125 110. Identification. ^ R / oxem according to claim 109, thereby ^ ekerm marks that the first oppression for ambiguous signals has a second comparator which receives the detected signal at its input can and generates a signal at the output if the signal at the input exceeds the second predetermined threshold value exceeds. 111. Identification system according to claim 110, characterized in that the second comparator has a Has amplifier, one input of which is designed to receive the detected signal and the other Input is connected to a second DC voltage threshold which is lower than the first predetermined Threshold is so that when the received signal is exceeded the second threshold value Signal is generated at the output of the amplifier. 112. Identification system according to claim 110, characterized characterized in that the first suppression for ambiguous pulses continues to have a first logic, which can receive the signals from the outputs of the first and second comparators to determine when the detected signal has exceeded the second predetermined threshold, but not the first predetermined threshold. ... / 126 709886/0704 273J36A 113. Identification system according to claim 112, characterized indicated that the first logic is a Log.i>. ~ ati; or which is designed to generate a logical signal at the output to lr.cden, each time if there is a signal at the output of the second! Comparator is present, but not at the output of the first comparator. 114. Identification system according to claim 113, characterized characterized in that the logic gate continues to present a second logic signal at the output, every time a signal is present at the outputs of both the first and the second comparator. 115 · Identification system according to claim 109, characterized in characterized in that the interrogator further includes a clock for generating a clock signal with a Clock frequency, and a second logic that the interrogator the output signals from the first comparator, which are emitted during an interval other than the predetermined interval of the clock signal, Lets ignore. 116. Identification system according to claim 115, characterized characterized in that the interrogator further has a second suppression for ambiguous pulses, which the interrogator to drop one beforehand ... / 127 709886/0704 «•• INAL INdPECTED - ι yr by the first comparator as certain information transmitted from the transponder each time then drops when the first comparator has an output signal during a predetermined time period of the provides a predetermined time interval of the clock signal. 117. Identification system according to claim 116, characterized characterized in that the predetermined time period detects the period at the end of the predetermined interval, which is essentially equal to the duration of a single transponder pulse. 118. Identification system according to claim 116, characterized characterized in that the second logic has a logic gate which is used to receive the clock signal at the one input and the output signal of the first comparator is designed at the other input, and one logic output signal every time an output signal from the first comparator during the predetermined interval of the clock signal is received. · ■ 119 · Identification system according to claim 118, characterized characterized in that the second ambiguous pulse suppression has a circuit which between the clock and the one input of the logic gate is inserted to generate the logic gate of the logical output signal when receiving an output 709886 / 070A ... / 128 output signal from the first comparator during the predetermined time period of the predetermined ZsitintervaHs of the clock signal. 120. Identification system according to claim 119, characterized characterized in that the circuit has a univibrator capable of providing a first logic signal to the logic gate during the predetermined period of time and a second logic signal to the logic gate to provide during the equalization of the predetermined interval of the clock signal. 121. Identification system according to claim 92, characterized in that the optical interrogation signal is a Has sequence of optical interrogation pulses. 122. Identification system according to claim 121, characterized characterized in that the output of the transponder continues to have a delay for the transmission of the sequence of Transponder pulses relating to the reception of the sequence of interrogator pulses through the optical transmitter possesses, so that the transmission of the transponder pulses between the reception of the interrogator pulses. 123. Identification system according to claim 122, characterized in that the interrogator furthermore a Masking to remove the detected signal, which consists of the reflected interrogator pulses, the detected by the interrogator. 709886/07 (H ... / 120 2 ^r '33364 124. Identification system according to claim 123, characterized in that the masking is a masking circuit has, which is connected to receive the detected signal and the passage of a Part of each cycle of the detected signal, as determined by the clock frequency, is blocked, the blocked portion of each cycle corresponding to the portion of the detected signal in which the reflected interrogator pulses are expected. 125. Identification system according to claim 124, characterized characterized in that the blanking circuit is its usually low impedance state in a high impedance state while the signal component changes. 126. Identification system according to claim 88, characterized characterized in that the interrogator continues to suppress the transmission of the Interrogator signal as soon as the transponder once identified by the interrogator, so that the life of the portable electrical power source is increased. 127. Identification system according to claim 126, characterized characterized in that the suppression of the transmission of the interrogator signal for a certain period of time suppressed after the interrogator starts transmitting interrogator signals again. 7HQBPP / 0704.,. / 130 128. Identification system according to claim 88, characterized marked that the polarity of the output of the Transponder regarding the polarity of the input is inverted, so that the input is spatially proportional can be placed near the exit without interactions between the entrance and the output which could cause instabilities in the transponder. 129. Identification system according to claim 88, characterized ^ indicated that the output voltage of the portable Energy source decreases when the condition of the energy source deteriorates. 130. Identification system according to claim 129 »characterized in that the interrogator has a clock for generating a clock signal with a predetermined clock frequency to control the transmission of the optical Interrogation signal detected. 131. Identification system according to claim 130, characterized in that that the interrogator continues to have a device for checking the distance of the state of portable energy source by comparing the temporal arrangement of the detected transponder signals relative to the clock signal. ... / 131 709886/0704 132. System for remote identification of an object according to patent .... (patent application 26 36 414) with a transponder assigned to the object to be identified and an interrogator for loading; Mood of the identification of the object, characterized in that the transponder has a transmitter for transmitting a transponder signal with information that identifies the object in response to the receipt of a switch-on signal, and the interrogator has a transmission for transmitting the switch-on signal, a detector for Detection of the transponder signal in order to enable the interrogator to identify the object and a suppression which, in response to the signal information from the transponder which is sufficient to identify the object, _{speaks to r} , in order to prevent the interrogator transmission from the switch-on signal for transmission after the interrogator has determined the identification of the object. 133. Identification system according to «Claim 132, characterized in that that the suppression prevents the transmission of the switch-on signal for a pre_- Prevents a certain period of time after which the transmission starts again with the transmission of the switch-on signal. ... / 132 709886/0704 3} 273336A 134 ·· Identification system according to Claim 132, characterized in that characterized in that the transponder draws its energy from a portable energy source contained in it and a much larger amount he
Power draws when / the transponder signal transmits in relation to the non-transmission of the transponder signal. 135 · Identification system for motor vehicles according to Patent (patent application 26 36 414), characterized by a transponder that the motor vehicle, that is to be identified is assigned, and contains numerical information that the motor vehicle identified, and an interrogator to determine the identification of the motor vehicle and deliver a Output signal in connection with the numerical information, a control unit with a memory unitjüe contains the information relating to the motor vehicle in the memory address that the Motor vehicle identifying numerical information corresponds to address access measures to receive the Output signal from the interrogator and access to the Memory address array, and an output control for providing an output control signal in connection with the information contained in the memory unit at the memory address location. .. »/ 133 7Q9886 / 07CU 136. A transponder programmer for a transponder with a receiver with an optical transmitter that responds to the generation of remote optical clock signals responds to a corresponding electrical clock signal, a memory which is responsible for supplying a Data output signal in conjunction with the stored information in response to receipt of the electrical clock signal is designed, and with optical transmitters for generating an optical Output signal, which is representative of the data output signal, characterized by an optical Transmission in optical connection with the optical transmitter of the transponder for the transmission of the optical clock signals, a programmer who is operationally using the transponder for programming of new information in the memory of the transponder is connected when the memory is connected by the clock signal is clocked, which is generated by the receiver in the transponder, and a detection device with a Optical detector in optical connection with the optical transmitter of the transponder for detection of the optical output signal generated by the optical transmitter to enable the operation of the transponder to check and ensure that the new information is correctly programmed into the transponder became. 7 0 9 9 8 6 / C) 7 ι U 137. A transponder / responder system, characterized in that that the transponder is battery operated and is used to address a transponder signal ' to emit on receipt of a switch-on signal from a distance, and that a responder one Device for generating a time signal also has a device that responds to the time signal responds to generate the switch-on signal on the distance, a device for receiving the Transponder signal, and a device for identifying ^N fernungsprüfung of the state of the battery by a time comparison of the time of reception of the transponder signal with respect to the timing signal. 138. System according to claim 137, characterized in that the output voltage of the battery drops when the condition of the battery deteriorates. 709886/0704