DE2258210A1 - ELECTRONIC QUARTZ CLOCK - Google Patents

Description

March 28 , 73

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Munich 22, Steinsdorfstr. 1·

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Naufino-Issledovatel 'ski.1 institut Sasovo. ^ Promyslennosti. Moscow (USSR )

Electronic quartz watch

The invention relates to a timepiece, in particular an electronic quartz watch.

Electronic quartz watches are known which have a quartz generator and one at the output of the quartz generator contain switched-on pulse shaping unit of the quartz generator, whereupon the pulse takes place through a multi-stage flip-flop frequency divider, at the output of which a Display device for the current time controlling pulse shaper is connected.

Disadvantages of such electronic quartz watches are:

53G- (P. H6 266/1) -Hd-r (8).

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1. the presence of a larger number of series-connected stages of the multi-stage flip-flop frequency divider, which is the electrical circuit of an electronic Quartz watch too big and therefore unsuitable for microminiaturization and use in small-format timepieces power;

2. the presence of the pulse shaping unit of the quartz generator connected to the output of the quartz generator;

3. the phase instabilities of the stages are added up » and the resulting instability of the time intervals is hereby considerably increased and can greatly exceed the error of the quartz generator; and

k. increased power consumption from the source and low operational reliability,

There are also electronic quartz watches (see * z. B. the yearbook "Annales Francaises de Chronometrie et de Micromeoanique" _t 1 ° 68, p. 13) are known in which the pulse generator unit of the quartz generator is connected to the output of the quartz generator, whereupon the Pulse setting by a multi-stage frequency divider follows, each stage of which is implemented in a multivibrator circuit from two transistors of different conductivity types. At least one coincidence circuit made up of a transistor in a common emitter circuit is connected to the output of each stage. A pulse shaper controlling a display device for the current time is connected to the output of the coincidence circuit coupled to the last stage of the multi-stage frequency divider.

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Since in such a watch the division ratio per Level 3 to ^ and more, the electrical circuit is significantly simplified and reduced power consumption.

A disadvantage of this electronic quartz watch, as with the one described above, is the presence of the Output of the quartz generator connected pulse shaping stage.

The other disadvantage, like the quartz electronic watch described above, is the accumulation of phase instabilities of the stages connected in series and as a result an increase in the resulting instability the time intervals.

Another disadvantage of such an electronic Quartz clock is also the need for two sources of power

Another disadvantage is the low reliability at low supply voltages (below 2 V).

The invention is based on the task, while overcoming of the disadvantages mentioned to create an electronic quartz watch that is used as an electronic quartz wristwatch can be.

This task is performed with an electronic quartz watch, whose crystal generator is electrically coupled to a multi-stage frequency divider, each stage of which is a multivibrator made up of two transistors of different conductivity types executed and with their output at least one as

Ü09825 / 0763

a transistor in the emitter circuit formed coincidence circuit is connected, with the output of the on the last stage of the multi-stage frequency divider connected coincidence circuit a display device for current time controlling pulse shaper is connected, achieved according to the invention in that at the input of each stage in each case a transistor operating in switch mode in Emitter circuit is connected, the collector of which is coupled to the base of a transistor of the same Line type that is located in the first branch of the multivibrator, to which the transistor operating in switch mode is connected, and via a resistor to the collector of a transistor of the opposite line type in the second branch of the multivibrator, in its base current circuits Timing RC element is that of the transistor of each coincidence circuit is coupled to the base via a resistor to the collector of the transistor in the first branch of the Multivibrators of the stage to the output of which this coincidence circuit is connected, and furthermore the collector via a resistor to the base of the transistor operating in switch mode and connected to the input of the next stage with respect to this coincidence circuit and with the collector of the transit gate of the previous one Coincidence circuit through a resistor if it is even numbered and directly if it is odd is numbered; and that the collector of the transistor of the coincidence circuit connected to the output of the first stage is coupled via a resistor to the input of this stage.

The invention is to be described in more detail below with reference to the description of exemplary embodiments and the accompanying drawing

309825/0783

explained. Show it: '

Fig. 1 the electrical principle circuit of the electronic Quartz watch according to the invention; '

Fig. 2 shows the block diagram of the electrical part of

electronic quartz clock with a low-frequency setting device according to the invention; and

Fig. 3 (a, b, c, d, e) timing diagrams of the operation of the

electrical schematic diagram of the electronic quartz watch according to the invention. '

The principle of the electronic quartz watch comprises a quartz generator 1 (Fig. T) ^ a pulse shaper 2, which converts the shape of the voltage pulses of the quartz generator 1 into a form suitable for dividing the pulse shape frequency and at the same time acts as a preliminary stage of a multi-stage frequency divider 3. The multi-stage frequency divider 3 has stages k, 5 and 6. At the output of each stage 4,!> And 6 of the frequency divider 3 there is a coincidence circuit 7, 8 and 9, respectively Drive of the clockwork "(not shown)
and adjusting device 11 showing the current time is connected. "" - ■ - '"' - -; ■ - '■ ··'·;" .- - ':. ■■■■ _. ■ «· ■. - ■> r- ■ -. * ■; . ■: -

The quartz generator 1 is a multivibrator (flip-flop) made of transistors 13 and \ k of different conductivity types
under. Connection of a quartz reactor 15 between the collector of the npn transistor a i4 ^ urid niei * base äe * prilp ^ TVäni- ^; sistor 13 executed. In the emitter circuit of the Translsto-

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Resistors 16 and 17 lying between 13 and 1h are bridged by capacitors 18 and 19; the resistor 16 bridged by the capacitor 18 is connected to a rail 20 coupled to the positive pole of a supply source 21 and the resistor 1? connected to a rail 22 coupled to the negative pole of the supply source 21. The rail 22 is grounded.

A resistor 23 provided for specifying the base current of transistor 13 is connected between the base of transistor 13 and rail 22. The base of the Tran sistors lh is coupled to the collector of the transistor 13 and via a resistor to the rail 2h 22nd In the collector circuit of the transistor 1U there is a resistor 25 connected to the rail 20. The resistor 25 acts as a load resistor.

The voltage pulse shaper 2, which also serves as a pre-frequency divider, is constructed from a pnp transistor 26 and an npn transistor 27 in a multivibrator circuit. In the base circuit of the transistor 27 is a lateral RC-GIied _t which consists of a between the base of the transistor 27 and the collector of the transistor 26 th capacitor 28 and a resistor 29 connected between the base of the Tran sistor 27 and the rail 20, the is provided at the same time for specifying the initial base current of the transistor 27, composed * Kin resistor 30 connected between the rail 22 and the collector of the transistor 26 represents a load resistance.

The emitter of transistor 27 is connected to the rail and the emitter of transistor 26 is connected to rail 20. The base of transistor 26 is with the collector

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of the transistor 27 coupled via a resistor 31 which is provided to limit the collector current of the transistor 27.

At the input of the pulse shaper 2, a pnp transistor 32 operating in switch mode is connected in such a way that that its base-emitter circuit is shunted with resistor 25. The collector of the Traneistore 32 is connected to the base of the transistor 26 and via the resistor 31 to the collector of the transistor 27.

The multi-stage frequency divider 3 with stages h, 5 and 6 is connected to the output of the pulse shaper 2.

The stage k is implemented in a multivibrator circuit from a pnp transistor 33 and an npn transistor 3 ^ in the second or first multivibrator branch.

In the base circuit of the transistor 33 located in the second branch of the multivibrator of stage k , a timing RC element is connected, which consists of a capacitor 35 connected between the base of transistor 33 and the collector of transistor Jh and a capacitor 35 connected between the base of transistor 33 and the resistor 36 connected to the rail 22. The emitter of the transistor

33 is connected to rail 20 and the emitter of transistor Jh is connected to rail 22. A resistor 37 belonging to a first resistor group is between the collector of the transistor 33 and the base of the transistor

34 switched and to limit the collector current of the Transistor 33 is provided. The first resistance group combines resistances that are analogous to resistance 37 are switched.

30ST25 / 0 7 6 3

A resistor 38 located between the rail 20 and the collector of the transistor "} k occurs as a load resistance.

At the input of stage k of the multi-stage frequency divider 3 there is an npn transistor 39 operating in switch mode in an emitter circuit. The emitter of the transistor 39 is connected to the rail 22, the collector of the transistor 39 is via the resistor 37 with the collector of the transistor 33 in the second multivibrator branch of the opposite conduction type and with the base of the transistor 3k in the first multivibrator branch of the same conduction type as in The transistor 39 is coupled; the base of the transistor 39 is connected to the collector of the transistor 26 via a resistor kO.

The coincidence circuit 7 composed of a transistor 41, the emitter of which is connected to the rail 22, is connected to the output of the stage k _{t, which occurs as the first stage of the multistage frequency divider 3.} The connection of the input-base-emitter circuit of the transistor 41 of the coincidence circuit 7 with the stage k of the frequency divider 3 is established via a resistor kZ belonging to a second resistor group, which is between the collector of the transistor 34 located in the first branch of the multivibrator of stage h and the base of the transistor hy is connected. The second group of resistors combines resistors that are connected in analogy to resistor k2 . The collector of the transistor Ui is connected to the resistor kO , the other end of which is connected to the base of the transistor 39, which operates in switch mode and is coupled to the input of the first stage 4 of the multistage frequency divider 3. The KoIlek-

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gate of the transistor 41 1st via one of a third resistor group belonging resistor 43 with the base of a operating in switch mode, connected to the input of the following stage 5 connected transistor 44. the third resistor group combines resistors which are connected in analogy ζμπι resistor 43.

The stages 5 and 6 of the frequency divider 3 are connected similarly to the stage 4. They are also in multivibrator circuit of transistors 45, 46 and 47, 48 of the different Line type built up. In the base circuits of transistors 45 and 4? horizontal timing RC elements are each through capacitors 49, 50 and resistors 51 » 52 formed. Resistance belonging to the first group of resistance 53 »54 are between the collector of transistor 45 and the base of transistor 46 or« the collector of the Transistor 47 and the base of the transistor 48 switched. The resistors 53 and 54 are provided to limit the collector current of the transistors 4-5 and 47. At the exit each of the stages 5 »6 are resistors 55 and 5 *> switched, which occur as load resistances and with the Collectors of the transistors 46 and 48 and the rail 20 are connected. All stages of the frequency divider 3 are thus the same and differ only in the capacitance values of capacitors 35 »49 and 50«

The frequency divider can have any number of stages and by the frequency of the Quarsresoraators 15 »that Division ratio of each Stwfe of the frequency divider 3 and the frequency of the position notification 11 determines *

At the entrance of each of the stages 5 and 6 are located in emitter

30 9 8 2.5 / 0 76-3

225821Q

circuit operating in switch mode npn transistors or 57. The collectors of transistors 44, 57 are connected to the bases of transistors k6 , 48 and resistors 53 »5k belonging to the first group of resistors are connected to the collectors of transistors 45 and k7 , respectively.

At the outputs of stages 5 and 6 are common emitters coincidence circuits 8 and 9 each made up of a transistor 58 and 59 · the emitters of the transistors 58 and 59 are connected to the rail 22. The bases of the transistors 58 and 59 are resistors 6o and 6i belonging to the second resistor group at the collectors of the transistors 46 and 48, respectively, are switched. The collector of transistor 58 of coincidence circuit 8 is direct to the collector of the transistor 41 of the preceding coincidence circuit 7 and to the base of the to the input of level 6 via a member of a third resistance group Resistor 62 coupled transistor 57 connected.

The collector of transistor 59 of the coincidence circuit 9 is related to the collector of transistor 58 of the previous one Coincidence circuit 8 and coupled to the base of transistor 57.

Let us now turn to some characteristic properties of the basic circuit of the quartz clock!

1. The collector of transistor 58 of the second coincidence circuit 8 of the multi-stage frequency divider 3 is connected to the collector of the transistor 41 of the coincidence circuit 7 directly and the collector of the transistor 59 of the third coincidence circuit 9 with the collector of the transistor 58

309825/07 6-3

of the coincidence circuit 8 via a resistor 63 belonging to an additional resistor group. The additional resistor group combines resistors that are connected in analogy to resistor 63. The collector of the transistor ¹ kV of the first coincidence circuit of the multistage frequency divider 3 is connected to the input of the first stage via an additional resistor 6k coupled to the collector of the transistor 41 at one end and the other to the resistor 40. When the stages are connected in series in the multi-stage frequency divider, the collector of the even-numbered coincidence circuit is connected directly to the collector of the preceding, odd-numbered coincidence circuit and the collector of the odd-numbered coincidence circuit is connected to the collector of the preceding, even-numbered coincidence circuit via a resistor.

2. The number of stages of the multi-stage frequency divider 3 and the division ratio of a stage can be any depending on the frequency of the generator 1 and the requirements placed on the electrical principle circuit of the electronic quartz clock. In any case, the basic electrical circuits of the generator 1 and the stages h, 5, 6 will be practically identical to one another, which considerably simplifies the electrical circuit of the electronic quartz watch, reduces the number of circuit elements and, in conjunction with the operation of the transistors in micro-operation, the Increased reliability of the clock as a whole ensured (the power consumption of one stage of the frequency divider with a coincidence circuit is approx. 0.3 to 0.5 / uA with a supply voltage of 1 to 1.35 V).

S C ': 8 2 5 70 7 6 S.

In Fig. 2 is the block diagram of the electrical part the electronic quartz watch for the case that the low-frequency setting device in the present watch is used at working frequencies of 1 to 2 Hz. Here are two multi-stage of the one pulse shaper 2 Frequency dividers 65 and 66 operated in parallel. The electric Circuits of the multi-stage frequency divider 65 and 65 are analogous to the electrical circuit of the multi-stage Frequency divider 3 (Fig. 1) executed. Here, the division ratio η of the frequency divider 65 (Fig. 2) is

¹ ν

For example, η = 3 1, where k is the number of stages of the multi-stage frequency divider 65, and in the case of the multi-stage frequency divider 66, n = 2 2, where k_ is the number of stages of the multi-stage frequency divider 66 . In this case, the pulse signal from the output of the coincidence circuit 67 located at the outputs of the multi-stage frequency dividers 65 and 66 has an η. χ n ~ times lower frequency compared to the pulse frequency of the crystal generator 1.

The circuit of Fig. 2 allows a lower pulse frequency when using timing RC-Gleder with to get a smaller time constant, which increases the operational reliability and the dimensions of the clock compared to the circuit of FIG. 1 is reduced in size.

The quartz electronic watch works as follows

The quartz generator 1 generates in Fig. 3a illustrated frequency-stable current pulses with the period T. Here, a MuItivibratorschaltung be the transistors 13 and ~ \ k (Fig. 1) negative during a short time, compared with the rail 20 of the source 21 current pulse

ϊ Ü 9 8 2 b / 0 7 6 'i

conductive. The main part of the period (Fig. 3a), however, the transistors 13 and | 4 (Fig. 1) are blocked, so the current consumption from the supply source 21 by the circuit of the generator 1 is very low. In the circuit of the quartz generator 1, the resistors 16, 17 in the Eraitterstromkreise of the transistors 13 and Ik are bridged by the capacitors -.18 and 19 to improve the self-excitation conditions. The stability of the output pulses of the quartz generator 1 is determined by the parameters of the quartz resonator 15.

While the pulses at the input of the pulse shaper 2 are absent, the transistors 26 and 27 are conductive and are located is in the saturation state, since the resistor 29 at the Base of the transistor 27 generates an opening potential and The transistor 26 is opened via the resistor 31. Since at the base of the transistor 32, the potential compared to the Emitter is zero, the transistor 32 is blocked here. Such a state of the transistors in the pulse shaper 2 does not change until the base of transistor 32 is opposite from the output of crystal generator 1 the emitter of transistor 32 negative current pulse comes. This opens the transistor 32, the potential difference between its collector and emitter becomes zero what the previously conductive transistor 26 can be blocked. At the collector of transistor 26, the voltage becomes zero, and one here the resulting voltage jump at the collector, which is negative compared to the rail 22, is generated via the capacitor 28 given the base of transistor 27 and blocks it. In the first moment there is the reverse voltage between the base and the emitter of transistor 27 approximately equal to the supply voltage. In the course of the time constant of the

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received on

from the capacitor 28 (Fig. 1) and the resistors 29 and 30 existing circuit determined time t. (Fig. 3b) a charge reversal of the capacitor 28 takes place. This state of the circuit is illustrated in Fig. 3b, where the lower voltage level at the output of the pulse shaper 2 (Fig. I) (voltage at the resistor 30) of the time t ^ (Fig. 3b), ie the time at which the transistors 26 and 27 (FIG. 1) are in the blocking state. In circuits implemented in practice for the clock, the resistor 30 is chosen to be much smaller than the resistor 29, which is why the voltage change at the resistor 30 over the course of time t .. can be neglected and this voltage is constant and equal to zero (the voltage on the rail 22) accept. The duration of the blocking state of the transistors 26 and 27 therefore depends on the charge reversal of the capacitor 28 via the resistor 29. The capacitor is recharged until the base voltage of the transistor 27 has risen to an opening threshold equal to its opening threshold. In this case, the transistor St ¹ -} - 24? - e opens, and the capacitor 28 is reloaded via the conductive junctions of the transistors 26 and 27 up to the voltage of the supply source 21.

Since in the course of the time interval t. (Fig. 3b), when the capacitor was reloaded, the transistors 26 and 27 (Fig. 1) were blocked and the pulses coming from the crystal generator 1 and opening the transistor 32 do not change the state of these transistors, the signal remains at the output of the pulse shaper 2 at the arrival of the (ni) th pulse from the quartz generator 1 and during the entire time interval t (Fig. Jh) . The next or nth pulse

¹ , ν dem open

of the quartz generator 1 (Fig. 1) causes the transistors 26 and 27 to be blocked after the transistors 26 and 27, and processes take place in the pulse shaper 2,

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ei ;; :: gongen om

which are analogous to those described above. Here on Output of pulse shaper 2 (at resistor 30) positive pulses formed with an amplitude equal to the supply voltage, whose frequencies are η times smaller than the frequency of the quartz generator. In Fig. 3b is a timing diagram. the voltage pulses at the output of the pulse shaper 2 (Fig. i) when the signals from the quartz generator 1 arrive periodically. In the case in question, the clarity is chosen for the sake of the division ratio of the pulse shaper 2 equal to three (n ^ = 3), and in general it can by varying the parameters of the timing element from the capacitor 28 and the resistor 29 are arbitrarily large.

The output pulses (Fig. 3t ») from the pulse shaper 2 (Fig. 1) control the work of stage 4 of the multi-stage frequency divider 3. Until the arrival of the first pulse from the output of the pulse shaper 2, the transistors 33 and 3 ^ of the multivibrator in stage k of the multi-stage frequency divider 3 are conductive and are in the saturation state. Such an initial state is ensured by the resistors 36 and 37. The transistor 39 is blocked because the potential at its base is equal to the potential of the emitter coupled to the rail 22 of the voltage source 21.

The first from the collector of transistor 26 through one

Resistance at the base of transistor 39 incoming positive

The opening pulse opens this transistor. The circuit of the transistor 39 causes the multivibrator to flip over, whereby the transistors 33 and 3 ^ are blocked. At the moment the transistors are blocked, the blocking voltage at the base of transistor 33 changes suddenly.

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adhered to the value of the voltage of the supply source via a capacitor 35. Then the reverse voltage at the transistor base decreases with the charge reversal of the capacitor 35 via the resistors 36 and 38. This process corresponds to the upper level of the output voltage at resistor 38 in FIG. 3c, which level is maintained over the course of time t "(FIG. 3c). The second and third pulses from the output of the pulse shaper 2 open the transistor 39t, but the multivibrator does not respond to the voltage change at the collector of the transistor 39 because it is in a state in which the transistors 33 and "} k are blocked , and the incoming second and the third pulse block the already blocked transistors. The transistors of the multivibrator return to the conductive output state between the third and the fourth input pulse after the time interval t "(FIG. 3c) has elapsed when the capacitor 35 ( 1) has discharged to a voltage equal to the opening threshold value of the transistor 33. The lower level of the voltage at the output resistor 38 corresponds to this state in FIG Collector-emitter junctions of the transistors 33 and Jk . The fourth pulse from the output of the pulse shaper causes there by opening the transistor 39, the multivibrator again tips over into the state with the transistors blocked.

The period of the voltage pulses at the output of stage k of the frequency divider increases by three times compared to the pulse period of the pulse shaper 2, ie the frequency at the output of stage k of the divider turns out to be divided by three. As in the step of the pulse shaper 2, the division ratio of the step k depends on the

i U 9 8 2 α / 0 7 6 3

Time constant of the charging circuit consisting of the capacitor 35 and the resistor 36. Resistor 38 is assumed to be much smaller than resistor 36.

The work of the coincidence circuit 7 in the electronic quartz watch is based on the inertia of the transistors. When the transistors 33 and 34 in stage 4 of the multistage frequency divider 3 are conducting, the transistor 41 in the coincidence circuit 7 is blocked because its base is connected to the rail 22 via the resistor 42 and the saturated transistor 34. When the positive pulse from the output of the pulse shaper 2 upon opening of the transistor 26 simultaneously arrives at the input of the stage 4 of the frequency divider 3 via the resistor 40 and at the input of the stage 5 via the resistors 64 and 43, the transistors 33 and 34 begin to block , ie the transistor 41 of the coincidence circuit 7 begins to conduct. Since the opening of the transistor 4i does not happen suddenly, but with some delay caused by the properties of the transistor, the positive pulse from the collector of the transistor 26 can reach the input of the stage 5 of the multistage frequency divider 3 and act on the transistor 44, the causes the blocking of the transistors 45 and 46 of the multivibrator. When the transistor 41 becomes conductive, its output simultaneously bridges the input of stage 5 of the multistage frequency divider 3 and, through the resistor 61, also the input of stage 4 of the multistage frequency divider 3 4 and 5 of the frequency divider 3 do not have any effect. The leading edge of the positive pulse at the input of stage 5 of the multi-stage frequency divider 3 coincides with the signal edge at the output of the pulse shaper 2.

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In stage 4 of the multi-stage frequency divider 3 due to the instability of the pulse edges and the parameters of the Phase errors occurring when the transistor is blocked and opened thus influence the work of stage 5 of the multi-stage frequency divider 3 by no means. The stability of the output pulses at the input of stage 5 of the multi-stage Frequency divider 3 is therefore only determined by the parameters of the crystal generator.

The work of stage 5 of the multi-stage frequency divider 3 is analogous to the work of stage 4 of the multi-stage Frequency divider 3 because their circuits are identical.

The positive signal from the output of the coincidence circuit 7 opens the transistor 44. Here, the conductive Transistors 45 and 46 for the parameters of the capacitor 49 (Fig. 1) and the resistor 51 determined Time t »(Fig. 3d) blocked. Over the entire tent t ~ (Fig. 3d) the pulses from the output of the coincidence circuit 7 (Fig. 1) can indicate the state of the blocked transistors 45 and 46 do not change, so the output voltage is of stage 5 of the multi-stage frequency divider 3 (i.e. the voltage across resistor 55) is equal to the voltage of the rail 20 of the supply source 21. In FIG. 3c, this state corresponds to the upper voltage level.

If the division ratio of level 5 (FIg * 1) of the multi-stage frequency divider is also selected to be three, the transistors of the multivibrator open between the third and the fourth pulse (Fig. 3d) at the output of the coincidence circuit 7 (Fig. i). Here the fourth opens Pulse from the output of the coincidence circuit 7 the transistor 44 and blocks the transistor 45 and 46, and the processes

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are in stage 4 of the multi-stage frequency divider 3 repeated.

At the output 5 of the frequency divider 3 there is the coincidence circuit 8 with a transistor 58, the collector of which is coupled to the collector of the transistor 4 i of the coincidence circuit 7. The positive pulse arrives from the collector of transistor 26 via resistors 6i and 59 to the base of transistor 57. After this action, transistor 57 becomes conductive, since transistor 58 is still blocked. The leading edge of the pulse at the input of stage 6 also coincides with the leading edge of the pulse at the output of pulse shaper 2. The stability of the pulses at the output of stage 6 is therefore not influenced by the phase errors of stages 4 and 5 of the multi-stage frequency divider 3. ,

At the output of the last stage of the multi-stage frequency divider 3 (in the given case of stage 6) pulses are generated, whose frequencies are also three times smaller than those of the pulses at the output (if the division ratio just as three is selected in the previous stages). The processes in stage 6 of the multi-stage frequency divider 3 and in the coincidence circuit 9 run similarly as in stages 4 and 5 of the multi-stage frequency divider and in the coincidence circuits 7 and 8.

At the output of stage 6 of the multi-stage frequency divider 3, negative pulses (Fig. 3e) are formed which have the same shape as the output pulses of stages 4 and 5 (Fig. I) exhibit. As in the previous stages, the time interval is t. (Fig. 3e) in stage 6 of the time constant des through capacitor 50 and resistor 52 formed RC element dependent.

Received on ..ii. ^^

The pulse signal comes from the output of the coincidence circuit 9 on the pulse shaper 10, the pulses with certain Amplitude, polarity and certain duty cycle generated for the actuator 11 of the clockwork are necessary, in which, for example, the winding

Vibro or stepper motor ^ ^ nes S can be located.

In the watch, for example, at a frequency of the quartz generator 1 equal to 9720 Hz of the winding 12 of the Actuating device 11 pulses of 120 Hz supplied, which allow the central (minute) axis or shaft of the pointer mechanism to drive without any reduction of the speed.

The other variant of the electronic quartz watch, the block diagram of which is shown in FIG. 2, works in an analogous manner the one described above.

Since the present circuit operates with a large duty cycle or pulse-pause ratio, the Shortened time of the conductive state of the transistors, which is much smaller than that of the blocked state. this makes possible it to significantly reduce the power consumption and consequently to extend the service life of the power source, which is especially important for a wristwatch whose dimensions are limited.

At the same time the cost of a great capacity for regeneration Multivibrators with transistors of different conductivity types, which are used extensively in the present circuit normal operation of the electrical circuit is ensured even with a low supply voltage (below 1 V) guaranteed. In the present circuit is also the

j U 9 S 7 5/0763

Summation of the phase instability in the stages of the multi-stage frequency divider is eliminated, which increases the accuracy of the operation of the actuator. Another advantage of the circuit is the fact that the stages of the multi-stage frequency divider are constructed in the same circuit and have the same parameters of the elements, which considerably simplifies the circuit. \

The present invention enables the operational characteristics of the watch to be improved considerably and run it as a wristwatch.

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Claims (1)

Claim Electronic quartz clock, the quartz generator of which is electrically coupled to a multi-stage frequency divider, each stage of which is designed as a multivibrator made up of two transistors of different conductivity types and whose output is connected to at least one coincidence circuit designed as a transistor in a common emitter circuit, with the output being connected to the last Stage of the multi-stage frequency divider connected coincidence circuit to a display device for the current time driving pulse shaper, characterized in that at * the input of each stage (k _t 5t 6) a transistor (39, hh _t 57) working in switch mode is connected in emitter circuit , the collector of which is coupled to the base of a transistor of the same conductivity type, which is in the first branch of the multivibrator to which the transistor operating in switch mode is connected, and via a resistor to the collector of a transistor from the entgege nset conduction type in the second branch of the multivibrator, in the Basisstrpmkreis a timing RC element is that of the transistor of each coincidence circuit (7t 8, 9) coupled the base via a resistor to the collector of the transistor in the first branch of the multivibrator of the stage the output of which this coincidence circuit is connected, and also the collector via a resistor to the base of the operating in switch mode, connected to the input of the following stage with respect to this coincidence circuit and to the collector of the transistor of the preceding coincidence circuit via a 309825/0763 Resistance if it is even numbered and direct if it is odd numbered; and that the collector of the transistor of the coincidence circuit (7) connected to the output of the first stage (k) is coupled to the input of this stage via a resistor (64). 3U982 5/0763