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DE1619972A1 - Process for gettering metallic impurities from silicon crystals - Google Patents

Process for gettering metallic impurities from silicon crystals

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Publication number
DE1619972A1
DE1619972A1 DE19671619972 DE1619972A DE1619972A1 DE 1619972 A1 DE1619972 A1 DE 1619972A1 DE 19671619972 DE19671619972 DE 19671619972 DE 1619972 A DE1619972 A DE 1619972A DE 1619972 A1 DE1619972 A1 DE 1619972A1
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Prior art keywords
temperature
speed
crystals
procedure according
takes place
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Pending
Application number
DE19671619972
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German (de)
Inventor
Ingrid Armbruster
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Licentia Patent Verwaltungs GmbH
Original Assignee
Licentia Patent Verwaltungs GmbH
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Application filed by Licentia Patent Verwaltungs GmbH filed Critical Licentia Patent Verwaltungs GmbH
Publication of DE1619972A1 publication Critical patent/DE1619972A1/en
Pending legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/322—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections
    • H01L21/3221—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections of silicon bodies, e.g. for gettering
    • C—CHEMISTRY; METALLURGY
    • C01—INORGANIC CHEMISTRY
    • C01B—NON-METALLIC ELEMENTS; COMPOUNDS THEREOF; METALLOIDS OR COMPOUNDS THEREOF NOT COVERED BY SUBCLASS C01C
    • C01B33/00—Silicon; Compounds thereof
    • C01B33/02—Silicon
    • C01B33/037—Purification
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/06—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of metallic material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
    • H01L21/0223—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate
    • H01L21/02233—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer
    • H01L21/02236—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer group IV semiconductor
    • H01L21/02238—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer group IV semiconductor silicon in uncombined form, i.e. pure silicon
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
    • H01L21/02255—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by thermal treatment

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  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Organic Chemistry (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Metallurgy (AREA)
  • Mechanical Engineering (AREA)
  • Materials Engineering (AREA)
  • General Chemical & Material Sciences (AREA)
  • Inorganic Chemistry (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)

Description

Verfahren zum Lettern von aetallieohea Vos=rengnngen alte Bilisiuekr.etallen Die i'ur die Herstellung von Halbleitorbaueleaentaa not- wendigen No.ohtenperetur-yexßahreabeiepieleweiea die: Eraeugoag. von pa-Übergängen durch.. Dition t führen häufig au; einer Verschlechterung der elektrischen: Eigen- Bobatten. Inebeeondere werden dabei die Ladungsträger-: lebendaner sowie die :Sperrspannung und der Sperretron in =erwünschter Weise verwendet. Die V®reohlechterusg dieser elektrischen Datei ist darauf zuruokzunhren, daß netallieohe Verunreinigungen" die sieh euch durch laagwiorigs aeinigungßvexrlahren nicht vollständig be- zeitigen lassen, in den Halbleiterkrietall einäidisren. Zur Verbesserwng der elektrischen Eigeneebaften ist es bekennt, die galbleterkri®talle einen Get.berproseB $u unterziehen, bei dem eine Auedii#Ieion der metallischen Veranreinigmgen erfolgt. Bei Ellslbleiterkrietallen aus 911isiva -wird dazu die Ralbleteroberfläohe bei :erhöhter Temperatur mit einer Bor- oder- Phosphorglaaßohcbt ver-- eehen. Die auundiffundierenden Netallatone werden in dienen Glsseohiehten oheniaoh gebunden, wrodura-h ein .Konzentration»- ge=älle in Voluxen des Halbleiters zur Oberfläche hin be- oteht. Die erfolgreiobe Anwendung dieser bekannten Gettervertah- ran ist aber -nur bei Silzimakrietallea mit hoher Vor- eetmmgediohti mdgliah:- Audexersete bieten Kristalle mit geringer Vereetzwrgediohte bessere Voraussetzungen für die Güte einen Halbleterbanaelementer Der @rtindwng liegt die Aufgebe de, ein: Yertabren mm Gattern von Siliziumkrietailen mit geringer vereet-. agegedohte anzugeben. Diese Aufgabe wird der @xrtinduug dadurch gelöst, - daß die Bilzumlcrietalle bei einer Temperatur oberbalb 1 000°F t -mit Waeserdsmpt ' oxydiert werden, d4die.Abkn.- lung 'der Siliasiumkarietalle Ton -der Oxydationstemperatur 7 @G4` auf` 600-0# 0- mit einer Gesahwiädigkeit ;BA:°-- C/mn erfolgt, und -daß diese nach- -Ablösen- der Oaydechioht in` btkenater -: leise einem,-einem Getterprozes unterzogen werden: Deson- derä günstige Ergebniea werden erhalten, Wenn die Oxyda- tion hei - einer= Temperatue `"von etwa 1 2500-0 erfolgt,-ua die *bkahigeßehw"diemit Vor der Oxydation irden. die Bilizitascheiben- in bekenn- ter Weise--einer-Reinigung unterzogen. Die Oxydation wirä zweckmUig in einen quarzkolben unter. strömendes Wasser- dampf durchgeführt. Zur Vermeidung von Verunreinigungen wird dsioninlertes !Wasser mit einem spezifischen Wider- stand von «<10, II.4:om verwendet: .Hei einer Temperatur von 1 250e C wird während einer Oxydationszeit von 2 bis 2f,5-Stunden eine Ozydechioht -nix einer Dicke -von etwa 2/ erzeugt. Dis hohe Abkühlgesahwindigkeit wird durch Herauezieben den quarzkolbeno au. dem (aßen erhal- ten. Vor der eigentlichen Get-terprozeB wird -die Silizius- ozydeohioht mit Plußsäurs abgeätzt ä Es ist besondere ,vrortilhaft, als Gatter eine Phosphor- geeecbioht zu verenden. Zum Aufbringen der Phosphor- glaoechicht wird Phosphor aus einer Phoophorpentozyd- quelle, die auf einer Temperatur von etwa 250o 0 gehal- ten wird und verdampft, und mittels eines inerten Träger- gaeee über die Siliziumkrietalle geleitet. Die Silizium-- Kristalle werden dabei auf einer Temperatur zwischen 1 000° und 1 200' C gehalten. Die Phoaphorgetterung wird je nach Bedarf undsfgewendeter Temperatur bis zu einigen' Stunden durähgeführt. Pür eine erfolgreiche DurehMrung de® ßetterprozensea ist es notwendig, daß die Silizium- krietalle von der ßettertemperatur auf 600o 0 mit einer Geschwindigkeit von 60 --70P C/Std. abgekühlt erden. üki felT@rIL@ Bei Temperaturen ebe.-6000 C kann die Abküälgeeahwin- digkeit sxug etwa 200° Cfmin erhöht werden. ~ Wise Untersuah=gen ergeben haben, werden durch die Ozyds- tion en der Oberfläche das Halbleiterkristalle Verset m un- gen erzeugt, die eine Abscheidung der ohemieoh gebundenen Netalle begunetigen_ a Durch die Anwendung den Verfahrene gemäß der Erfindung lä.Bt eich mm Seiapiel bei den durch Gallumdffuaion erzeugten pn-'Über~n eine weeentlioho Varboaaerung der Sperrspannung erzielen. 3 en Sperrepannungs- erhöhungen bin zu 100 % festgestellt. Weiterhin wurde auob eine,2- bin 5-fache Erhöhung der Trägerlebensdauer festgestellt. Method for the type of aetallieohea In front of the building there are old biliary crystals The i'ur the manufacture of half-gate building eleaentaa not- agile No.ohtenperetur-yexßahreabeiepieleweiea the: Eraeugoag. of pa transitions through .. Dition t lead often au; a deterioration of the electrical: equity Bobatten. In particular, the load carriers: livelier as well as the: blocking voltage and the blocking tron used in = desired way. The V®reohlechterusg this electrical file can be traced back to that metallic impurities "see you through laagwiorigs aeinigungßvexrlahren not fully loaded let it run forward, emaidisren in the semiconductor crystal. It is used to improve the electrical properties confesses that the galbleterkri®talle a get.berproseB $ u undergo, in which an Auedi i # I eion of the metallic Events will take place. At El lslbleiterkrietallen off 911isiva -when the Ralbleteroberfläohe: increased Temperature with a boron or phosphorus glass tube eehen. The emerging netallatons will serve in Glsseohiehten oheniaoh bound, wrodura-h a. Concentration »- gradient in voluxes of the semiconductor towards the surface oteht. The successful application of this well-known getter method ran is but - only at Silzimakrietallea with high eetmmgediohti mdgliah: - Audexersete offer crystals with less cross-linking, better conditions for the goodness a half-liter bana element The @rtindwng is giving up, a: Yertabren mm gates of silicon crystals with less indicated. This task will the @xrtinduug thereby solved, that the Bilzumlcrietalle at a temperature Oberbalb 1 000 ° F t -be oxidized with Waeserdsmpt ', d4the.abkn.- lung 'of silicon carbide clay - the oxidation temperature 7 @ G4` to `600-0 # 0- with a Gesahwiädigkeit; BA: ° - C / mn takes place, and that this after- -releasing- the Oaydechioht in` btkenater -: quietly subjected to a getter process: Dison- other favorable results are obtained when the oxidative tion hei - a = Temperatue `` "of about 1 2500-0 takes place, -ua die * bkahigeßehw "diemit Earth before oxidation. the budget a disc- in confessed- ter way - subjected to a cleaning. The oxidation is like that expediently in a quartz flask underneath. flowing water steam carried out. To avoid contamination is disinfected ! water with a specific resistance stood from «<10, II.4: om used:. At a temperature of 1 250e C becomes during an oxidation time of 2 to 2f, 5 hours an Ozydechioht -nix a thickness -of about 2 / generated. The cooling speed is high by pulling out the quartz piston. the (ate received- before the actual get-ter process , the silicon ozydeohioht etched with plus acid Ä It is special, advantageous, as a gate a phosphorus geeecbioht to perish. To apply the phosphorus glaoechicht, phosphorus is made from a phosphorus pentozide source, which is kept at a temperature of about 250o is and evaporated, and by means of an inert carrier gaeee passed over the silicon crystals. The silicon-- Crystals are at a temperature between 1000 ° and 1200 ° C held. The Phoaphorgetterung is depending on requirements and the temperature used, up to a few Hours. For successful training de® ßetterprozensea it is necessary that the silicon crystals from the weather temperature to 600o 0 with a Speed of 60-70P C / hr. ü abbreviated keeps grounded. ü ki f e lT @ rIL @ At temperatures as low as -6000 C the cooling down can win durance can be increased by about 200 ° Cfmin. ~ Wise investigations have shown that the Ozyds tion of the surface, the semiconductor crystals Verset m un- gen generated, which is a deposition of the ohemieoh bound Netalle favor _ a By applying the method according to the invention lä.Bt eich mm Seiapiel in the by Gallumdffuaion generated pn over a weeentlioho Varboaerung achieve the reverse voltage. 3 en locking voltage increases are 100% determined. Furthermore was auob a. 2 to 5 fold increase in carrier life established.

Claims (1)

Pa@entät@sprüo rrrr mo.mrri.rmw@:
1) Verfabren -mm ßettern von metnllinehen Veruareinigungeü aus giUziumkxintallen mit geringer Ve»etzungadiohts,= dadurch gekennn$e.`ebnst,daßdi Sil$iumkretalls bei einer Temperatur., oberhalb 1-0000 0 sit Waaseräampr' oxydiert: worden, daß die Abkühlung der 9iliziuskri®taile von, der Orgdatonntenaperatur aal 00ƒpo C 0 mit einer Geschwindigkeit @#8A° Qmm erfolgt., und a8 dieg.naoh Ablösen der Mdaohioht in bekannter Weise einem GEetterprozeß unterzogen »räen. , 2) fierrab reit nach A»pxuah . 1 , d a B u r p b g e k e a. n s e i Q h n: 0 t , dsß die Oxydationntemperaetwa. . ' =
1 250o Q beträgt@ . - o A 4a %0/ au 3) Verfahren nach Äuapruoh 1 oder 2, d a d u r c -h g e- k e n a z e i. o h n e - t - , daß für die oxy dation Cle- ionieiertes Waeeer verwsndet.@rird. 4) Verfahren nach .Ansprach 3 * d- a ä u r a V e k s n a z a i c h n- -e t deä der spezifische Widerstand des 1e KP -C"- beträgt. 5) Verfahren nach einen der Ansprüche 1 bin 4 , d m d ur o h g e k n a z a i o h a e t , dsß :die Oxydation bei etwa, 1 2500 C -pährm& einer Zeithauer 'von 2 bin 295- Stunden - ' durohgeruhrt wird. - - , f) Verfahren nach einen der Ansprüobs 1 - 5 , d s d u r o b g a k . a n .z s i o b n . e t , daß de@c ßetterproee8 . mittels einer Pho®phorglaeeohieht durchgeführt wird. 7) Verfahren nach Anspruch 6 , d ß d u r o hg-e k a n n a a i o h a, e t ,, da® der Getterprozeß bei einer Tempo- Tatur :wrieohen 1 000 und 1'250d Cl erfolgt und die Phosphor-- glansohioht aua einer Phoaphorpeutozyäquelle, deren
--Temperatur etwa-2@0-°--C__be rägt-._@ittel®--.=einea- inerten Trägergseee aufgebracht wird. 8) Verfahren nach Anspruch. 7 , . ca ä u r o h g e ,-k e n n z e i c h n e t , daß als -Trägergas .Argon verwendet , wird. _ 9) Verfahren nach einem der Aneprü:ohe 6 bis 8 _ , d, a',4 u 3r o h g s k e a n z e i o h a e t , daß die Silsiumkristalle von der Gsttertemperatur auf etwa 6000 0 mit einer Ge- echwindigkeit von 60 bis 70° C/Std. abgekühlt werden. 10) Verfahren nach einem der Anspräche 1 bis 9 , d _a d u r c h g e k ® n n s e i o h n a t ! daß Bilizivmkristalle ver- wendet werden, die einen oder mehrere diffundierte pn- Übergage enthalten.
Pa @ entät @ sprüo rrrr mo.mrri.rmw @ :
1) Verification -mm etting of metal-line declarations from giUziumkxintallen with little cross-linking radioactive, = by the fact that the Sil $ iumkretalls at a temperature., Above 1-0000 0 s i t Waaseräampr 'oxidized: that the cooling of the 9iliziuskri®taile von, der Orgdatonntenaperatur aal 00ƒpo C 0 takes place at a speed @ # 8A ° Qmm., and a8 dieg.naoh replacing the Mdaohioht in the known way subjected to a GEetter process . , 2 ) fierrab rides to A »pxuah. 1, d a B urpbgeke a. n let Q hn: 0 t, that the Oxy dationtempera about . . '=
1 250o Q is @. - o A 4a % 0 / au 3) Procedure according to Äuapruoh 1 or 2, dadurc -hg e- kenaze i. without - t - that for the oxydation cle- ionized waeeer used. @ rird. 4) Procedure according to .Ansprach 3 * d- a ä ura V eksna zaich n- -et deä the specific resistance of the 1e KP -C "- is. 5) Method according to one of claims 1 to 4, dmd ur oh geknaza i ohaet, dsß: the oxidation about, 1 2500 C -pährm & a Zeithauer 'of 2 am 295- Hours - 'is stirred. - -, f ) Method according to one of claims 1 - 5, dsdurob gak . a n .z siobn . et that de @ c ßetterproee8 . is carried out by means of a Pho®phorglaeeohicht. 7) The method according to claim 6, d ß duro hg-e can aa i oha, et ,, da® the getter process at a speed Tatur: where 1 000 and 1'250d Cl takes place and the phosphorus glansohioht aua a Phoaphorpeutozyäquelle, whose
--Temperature about -2 @ 0- ° --C__be ragt-._@ittel®--.=einea- inert Trägergseee is applied. 8) Method according to claim. 7,. ca ä urohge, -ken n i ze seframe that used as the carrier gas .Argon, will. _ 9 ) Procedure according to one of the tests: ohe 6 to 8 _ , d, a ', 4 u 3r oh gskeanzeiohaet that the silicon crystals from the guest temperature to about 6000 0 with a e speed from 60 to 70 ° C / hour. be cooled down. 10 ) Method according to one of the claims 1 to 9, d _a through gek ® nnseiohnat ! that bilicide crystals are applied, which one or more diffused pn- Extra fee included.
DE19671619972 1967-05-02 1967-05-02 Process for gettering metallic impurities from silicon crystals Pending DE1619972A1 (en)

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DEL0056413 1967-05-02

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DE1619972A1 true DE1619972A1 (en) 1971-03-18

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0506170A1 (en) * 1991-03-28 1992-09-30 Consorzio per la Ricerca sulla Microelettronica nel Mezzogiorno - CoRiMMe Integrated structure of bipolar power device with high current density and fast diode and related manufacturing process

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0506170A1 (en) * 1991-03-28 1992-09-30 Consorzio per la Ricerca sulla Microelettronica nel Mezzogiorno - CoRiMMe Integrated structure of bipolar power device with high current density and fast diode and related manufacturing process
US5343068A (en) * 1991-03-28 1994-08-30 Consorzio Per La Ricerca Sulla Microelettronica Nel Mezzogiorno Integrated bipolar power device and a fast diode

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