DE1544182A1 - Process for the production of flat semiconductor plates provided with epitaxially grown layers - Google Patents
Process for the production of flat semiconductor plates provided with epitaxially grown layersInfo
- Publication number
- DE1544182A1 DE1544182A1 DE19661544182 DE1544182A DE1544182A1 DE 1544182 A1 DE1544182 A1 DE 1544182A1 DE 19661544182 DE19661544182 DE 19661544182 DE 1544182 A DE1544182 A DE 1544182A DE 1544182 A1 DE1544182 A1 DE 1544182A1
- Authority
- DE
- Germany
- Prior art keywords
- epitaxially grown
- plates
- production
- flat semiconductor
- plates provided
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000000034 method Methods 0.000 title claims description 10
- 239000004065 semiconductor Substances 0.000 title claims description 10
- 238000004519 manufacturing process Methods 0.000 title claims description 5
- 238000004140 cleaning Methods 0.000 claims description 3
- 238000004381 surface treatment Methods 0.000 claims description 3
- 238000005498 polishing Methods 0.000 claims description 2
- 239000010410 layer Substances 0.000 description 6
- 230000000694 effects Effects 0.000 description 5
- 229910003460 diamond Inorganic materials 0.000 description 3
- 239000010432 diamond Substances 0.000 description 3
- 230000000873 masking effect Effects 0.000 description 2
- 239000002344 surface layer Substances 0.000 description 2
- 239000003795 chemical substances by application Substances 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 238000011835 investigation Methods 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 229920002120 photoresistant polymer Polymers 0.000 description 1
- 238000003825 pressing Methods 0.000 description 1
- 238000006748 scratching Methods 0.000 description 1
- 230000002393 scratching effect Effects 0.000 description 1
- 235000012431 wafers Nutrition 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/304—Mechanical treatment, e.g. grinding, polishing, cutting
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Mechanical Treatment Of Semiconductor (AREA)
Description
1. Märe 19661st March 1966
Pat.Go./S. - IlPat.Go./S. - Il
Verfahren zum Hereteilen von ebenen, mit epitaktIsch gewachsenen Schichten versehenen, HalbleiterplattenMethod for dividing planes, with epitaxially grown Layered semiconductor plates
Beim Herstellen von Halbleiterplatten, die zur Produktion Von Halbleiterbauelementen auf jeweils einer Oberfläche mit einer epitaktisch gewachsenen Halbleiterschicht versehen werden, ergab sich, dass die Halbleiterplatten durchgewölbt, d.h. uneben werden. Dieser Effekt war besonders ausgeprägt bei dünneren Platten und bei Plattendurchmessern von grosser als etwa 30 mm. Dieser Effekt macht sich besonders störend bemerkbar bei der Genauigkeit der bekannten photolithographischen Verfahren unter Verwendung von Photolacken und beim Zerteilen der Platten durch Ritzen mit einem Diamanten vor einem Zerbrechen.When manufacturing semiconductor wafers that are used for production Provided by semiconductor components on one surface each with an epitaxially grown semiconductor layer As a result, it was found that the semiconductor plates warped, that is, became uneven. This effect was special pronounced with thinner panels and with panel diameters larger than about 30 mm. This effect makes itself special noticeable in the accuracy of the known photolithographic processes using photoresists and when dividing the plates by scratching with a diamond before breaking.
Untersuchungen ergaben, dass dieser Effekt auf die unterschiedliche Oberflächenbeschaffenheit der Platten zurückzuführen ist. Werden die Platten nämlich nur einseitig poliert nach einem beiderseitigen Läppen, da an sich für das einseitige Aufwachsen einer einkristallinen Oberflächenschicht:, nur ein Polieren der mit dieser Schicht zu versehenden Oberfläche erforderlich ist, so sind diese Platten aur polierten Seite hin konkav durchgebogen. Es wurde vermutet, dass dieser Effekt auf die durch die unterschiedliche Oberflächenbehandlung bedingte unterschiedliche Aufweitung der Gitterstruktur an der Oberfläche zurückzuführen ist.Investigations have shown that this effect can be attributed to the different surface properties of the panels is. If the plates are only polished on one side after lapping on both sides, as in and of itself for that one-sided growth of a monocrystalline surface layer :, only a polishing of the surface to be provided with this layer is required, then these plates are on the polished side, curved concavely. It has been suggested that this effect is due to the different Surface treatment caused different expansion of the lattice structure on the surface.
009809/1380009809/1380
- /- Deutsche ITT Ind. GmbH.- / - German ITT Ind. GmbH.
1. März 1966 Pat.Go./S. - Pl 320 J IM 238 March 1, 1966 Pat.Go./S. - Pl 320 J IM 238
Die vorliegende Erfindung betrifft ein Verfahren zum Her-εtttllon von ebenen Halbleiterplatten, die einseitig mit oii:c. jpitaktiach gewachsenen Schicht auf einer Oberfläche versehen sind. Der oben genannte unerwünschte Effekt einer Durchwölbung wird erfindungsgemäsa dadurch verhindert, dass die Platten mechanisch auf beiden Oberflächen gleichartig behandelt werden und nach einer reinigenden Oberflächenbehandlung einseitig mit der epitaktisch gewachsenen Schicht versehen werden.The present invention relates to a method for producing ε tttllon flat semiconductor plates which are marked on one side with oii: c. jpitaktiach grown layer are provided on a surface. The above-mentioned undesirable arching effect is prevented according to the invention in that the plates are mechanically treated in the same way on both surfaces and, after a cleaning surface treatment, are provided with the epitaxially grown layer on one side.
Das Verfahren der Erfindung soll im folgenden an einem AusfUhrungsbeispiel erläutert werden:The method of the invention will be based on an exemplary embodiment below explained:
Ss werden zunächst Siliclumplatten von 30 mm Durchmesser und einer Dicke von 400 - 500 Mikron in bekannter Veise mittels einer Diamantsäge hergestellt und zunächst beidseitig auf eine Dicke von etwa 300 Mikron abgeläppt. Dabei wird für beide Oberflächen das gleiche Läppmittel verwendet. Danach werden wiederum beide Oberflächen gleichartig mittels einer Diamantpaste poliert und die Platten nach einer kurzen Reinigung mittels eines Ätzmittels einseitig mit einer epitaktisch gewachsenen einkristallinen Oberflächenschicht durch Abscheidung des Halbleitermaterials in bekannter Weise aus der Gasphase versehen. In diesen Platten werden nun in bekannter Weise unter Anwendung der photolithographischen Technik auf maskierenden Oxydschichten eine Mehrzahl von Halbleiterbauelementen mit Planarstruktüren diffundiert.Ss Siliclumplatten diameter of 30 mm and a thickness of 400 are first - 500 microns in a known Veise produced by means of a diamond saw and abgeläppt first on both sides to a thickness of about 300 microns. The same lapping agent is used for both surfaces. Thereafter, both surfaces are again polished in the same way using a diamond paste and, after a brief cleaning using an etchant, the plates are provided on one side with an epitaxially grown monocrystalline surface layer by deposition of the semiconductor material in a known manner from the gas phase. In these plates, a plurality of semiconductor components with planar structures are now diffused in a known manner using the photolithographic technique on masking oxide layers.
Durch die Anwendung des Verfahrene nach der vorliegenden Erfindung ergab sich eine erhebliche Verbesserung der Genauigkeit der Strukturen, da Unterstrahlungen bei den Maekenbildungen auf den Photolaokschichten vermindert und somit die Abbildungeechärfe verbessert let.By using the method of the present invention there was a considerable improvement in the accuracy of the structures, as there were under-radiation in the masking on the photolok layers and thus the Picture sharpness improved let.
009809/1380 _ 3 _009809/1380 _ 3 _
/ - Deutsche ITT Ind. GmbH./ - German ITT Ind. GmbH.
1. Maris 1966 Pat.Go./S. - Fl 320 IM 238 1. Maris 1966 Pat.Go./S. - Fl 320 IM 238
Der Vorteil des Verfahrene nach der Erfindung ist besonders stark ausgeprägt bei dickeren und grösseren Platten, da sich diese schwerer durch Andrücken an eine ebene Fläche über die gesamte Berührungsfläche während der Abbildung der Haskenstrukturen anpressen lassen. Das Verfahren nach der Erfindung macht somit die Verwendung von dickeren und grösseren Platten ohne Einbuße an Genauigkeit möglich. Die Verwendung von dikkeren und grösseren Platten hat aber den Vorteil einer geringeren Bruchgefahr bei der Handhabung. The advantage of the method according to the invention is particularly pronounced in the case of thicker and larger plates, since this is more difficult by pressing against a flat surface over the entire contact surface while the hask structures are being imaged let press. The method according to the invention thus makes the use of thicker and larger plates possible without loss of accuracy. The use of thicker ones and larger plates but has the advantage of less risk of breakage during handling.
009809/13 80009809/13 80
Claims (2)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| DED0049470 | 1966-03-01 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| DE1544182A1 true DE1544182A1 (en) | 1970-02-26 |
Family
ID=7051918
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| DE19661544182 Pending DE1544182A1 (en) | 1966-03-01 | 1966-03-01 | Process for the production of flat semiconductor plates provided with epitaxially grown layers |
Country Status (2)
| Country | Link |
|---|---|
| DE (1) | DE1544182A1 (en) |
| GB (1) | GB1126639A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0617456A2 (en) * | 1993-03-08 | 1994-09-28 | Gi Corporation | Low cost method of fabricating epitaxial semiconductor devices |
-
1966
- 1966-03-01 DE DE19661544182 patent/DE1544182A1/en active Pending
-
1967
- 1967-02-24 GB GB897267A patent/GB1126639A/en not_active Expired
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0617456A2 (en) * | 1993-03-08 | 1994-09-28 | Gi Corporation | Low cost method of fabricating epitaxial semiconductor devices |
| EP0617456A3 (en) * | 1993-03-08 | 1995-12-27 | Gi Corp | Low cost method of fabricating epitaxial semiconductor devices. |
Also Published As
| Publication number | Publication date |
|---|---|
| GB1126639A (en) | 1968-09-11 |
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