DE1168500B - Circuit arrangement for determining the maximum value of several binary numbers, in particular for telephone switching systems - Google Patents

Description

FEDERAL REPUBLIC OF GERMANY

GERMAN

PATENT OFFICE

EDITORIAL

Boarding school KL: H 04 m

Number:
File number:
Registration date:
Display day:

German class: 21 a3- 32/20

A 35764 VIII a / 21 a3
October 12, 1960
April 23, 1964

The invention relates to circuit arrangements for determining the maximum value of several Binary numbers that are simultaneously extracted from a memory bit by bit, starting with the bit of the highest order, can be read out, especially for telephone exchanges.

The invention finds particular application in control devices for telephone systems in which a cyclically operating memory device information relating to subscriber lines and / or Trunks stores. It goes without saying, however, that the invention is not limited to a such application is limited, but also used in other data processing facilities can be. However, the following description only relates to the application with a telephone system.

Problems with subscriber lines arise in most large direct dial telephone systems in extension groups and with outgoing trunk or trunk groups, for example the problem of expanding or connecting such a group. If in the existing subscriber lines or trunk lines in such a group assigned selectors, no outputs are available for such an expansion or connection then it must be extended to other voters or as a whole to one or more others Voters with corresponding changes in numbering are transferred. Experienced this problem a simplification to a large extent in switching systems with common setting devices, in which subscriber or trunk lines as a trunk group via the Connection devices can be distributed arbitrarily without this being disadvantageous. the Expansion of a trunk group only requires the identity of the new subscriber lines or trunk lines stored in the common setting device will.

This solution is possible with those offices where a magnetic drum storage device or the like in the common Adjustment device is used, the drum, disc, tape or cathode ray memory is used to provide information relating to each subscriber line and trunk line to save, such as B. the subscriber number, the address number, the fee class, the idle or busy state, etc. If another connection is established, the associated in-

Circuit arrangement for determining the
Maximum value of several binary numbers, especially for telephone exchanges

Applicant:

Automatic Telephone & Electric Company

Limited, Liverpool,

Standard Telephones and Cables Limited,

London (Great Britain)

Representative:

Dipl.-Ing. E. Schubert, patent attorney,

Siegen, Eiserner Str. 227

Named as inventor:

Robin Devenish Allum, Liverpool,

Victor Edmund Mann,

Taplow, Buckinghamshire,

David Gerald Bryan,

Ronald George Knight, London

(Great Britain)

formation read from the drum and used to establish the connection or to assign the associated Time or frequency channels used. Looking for a free subscriber line or Exchange trunk in a hunt group does not present any difficulties with this arrangement with itself, even if the various connections are randomly scattered across the exchange facility because the drum control circuits only need to determine a "line-free" display, which is the Address of the desired group is assigned to the one required to establish the connections To get information.

However, a problem arises with offices of the type mentioned in the previous section insofar as than with the free selection of a free subscriber line or trunk connection line in a hunt group In general, it is desirable to run the search in a specific order allow. The reason for this is that trunk lines in a group are often staggered and in the case of hunt groups it is customary to give free choice for outgoing and incoming

409 560/85

3 4

coming connections in opposite directions The invention is now based on the two

Perform a synchronous search, for example, reproducing drawing in more detail

of the lines from both ends. are described, namely shows or show

One purpose of the invention is to read this Fig. 1 in a schematic representation to solve the latter problem and in a transfer of information from the magnetic drum memory,

system with a common setting device, in wel- Fig. 2 and 3, if it is aligned with Fig. 2 at the top

cher a magnetic drum storage is used, the allocation of tracks to be placed on

Means for searching a free subscriber line of the drum to a group of subscriber lines

or trunk trunk in a hunt group and trunk trunk lines,

Provide connection group, whose subscriber lines - io Fig. 4 the allocation of memory areas

gen are to be assigned in a fixed order of precedence, with these traces for the stored information according to

the search means ensure that the present invention is always free,

with the highest rank is found. F i g. 5 and 6, denoted by FIG. 5 on the left

Another object of the invention is to create a block diagram which is to be laid side by side.

of circuit arrangements for selecting the 15 ches the mutual relationship of the invention

largest number from a variety of binary numbers. represents the control circuits used while

A further purpose of the invention is, Fig. 7 and 8, when they are applied with Fig. 7 above to a data processing system for the processing, the control selection used in the to be described of data with sequence characteristics and for the embodiment of the invention Single values of data that reflect the highest 20 circles.
Rank in the sequence to create.

The circuit arrangement according to the invention is The magnetic drum storage
characterized by a control device for checking the value of each read-out bit and by a large number of memory tracks are on the other control device for remembering the 25 drum for storing information before-value of the previous bit, as well as being seen which to Subscriber lines and incoming when a bit has a certain value, the bit preceding the and outgoing trunk lines is checked and when this hears that, where each subscriber line and each exchange opposite value has a common memory trunk its own individual memory is called and that when has any area that can contain different tracks, the bit which is read out simultaneously with the previous bit, the information belonging to subscriber lines or trunk connections has the particular value, information belonging to lines is stored on the common memory of the control device The drum is stored in the form of binary signals, causes the checked binary number to be excluded, ie as "1" and "O" signals, and can be permanent, semi-permanent or momentary in all other cases. If, with memory, this control device is able, for example, to set the subscriber call number to a permanent one to accept the checked binary number. Information can be a line fault indication as

According to a further development of the invention, a semi-permanent and a “busy” circuit arrangement, in which groups of number displays, is then momentary information. Because len are stored in a memory and the 40 at least some of the stored information groups are read out one after the other, with functions changed or changed at intervals, and the numbers of a group must be read out at the same time, both reading and writing heads are characterized that the number is provided with on all storage tracks. The writing of the highest value in one group in another of information on the drum is not stored in the memory and the numbers of a later group are to be read out at the same time that only the reading arrangements are dealt with A reading device for the other memory reads out another memory and the 50 memory track is designated, the required shared control memory is called in turn. A reading head converts the magnetic and that, if any of the other stored signals, which have the stored information read out bit, has the specific value, into an electrical signal, which generally has the corresponding bit of the checked high sinusoidal shape , and forwards it to a reading circle, if the number has the opposite value, this last one forwards, which excludes an amplifier and a squaring number, while then, circle contains. The output of the read-out circuit if any of the other memory appears as a square pulse on one of two wires, the read bit has the opposite value, while the first of which is excited when a "!" Signal shows the corresponding bit of the highest number checked is read from the drum while the second has the specified value, a write-in device is energized when an "O" signal is read. The direction under the control of the common memory "1" and "O" signal outputs of a certain rate becomes effective in such a way that they become a bit with a read circuit with the same reference number as the certain value in the other memory Reading circle. If, for example, writes, and that thereupon resetting devices, as can be seen from the drawing, the read-out circuit, which is denoted by RCA for the value of the following 65, then the output wire has bits in the other memory in the opposite for "1" signals Reference symbol RCA, and change the value so that a new number can be stored in it. The output wire for "O" signals has the reference symbol. RCA . The wire references are also

used to distinguish the signals appearing on these wires; so "a signal RCA " means an "O" signal, which is read by the drum and appears at the output of the reading circuit on the wire RCA .

The access to the individual storage areas on the drum is effected by means of a clock pulse, which is derived from signals which are permanent on a clock pulse track on the drum are stored, and these pulses are thus rigidly synchronized with the rotation of the drum. The method of storing information on the storage tracks is that those storage areas which contain any particular pieces of information relating to the Surface of the drum does not change its position and it is therefore possible to use these storage areas in Define the shape of certain pulses received from the clock pulse circuits.

The clock pulse track contains a wave-like signal with a whole oscillation corresponding to each elementary storage area on the storage tracks, and the reading circle for this track creates a row of square pulses, each of which has a duration corresponding to the time, which is an elementary one Storage area needs to pass under the reading head of a storage track. These impulses are transmitted to a number of frequency division circles, each of which is a multi-stage cyclic Has counter with an output wire for each stage. The number of stages in each counter equals the grouping of the storage areas on the storage tracks. For example, if accepted that all information pertaining to a subscriber line with twenty-eight bits in twenty-eight Elementary storage areas can be accommodated, then it will be useful to have one to have available a cyclic pulse train that defines the limits of this track length, and that of The pulse train read from the clock pulse track is first fed into a counting circuit that divides by 28. In addition, if in this example there were a hundred such 28-bit memory areas or "words" on the Circumference of the drum can be accommodated, then the next meter in the chain would be have a hundred steps. In addition, subsequent counters can be provided for grouping the tracks when the traces are read in succession.

In the drawing, two counters are shown in series, the first being shown as having twenty-eight levels and the latter being shown as having M levels. The output wires from the stages of the first counter are labeled TAl to TA2% , and an output pulse appears on each of these wires in turn, each pulse lasting the length of time required for a bit to pass under the read or write head to walk through a memory track. The output pulses on a Γ / 1 wire are provided with the same reference numerals as the wire on which they appear; for example, impulses appearing on the first 7Vi-wire are referred to as TA 1 impulses. The bits which pass under a reading or writing head during the appearance of each TA 1 pulse are also denoted by the reference symbol TA 1. At the next counter in the frequency division chain, each of the output wires sequentially generates pulses of one word length, ie they have a duration equal to that of twenty-eight 7V1 pulses. Subsequent counters in the frequency division chain have pulse outputs which have a similar relationship to those of the respective preceding counting circuit.

In complicated electronic switchgear it is necessary that switching operations be simultaneous should be timed with great accuracy

ίο be. The time division pulses described above and the pulses resulting from the signals read from the drum may not be sufficiently sharply defined at their leading and trailing edges to meet the very precise time division requirements of complex equipment, and for this reason a system of chopping pulses is used. These pulses are generated by signals that are permanently stored on a "chopper" track, whereby the reading circle assigned to this track carries out amplification and rectangular shaping similar to the other reading circles. The square-wave output signals of this reading circuit are transmitted to a pulse-shaping circuit that generates a chain of precisely spaced pulses of very short duration - commonly known as "chopper" pulses - which have the same return frequency as the shortest clock pulses, namely the 7/1 -Impulses. In practice, the "chopper" and "clock" tracks and their corresponding reading circuits are usually combined, with the frequency dividing circuits being driven by the chopper pulse source. Generally speaking, all of the electronic circuitry in the plant is controlled by the chopper pulse source. For example, the reading circles of the memory tracks are switched between the "1" and "O" criteria with the help of chopper pulses so that the moments of change are sharply defined. In no case is a chopper pulse capable of carrying out a switching operation, but it delivers the trigger pulse which is necessary to switch a control circuit from one state to the other if the signal transmitted to the control circuit indicates that such a change has been carried out requires. In addition, the "1" and "O" signals themselves are unable to perform a switching operation until a chopper pulse is transmitted to the circuit.
There are two main logically combining elements used in the circuits of the present invention, namely the gate and the toggle circuit. Two types of gate circles are used, namely the "AND" gate and the "OR" gate. Both gates are of conventional design and use rectifying diodes in the input and output wires; an example of such doors is described in The Bell System Technical Journal, September 1953, pp. 1137-1154. The "AND" gate requires a signal input on all input wires to produce an output signal on the output wire, while the "OR" gate generates a signal on the output wire when a signal is passed on any one or more of the input wires. The symbol for a gate circle is shown in FIG. 1 shown with the reference symbol GA. This is identified as an "AND" gate by the number "2" inside the circle, which indicates that two signal inputs are required to close the gate

to open. The number in the circle always means the number of entrances that are required to open the gate to open. An "OR" gate, on the other hand, always has a number "1" within the circle, which indicates that only one input signal is required to open it. In accordance with the usual This symbol is represented by arrow heads on the input wires that are in the Point in the circle.

the breakover circuit to the "O" state, and an output signal MA is generated. In the "O" state, the tilting circle is viewed as "reset". The drawing shows that, in the example shown, two states or criteria are now required in order to reverse the state of the tilting circle. A "!" Signal must be read from the drum by the reading circuit RCA , and at the same time a signal must be sent to the TA 28 wire

The tilting circles used are also from io, so that the Ύοτ GA is actuated and is a conventional design, which is a further development of the well-known Eccles-Jordan triggering circle. If thereupon a signal RCA appears during the and a symmetrical bistable arrangement of two time division pulses 7Vl 28, then amplifiers are provided, the inputs and outputs of which produce an output through the gate GA and are connected to one another. The arrangement is so that when the next chopper pulse occurs, an external input is switched to the "1" state after a flip-flop circuit and more of the pair produces an output from this amplifier, which continues until an external one
Input received by the other amplifier
whereupon the device in its other stabi- 20
len state and an exit through the
second amplifier is generated. The modification
excludes the use of chopper pulses in
intervenes to effect the reversal of the device. With this arrangement, a signal input 25 chopper pulses are temporally distributed in such a way that they are not sufficient to switch the device on one side of the tilting circle towards the end of the defined by the T ^ l pulses when they appear at time intervals. If one assumes that the alternative state, however, the circuit, the conditions for setting the Kippkreises in appearance of the next Zerhackerimpulses overall MA are satisfied, then the sequence of operations when switched on, provided that the signal input for a 30 adjusting the Tilt circle as follows:

an output MA. When the tilting circle is brought into the "1" state, it is referred to as "set".

It was mentioned earlier that signals such as RCA and RCA . can be controlled by the chopper pulse source, and in fact the leading edges of such signals coincide with the chopper pulses. It must also be mentioned that the

has persisted for a short minimum period. This means that the transition or change is always in occurs at a precisely defined moment, regardless of the shape of the input signal. An example a tilt circle of this type is shown in British Patent 801,681.

A tilting circle is shown symbolically in FIG. 1, which bears the reference symbol MA. The two sides of the circle are marked with "1" and "0", with the input cores of the "1" and "O" sides being provided with arrow heads pointing into the tilting circle, and the output cores pointing to the right extend. The signals on these output wires are usually identified by the same reference number as the trigger circuit, in the same way as the signals from a readout circuit, and in this example a signal that appears on the output wire from the "1" side of the trigger circuit , labeled MA , while a signal that is generated on the output wire from the "0" side is labeled MA. In the drawing there are connections to both sides of the tilting circle of

A chopping pulse appears towards the end of the time division period TA 27, and this chopping pulse coincides with the leading edge of the RCA signal; at the beginning of the time division pulse TA 28 , both inputs to the gate circuit GA are energized, and an output signal from the gate is transmitted to the "1" side of the toggle circuit MA ; this input signal is not sufficient by itself to set the breakover circuit, but towards the end of the time division pulse TA 28 another chopper pulse appears which coincides with the trailing edge of the RCA signal, and this chopper pulse triggers the breakover circuit in the "set"state; at the same time the gate GA is closed by the termination of the signal RCA ; shortly thereafter, namely at the end of the time division pulse TA 28, the other input after the gate GA is removed.

It can therefore be seen that although an output MA is generated by the breakover circuit at the end of the time division pulse TA 28, it is too late to be able to perform during this time division pulse.

the chopper pulse output wire is shown,

which indicate that this is in addition to the signal 55 ses to be effective, and he is only then used

input cores are required to the control circuit when the next chopper pulse

to be pressed, however, it is usual for this symbol to appear during the time division period TA 29,

omitting the chopper pulse connections, and assuming that the "1" signal, which

in the other circuits, which the invention by the circuit RCA during the time division

represent, the tilting circles are read without this zero pulse TA 28, an "O" signal follows,

hacker connections shown. then the corresponding signal RCA begins at the same time

An example of how a tilting circle works, a moment like the chopper pulse that creates the

like MA, can be described with the help of this drawing. Adjustment of the tilting circle MA caused. The latter

be practiced. Assuming that a "0" of will therefore occur until the following one appears

of the drum by the reading circuit RCA read 65 chopper pulse, which with the completion of the

is then an input after the "O" side of the RCA signal collapses, not reset.

Kippkreises MA transmitted and this signal to-the control circuits for setting and back

Together with the following chopper pulse, the tilting circle MA should be briefly in shape

a »circuit notation« - the corresponding information runs on the which is adapted to Boolean algebra. In this index and measurement traces ahead by a word length. Form are those in FIG. 1 shown control circuits from F i g. 2 shows that they form a group for Controlling the tilt circle respectively: The eight subgroups are numbered from 3 to 10.

5 This is done to avoid the misleading assignment of the

RCA.TA 28 - MA traces of use to similarly numbered subgroups

and RCA - MA. to avoid. All hunt groups that

Extension groups and outgoing trunk connections

The meaning of this form for the reproduction lines are assigned to the subgroups, the of switching operations is completely numbered in the Post Office io with 4 and 7, and since these are more Electrical Engeneers Journal, Vol. 51, Part 2, July Information Require As Ordinary Participant-1958, Pp. 137 to 144. lines, is the additional card track that is used as an auxiliary

It is emphasized that all of the map track is indicated by the block diagram for each of these two the control circuits shown in Fig. 1 are known subgroups are provided.

and at this point only be described 15 The arrangement of the information on the card index to facilitate understanding of the invention. and traces of use go out exactly from FIG. 4 emerges.

This drawing shows a track length corresponding to one word for each of these three types of tracks,

Design of tracks in the magnetic drum storage, the measuring track has been omitted because it

ao has nothing to do with the present invention.

For the purpose of storing some of the information, as shown in the drawing subscriber line or trunk line, in practice the information heard on these tracks is stored on the drum, with only those details, subscriber lines and trunk lines being stored here divided into appropriately sized groups for describing the present invention, the 25 being useful, are shown,
stored information relating to each group on the auxiliary index track in subgroups 4

relates, distributed over different drum tracks and 7 occupies one as the "group number". A certain magnetic drum control device knew number that belongs to extension lines and is a group of subscriber lines and trunk outgoing trunk lines, the connecting lines together and is referred to as 30 memory bits TA 1 to TA 16, corresponding to "group equipment". Each group is able to subdivide a number of subgroups by the telephone number of a line, each of which is taken up on the main map track. Each may contain, for example, one hundred subscriber lines and trunk subscriber lines in an extension group or trunk lines. In the trunk line to be used in an trunk call writing embodiment, the lanes, the line group is the same group number are required in order to give a group of eight. In addition to the group number, each such subgroup has subscriber line or trunk information associated with it in stores in Figs. 2 and 3 shown. an individual sequence number for such a group,

It can be seen from the drawing that each sub-group identifies its position in this group in the sequence group either two or three complete tracks 40 of precedence. The six bits TA 19 bis required, and the area on each of these TA 24 lanes are provided for the storage of this rank number by each subscriber line or trunk, which is stored in binary form, line occupied in the subgroup There are thus sixty-four possible values for is is considered a word length. Each sub-number, and the hunt group arrangement, requires a master index track and a 45 group up to sixty-four subscriber line measurement track, and two of the subgroups require trunk lines. If larger surcharge an auxiliary map track. Two further lane groups are required, a second one can be provided within the group, which is assigned as a group number. The direction of the "operating" tracks are designated, and this scanning of a track runs, as shown in the drawing, are divided into the eight subgroups. A 50 can be seen, from left to right, and the word length on each of these operating lanes is shown in four, that the bits of the rank number are divided into descending quarter words, with eight quarter words arranged in the order, that is, the highest of each word length is provided . The eight subordinate bit 2 ⁵ in TA 19 is scanned first,
subscriber lines and trunk lines that are The only information on the main card track that

belong to a group and the same word length 55, which has to do with a collective connecting line, is occupied on the tracks, one of these eight is the one that is stored in bit TA 18, where erne quarter words are allocated, and FIG. 2 shows which »1« in those words that are only assigned to the collective subgroup of these quarter words. connecting cables are permanently stored.

While corresponding words on the various The operating track contains momentary and semi-permad 60 subgroups belonging to the same group information relating to subscriber lines and penspuren are arranged so that they belong under their trunk lines, such as "free" or respective reading and writing heads at the same time "occupied", "line fault" etc. Diesel information run through, the quarter words on the operating tracks are grouped on the operating tracks to the traces showing information corresponding to this need for the provision of control circuits Words contain, relative to the line addresses, 65 for the constant change of such information to which they refer, displaced. They are - to be avoided on the index tracks. The only one on they are actually arranged in such a way that they contain information stored under the operating tracks, which is used for their respective reading and writing heads owned by the present invention is that which is im

11 12

first bit of the associated quarter words stored connection group. This is taken from the auxiliary map track and which is referred to as the "busy" indicator is to be read and in the associated connection. A »1« is forwarded in the »busy« bit mar-line discriminator. The liaison, if a subscriber line or trunk line discriminator compares that of the auxiliary line is occupied. 5 card track read off group number with a

Group number that is assigned to all connecting line

General description of discriminators by the shared memory

for called subscriber numbers is offered in

On the basis of FIG. 5 and 6 should now be introduced to which the desired group number brief description of the operation of the plant io was made before searching for the called part Determining the free line with the highest subscriber line began. This gives a connection priority are given, namely when building line discriminator will be able to determine whether a connection to a hunt group. a connection line address with the requested The search for the desired subscriber line group number has been achieved and, moreover, or trunk connection takes place via the two 15 with reference to the associated memory circle, whether associated subgroups 4 and 7 in each group this subscriber line is free or busy. simultaneously. For explanatory purposes, however, only the next piece of information to be read from the drum is

the operational, main index and auxiliary index traces mation part is the marking, which is a collection of one Subgroup in each of the two groups on the connecting line on a main index track identider Drum shown in the drawing, with the 20 ficated. These marks are made by collecting both groups shown with "1" and "iV" connection line detectors are determined are numbered. As a further simplification, these are a signal from the associated trunk terminals Reading circles assigned to reading heads are received at discriminators if a free line those traces omitted from the drawings are encountered in the called hunt group been. In the drawing the one on the right is 25. When both states arise, the transmits The affected trunk line detector shown on the side of the broken vertical line Establishment of a common device, while signal after the common hunt group the remaining device between the drum line staticizer. The collective connection line and the broken line is shown, a staticizer keeps this mark over the whole search Facility is that individually to each Untergrappe 30 after the free line of first choice and away heard. uses it during the following revolutions

The function of the control circuit is to activate the drum when the selected connection is complete Scanning all the hunt group line is busy.

lines assigned traces to carry out the If a trunk discriminator a

Rank numbers of all these lines, which are the free connection line in the called group members Have determined the group number, then it transmits a gate signal check whether these lines are free, the rank number according to its assigned rank number bit gatekeeper, when they are read, with others, in a circle. All ranking numbers are taken from the auxiliary card equals Time-read rank numbers and out-of-track by the rank number bit gate circles from then on with the 40 read earlier in the scan, but only if one is present to compare the highest ranking number and in the gate signal from the associated connecting line rank number staticizer designated device the discriminator a ranking number bit gate circle the ranking number read up to this point in time transmission of a ranking number according to the community to save the highest value. At the end of a seed rank number staticizer allows full rotation of the drum becomes the rank 45 There is a further criterion for the detachment number that free line in the desired, whether a rank number by a ranked Group that has the highest rank to be forwarded in the number-bit gate circle. It Rank number staticizer is saved, and it should be pointed out once again that the The subsequent revolutions of the drum may be the purpose of the device is to rank the one Subscriber line or trunk connection 50 number staticizer only the highest ranking number line which has this ranking number. "To enroll" that at any point in time the scanning is done, the information that has been taken is. In addition, Rangdie to any subscriber line or trunk number in different subgroups at the same time Connection line with the desired group can be read. Any rank number that read off number is heard first on the associated company 55, must therefore both with the rank number, the track encountered. The only one that comes into consideration may already be in the rank number status information on this track is whether a line is freely registered, as well as with an or or is busy, and if a subscriber line has several other ranking numbers, which are from the Tromfrei is, this information is in the this track mel can be read at the same time, assigned »memory circle«. The 60 are compared. The arrangement of the six bits "Line-free" indicator is displayed in this circle during which the rank numbers as it relates to the rest of the scanning of the word in which they hit F i g. 4, simplifies the appearance, and also during the subsequent same since the highest rank bit encountered first Word held when another one becomes the same. It is therefore only necessary to put that together Check subscriber line related information from the 65 read bits until a non-related information Card track is read. The next attunement between them first appeared Associated partial information that appears on a reading head, and if this is determined, then must appear, the group number of the collective maneuverable is the number that corresponds to a »1«

holds where a second number contains a "0" to be a higher number and to a connection line belong to higher rank. For example, if a rank number 011101 from the auxiliary map track is a Subgroup read at the same time with a second ranking number 011110 from a second subgroup a mismatch is found when the fifth bit is sampled, and the comparison reveals that the second ranking number has the higher value. These The second number would then be via the rank number bit gate circle, which belongs to that subgroup in which it appears, is assigned, let through, while the first ranking number after the fourth bit would be rejected by their own ranking bit gate circle.

The same conditions apply when comparing the rank numbers read from the track to a rank number already stored in the rank number staticizer. When the from the drum read number has a higher value than the one in the staticizer, then the new one Number given the opportunity to continue running after the staticizer, where the old number from the point at which the mismatch appears is removed, while when the new number has a lower value than that already stored, the associated rank number bit gate circle the transmission the new number from the point at which the mismatch appeared occurs, prevented. This facility by which numbers are allowed to scroll until one If there is a mismatch, there is no cause for incorrect registration in the Staticizer, in case the new number is lower than the one already saved, because only the one Binary digits a continuation after the rank number staticizer is allowed, which with the already stored binary digits match.

Determining whether a rank number is passed through a rank number bit gate circuit, works as follows: The rank number staticizer sets the condition that only "1" places of the Drum need to be forwarded after him, whereby "0" digits are neglected. the The first decision that is then to be made by a ranking number bit gate circle is whether a "1" or a "0" is read. If a "1" is read as part of a rank number, so the second decision is due, which consists of whether this "1" should be given the opportunity to to continue running after the rank number staticizer or not. To make that decision, checked the rank number bit gate circle the bit read from the drum corresponding to the current one Bit immediately precedes. If this previous bit was also a "1" then it becomes the current one "1" given the opportunity to continue, because it is obvious that at least down to the bottom no other rank number read from the drum at the same time has a higher one than the current bit Can have value. However, if the immediately preceding bit was a "0" then the Possibility that a second number read at the same time has a higher value than the Would be the case if the second number had a "1" on the previous bit. If it turns out that this is the case, then the rank number concerned must not be given the opportunity to to advance somehow as a higher ranking number is available. On the other hand, if none Another rank number read at the same time had a "1" in the preceding bit, then the rank number bit gate circle must be added given the opportunity to forward the current "1" because at least up to this point there is no indication that all other rank numbers, the

ίο can be read at the same time, higher Have values. It has already been mentioned that there is no disadvantage in the simultaneous transmission of several Rank numbers are created via their respective rank number bit gate circles as long as they are in Agree because there is no confusion.

It can be seen from the drawing that a delay circuit is provided in one of the paths between an auxiliary map track and its rank number bit gate circuit. This delay circuit has a delay of the duration of one bit and gives the subsequent ranking number bit gate circuit the opportunity to observe the continuously read bit via the direct route and at the same time to monitor the previously read bit at the output of the delay circuit. The indication of whether the previous bit read from any of the other auxiliary map tracks was a "1" is obtained from the "Previous Bit Memory". It has already been mentioned that only "1" digits are passed on through rank number bit gates, so that the "memory for the previous bit" only needs to remember whether a "1" was previously received from any subgroup. This information is fed back to all rank mimmer bit gates, and if one or more subgroups read a zero as the preceding bit, if the "memory for the preceding bit" indicates that a "1" appeared in at least one other case, then the other bits of the rank number or numbers of lower value are blocked by their respective rank number bit gate circles.
Similar precautions have been taken for the decision as to whether a rank number should be given the opportunity to proceed after the rank number staticizer, specifically with regard to the number already contained in the staticizer. The "memory for the previous bit" checks the bits stored in the rank number staticizer one after the other at the same time as the corresponding bits are scanned on the bus card tracks and remembers a "1" as the previous bit in the same way as in the case of signals read from the drum. If the previous bit, which is stored in the rank number staticizer, was a "1", then this information is returned by the "memory for the previous bit" after all rank number bit gates, so that all rank numbers whose preceding bit is " 0 «should be blocked. If, however, a higher ranking number than the one already stored in the rank number staticizer is read from the drum, then a "0" written in the staticizer is converted into a "1" at one point, and this conversion is monitored by the reset circuit , which then all subsequent ones in the rank number staticizer

15 16

stored bits are converted into a "0", so that the TA 1 pulse, which can be entered at the beginning of the new number, appears in which the corresponding information appears on the index tracks without the risk of confusing the old and new numbers appears. The second tilt, circle M 14 is provided around the previously read

5 information across this entire second word

Save the individual description of the control circuit, and is therefore in the same state

like the tilting circle M 13 through the gate circles G 3

A description of the individual circles of the control and G 4 switched at the beginning of this word, namely circle should now be made with reference to the F i g. 7 and 8 when the time division pulse TA 1. appears, follow as far as possible in the order in which the io The circles are used to carry over the setting of the circle. To Kippkreises M 13 to the tilt functions M 14 are:., The identification of the various parts of the control circuit with the in Figures 5 and 6, Af 13X41 - M facilitate 14 (3) block diagrams, the correspond and M 13.TA 1 - M14. (4) corresponding parts of the control circuit in dashed lines 15
included and designated as follows: At the time this change occurs,

«-, .., ·, ■ _λΑΓ , the first breakover circuit M 13 is switched again to

ueüacntnisKreis —ml. _{the track signal by means of the cogs (1) and (2)} .

Connecting line discriminator ... -LD speak. Similar circuits that are controlled by the time sub-delay circuit - DC zo division pulse TA 8 are in the case

Rank number staticizer —SNBGC of subgroup 4 provided.

Memory for the previous bit - PBM

Rank number staticizer -SMS connection line discriminator

Reset circuit - RC 25 A connecting line discriminator is for each

Collective connection line detector - MALD subgroup provided and has a toggle

Collective Trunk ^{Staticizer - MALS circle M1 on} · ^{This is interrupted by every} time

division pulse TA 28 is set, ie in the »1«

The operating track ^memory circuit was switched, namely in the circle:

Each subgroup has its own memory- TA 28 - Ml (5)

circle, which is assigned to the corresponding operating lane. This circle "remembers" a loading and is therefore in the set state to sets marker during the word in which it starts scanning each word. This tilting circle appears, and during the following word, 35 enables the transmission in the set state for the time difference when reading the corresponding ranking numbers that are derived from the auxiliary map track Information can be read from the operating and index tracks via the associated ranking numbers care for. It should be pointed out again bit gate circuit and prevented in the reset state that hunt groups in the such a transmission.

Subgroups 4 and 7 appear, and the "busy" - 40 The toggle circle can be reset by any of an indication for trunk lines in these two number of criteria, with the subgroups appearing as bits TA 8 and TA 1 first in chronological order one on, namely on the associated signs of use. "Busy" is the marker that belongs to the line that has just been scanned. The "busy" state is thereby shown, for example, in FIG. 7 shown. indicated that the tilting circle M 14 is being set,

In this figure, the input wires are from and in this case the trigger circuit M 1 can be reset to the immediate operating track reading circuit with RCl or RCl , namely by the circle: draws and carries "1" and "0" signals that of

can be read from the operating track. Two tilting circles 50 Af 14 - Ml (6)

M 13 and M 14 are provided. When considering

coming subgroup, in which the "occupied" - the tilting circle Ml must also during the

If the display appears as bit TA 1 , each undesired subscriber line AND gates G1 and G2 are both scanned, which reset the "1" and "0" -Si-, and there are therefore circles in advance of the drum in the tilting circle M 13 further- 55 to provide the information contained in the group routing with inputs from the time division pulse number memory stored on the auxiliary card track TA 1 so that only those signals are read out and assigned the group number of those from the operating track during this time under- desired group of subscriber lines or division pulse can be read by comparing the toggle trunk lines. The gekreisM13 will be registered. The circles that control these 60 desired group numbers are controlled by a flip-flop circle in FIG

ώγλύλλ λ% (λ \ ¹ ^ ⁰ * ^{11 m} details shown because he is not used for

KCl.lAl - M Ii (1) belongs to the present invention. It should be mentioned, however

and RC1.TA 1 - MH- (2) 65 that it contains sixteen trigger circuits that represent the

correspond to sixteen information storage locations,

This tilting circle remains in the state in which it is entered by the group number on an auxiliary server has been switched to be occupied until the following map trace, and that these trigger circles

17 18

with the help of time division pulses synchronous with rank number bit gate circle

the scanning of the group number on the drum _and the memory for the previous bit
are scanned. The result of the scan in

the memory for the called subscriber number It should be pointed out again

appears on two alternative cores, WGN for 5 that a "1" is only ever replaced by a rank

"1" signals and IEGjV for "0" signals, and this number-bit gate circle is forwarded if the

are on all connecting line discriminators preceding bit, which is in a ranking number in the

distributed. associated subgroup is read, too

Two control circuits, which the gates G 7 and G 8 was a "1". An AND gate GIl in one

are included for comparing the called io rank number bit gate circle being in a circle for

Group number - one bit after the other - with the setting of the tilting circle M 3 in the »memory

the group number that is used by an auxiliary map track for the preceding bit «in this case,

is read, provided: The circle is:.

RC2.WGN.TA (1-16) -Ml (7) ₁₅ RC2.MIM2.TA (19 + 21 + 23) -M3. (11)

and RC2.WGN..TA (1-16) - Ml. (8) This circle contains "!" Signals directly from the

associated auxiliary card trace through the reading circle

The first of these control circuits offsets the toggle RC 2 and "1" signals, off the track and through one

circuit Ml in the reset state when a time division pulse is delayed from the set

"0" signal from the auxiliary map track at the same time on the 20th side of the tilting circle M 2. It is also a

is read like a »1« in the memory for input from the set side of the tilting circle Ml

called subscriber numbers are present in any of the trunk line discriminators,

Storage elements TA 1 to TA 16, and the second, the latter input ensuring that only one

then puts the breakover circuit M1 into the reset belonging to a free called subscriber line

State when a "1" signal from the auxiliary card track 25 information is passed on through this gate. the

Time division pulses TA 19, TA 21 and TA 23 are read at the same time as an "O" signal

in the memory for called subscriber numbers limit the activity of this gate to bits in

during the same sampling period. So if to change according to the rank number, with the

a time division pulse TA 16 of the trigger circle other bits employed a corresponding gate G12.

AfI is still in the set state, so 30 This latter circle is:

it is deduced from this that there is currently a free part- RC2.M1.M2.TA (20 + 22 + 24) -MA (12)
subscriber line m scanned the desired group

will. and it can be seen that this gate - apart

The remaining conditions, states or criteria, from the time division pulses - similar inputs, among which a tilting circle Ml is reset, has 35 gears after the gate GIl. Its output should be used when describing the comparison of controls the second toggle circle M 4 in the "memory rank numbers that are different for the previous bit" at the same time. At this point, subgroups should be read, it should be mentioned that the necessity of two is explained. Signal paths from each ranked bit gate circle

40 after the "memory for the previous bit"

Delay ^{circuit s} ^ ^from ^ ^he use of two trigger circuits in the

the latter for processing the subsequent

It has already been mentioned that it gives signals carried out for the information. These two circles are

tion are two ways by which it is necessary from an auxiliary, because it is with the time division pulse,

Index track according to a ranking number gate circle that follows the receipt of a "1" signal, individually

long, one direct path and one via one are to be reset, and a tilting circle is therefore only

Delay circuit. This delay circuit shows itself in a position with alternating time division

a trigger circuit M 2 , which is dealt with periods by a "1" signal. The two gates GIl and G12

set and by "0" signals, which are provided by the auxiliary for all those time subdivision

card trace can be read, reset, and 50 pulses during which the ranking number of a partial

by means of two groups: subscriber line or exchange line group

can be read; however, it should point out-

RC 2 - M 2 (9) are assigned that a "1" signal, which as

and RC2 - M.2 (10) bit TA 19 appears, never through one of these gates

55 can be forwarded because it never gets through

where RC 2, the designation for the reading circle, can be switched a »1«, since the bit

is an auxiliary map track. Due to the use of TA 18 on the auxiliary map track always carries »0« signals,

a chopper pulse source for controlling the switching. With a "1" appearing as bit TA 19 , concerned

Moments of the breakover circuits creates a delay therefore the control circuit that has just been described

corresponding to the interval between two chopper-60 becomes.

impulses between the switching of the breakover circuit M 2 It should be pointed out once again that

and the moment at which an output alternates - that in the case of a "1" signal, which is a

the side on which it has been switched is followed by a "0" signal in a rank number, the "1" signal

becomes available for controlling additional circuits. via the associated rank number bit gate circle

This tilting circle can therefore be regarded as being transferred if there are no other auxiliary files.

the fact that there is a delay in a TA time tracking with a "!" signal as the preceding bit of a

division impulse for the subscriber line free of an auxiliary map track in the called group

provides read information. generated. Two circles with gates G13 and G14

are provided to determine if there is a "!" signal under these circumstances after the common setup should be forwarded. These are:

RC2.M1.M2.M4.TA (19 + 21 + 23) - M3 (13)

RC2.Ml.M2.M3.TA (20 + 22 + 24) - MA. (14)

In the first of these circles, a "1" signal from the reading circuit RC 2 on an auxiliary card track together with a simultaneously appearing "O" signal from the delay toggle circuit M2 after the toggle circuit M 3 to the "memory for the previous bit" during the Clock pulses TA 19, TA 21 or TA23 transmitted, provided that firstly the connecting line discriminator circuit M1 indicates that a free line in the called group is being scanned and that secondly an "O" signal as the preceding bit in every other associated subgroup was read. This latter state is characterized by the reset state of the toggle circle M 4 in the “memory for the previous bit”. A reset circuit

is averaged, is always forwarded via the gate, provided that it belongs to a free subscriber line in the called group, because the toggle circle M 4 in the "memory for the previous bit" is still in the reset state, which corresponds to the previous reset pulse at TA 25 follows in the previous word.

Rejection of ranking numbers with

lower value by resetting the

Trunk discriminator

TA (21 + 23 + 25) -M4

(15)

is provided, which resets this toggle circle after every possible time division pulse in which a "1" can be transmitted to it by any rank number bit gate circle. The reset output of the toggle circuit M 4 therefore only supplies an "Ö" output during the time division periods TA 21, TA 23 or TA 25 if it has not received a "1" signal in the preceding binary position through any rank number bit gate circle. The gate circuit G13, which is only to be operated during the time division pulses numbered with odd numbers, must therefore refer to the toggle circle M4 rather than M 3 in order to determine which signal the "memory for the previous bit" during the previous Time division period was transmitted because the trigger circuit M 4 receives signals only during time division pulses numbered with even numbers.

The gate circuit G14 is controlled in a similar manner by the reset output of the toggle circuit M 3 in the "memory for the previous bit", the latter toggle circuit being reset by the time division pulses TA 20, TA 22 and TA 24, namely in the circle:

TA (20 + 22 + 24) - M3.

(16)

So if a "1" is read from an auxiliary card track in the rank number of a free subscriber line in the called group, which follows a "0", which is read from the same track, the "1" is only then via gate G13 or their corresponding gate G14 is forwarded if no other subgroup has generated a "1" signal as the preceding bit. This circle ensures a "1" stored in the first binary digit of a ranking number, which must always be given the opportunity to continue using the ranking number bit gate circle, since the ranking number with a "1" as the highest order bit always has a higher value must have as one with a "0" in this position. The signal RC2, which after the gate G13 during the time division period TA 19 over-From the preceding it can be seen that if a "1" is read from an auxiliary map track in a rank number which belongs to a free subscriber line in the called group that one or the other of the two toggle circles M 3 and M 4 in the "memory for the previous bit" is set to the set state, provided that (a) it follows a "1" as the preceding bit of the same rank number or (b) it appears as the first bit of a rank number or (c), if it is preceded by a "0", no other subgroup has generated a "1" as the preceding bit. The signals temporarily stored in the "memory for the previous bit" must be compared with those signals that are always stored in the rank number staticizer, and if they represent a higher number than the one already stored, then the number is replaced in the staticizer. Precautions must therefore be taken to prevent the "1" signals in different binary positions from being combined by two or more ranking numbers into an incorrect ranking number.

For example, if the two rank numbers 110110 and 111101 appear in two different subgroups at the same time, then the first two "1" digits of the first number and the last "1" in the "memory for the previous bit" are passed through the circles described so far, and the first four "1" digits of the second number, which results in an incorrect number 111110, are presented to the rank number staticizer. It is therefore necessary to provide a control circuit for interrupting the transmission of a ranking number via a ranking number bit gate circuit as soon as it has been found that a second number read at the same time has a higher value.
The condition for rejecting a ranking number in favor of a higher-order number, which is read at the same time, is that a "0" in the number with a lower value appears in the position occupied by a "1" in the other number . Control circuits are therefore provided in each connecting line discriminator which compares each "0" signal in a readable ranking number, which is read from this subgroup, with the signals read in the corresponding positions in the other subgroups, in order to determine whether a "! «Signal was read in any of them. The two intended control circuits are:

M.2.M3.TA (20 + 22 + 24) —Ml (17)
and M2.M4.TA (21 + 23 + 25) -Ml. (18)

The first of these control circuits with gate G17 puts the tilting circuit Ml into the reset

State in the event that a "0" is read as any of the rank bits TA 19, TA21 and TA 23, which is indicated by the reset state of the breakover circuit M 2 during any of the time division pulses TA2Q, TA22 and 7.4 24, provided that the toggle circle M 3 is in the set state, which indicates that a "1" in any other subgroup has been read as the preceding bit. The second of the two control circuits with the gate G18 effects the same comparison for the remaining memory bits of the rank number, namely TA 20, TA 22 and TA 24. The preceding section shows that the trigger circuit Ml is not reset in a connecting line discriminator until the chopper pulse appears in the binary position that follows the one in which the first discrepancy or contradiction between the larger and smaller rank numbers appeared. The resetting of this toggle circuit is therefore not timely in order to prevent the first undesired bit from being transmitted through the corresponding rank number bit gate circuit. However, this is irrelevant because if the lower number contains a "1" in this position, it is rejected by the associated one of the two gates G13 and G14 because it is preceded by a "0". All subsequent bits of the lower ranking numbers are rejected by resetting the toggle circle Ml in the connecting line discriminator, which closes the gates GIl to G14 in the ranking number bit gate circle of this subgroup.

Rank number staticizer

In addition to the comparison of ranking numbers with other ranking numbers which are read off in other subgroups at the same time, the ranking number already stored in the ranking number staticizer must also be taken into account in the comparison. This control circuit consists of six trigger circuits M 5 to MIO, corresponding to the six bits that form the row number. The number stored in the staticizer is read out one bit after the other, using the associated time division pulses TA 19 to TA 24, with the individual bits in the associated trigger circuits M 3 and M 4 in exactly the same way as that of the Drum-read rank numbers are passed in, with the exception that in this case it is not necessary to pass the number over an equivalent of a rank number bit gate circle. However, there is a complication with the arrangements for reading a stored number from the staticizer and transmitting it after the "memory for the previous bit". Some of the trip circuits of the staticizer must be reset when a higher ranking number is read from the drum, and it is necessary to eliminate the possibility of incorrect information being returned to the "memory for the previous bit" by switching off the staticizer reads out those bits that are about to be changed. Before describing the extraction of information from the staticizer from the control of the new ranking number read from the drum, the staticizer itself should first be described in detail so that the states into which the tilting circles are reset can be better understood. The fact that one of the toggle circles M 3 or M4 in the "memory for the previous bit" is in the set state during each of its associated time division pulses means either that there is already a "1" in the staticizer in

to the corresponding binary position or that a "1" has been read in at least one new ranking number on one or more auxiliary map tracks or that both states prevail. The "1" signals that are registered by the two toggle circles in the "memory for the previous bit" can therefore be put in their respective toggle circles in the rank number staticizer as soon as they are available. In this way a "1", which is read from the toggle circuit M 5 in the staticizer during the time division pulse TA 19 or from an auxiliary card track during this time division pulse, is available at the output of the toggle circuit M 3 during the time division pulse TA 20, and a goal G19 is intended for writing this "1" into the triggering circle M 5 during the time division pulse TA 20 , this circle being as follows:

M 3.TA 20 - MS.

(19)

Similar circles are provided for writing "!" Digits, if they appear at the trigger circles M3 and M4, into the associated trigger circles of the staticizer by means of the next time division pulses TA21 to TA2S . These circles are:

M 4.TA 21 - M 6, (20)

Μ3.ΤΑ22 - ΜΊ, (21)

M 4.TA 23 - M 8, (22)

M 3.TA 24 - M 9, (23)

and M4.TA25 - MIO, (24)

The gates contained in these five circles are G 20 to G 24.

If a higher order number is written into the rank number staticizer, then it is necessary to reset all those tilting circles in the staticizer circles that follow the one in which the first change from a "0" to a "1" takes place to avoid confusion between the exclude old and new numbers. This is done in two stages. First off is a set of Control circuits for recognizing a change from a »0« to a »1« criterion, which is in any of the tilting circles of the staticizer takes place, as well as for resetting that tilting circle that immediately follows the one in which such a change is determined. In the second A further set of control circuits for resetting all of the trigger circuits in the staticizer is established in the 3rd stage used these two.

To return to the first stage of this reset process, it is assumed that the first Tilt circle M 5 in the staticizer contained a "0" and that a new ranking number should be written, which has a "1" as the first bit. A reset criterion must now be after the tilting circle M 6 be transmitted in the event that this is in

the set state. The control circuit which effects this determines that the trigger circuit M 5 is in the reset state and that at the same time a setting signal is being transmitted after it. The reset gate for the toggle circuit M 6 therefore requires inputs from the reset side of the toggle circuit M 5, from the setting side of the toggle circuit M 3 and from the time division pulse source TA 20. The gate G 25 is to be activated during a search for ranking numbers, whereby such a circle is not necessary because once a ranking number is found that has a "1" as the first bit, no higher ranking number that will be found subsequently may require that this state be changed. However, a general reset device is provided for all trigger circuits in the rank number staticizer, which after the end of the

Requirements for, and the required reset io selection of the required subscriber line or

circle is: trunk during the following

M 3 M5 TA 20 M 6 (25) revolutions of the drum. A

'' '' General reset 'signal is then through

Similar control circuits are provided for resetting the means (not shown) on the GRL wire.

Tilting circles M 7 to MIO seen under the same conditions, which all tilting circles M S to MIO back

provisions provided, d. i.e., the preceding circle is in the circle:

is changed from "0" to "1". These circles are:

Μ4.Μ6.Γ.421 - Ml, (26)

M3.M 7.7 Ά 22 - M 8, (27)

M4.M8-TA23 - MI, (28)

and M3.M9.TA 24 - MIO, (29)

GRL - MS, M6, Ml,

M8, M9 and MIO (38)

Transfer from the rank number staticizer according to the "memory for the previous bit"

From the preceding description of the

where the gate circles included are G 26 to G 29. 25 Writing a new ranking number in the ranking case the second reset stage is the reset number staticizer shows that the reset circuit is used, which contains the tilting circle M12. circles for all tilting circles M6 to MIO during the This circle will be actuated by any of the combinatorial time division pulses functions of the signals in gates G 25 to G 28 such as those at which outputs from the »1« side appear, set, whereby the reset circle is 30 of these tilting circles according to the »memory for the is set when any of the toggle preceding bits are transmitted. To the circles M5bis M8 in the staticizer to prevent the "O" confusion of numbers that arose is changed to the "1" state. Which would stand if any information came out of one four circles for setting the tilt circle tilt circle in the staticizer at the same moment M12 are used under these conditions, 35 is read out in which this is reset are:

M 3.M 5.TA 20 - M12,

M4.M6.Tv4 21 - M12,

M3.M1.TA22 - M12,

and M 4.M 8.TA 23 - M12,

(30) (31) (32) (33), circles are provided that the output signal of any of these tilting circles depending on the absence of a reset criterion do. In any case, with the exception of the tilting circle M 5, which is not reset, the Output of a trigger circuit is only transmitted in the absence of all signals that were activated when this special tilting circle can be used during the search for the highest ranking number. So will

the trigger circuits Ml to MIO in the rank number 45 the trigger circuit M6, which is reset together by the signals M3 and mernstaticizer during their associated time under- M5, only the possibility

given to transmit a signal after the trigger circuit M 4 during the time division pulse TA 20 in the absence of one of the two signals M3 or M5. It is advisable to provide gate circuits which, for this purpose, are dependent on the absence of signals M3 and M 5, G 39 and G 40 being the two gates. The circles are:

the four gates included are G 30 to G 33. If the reset circuit is set, then

division impulses reset, namely in the four circles:

M 12.TA 21 - Ml, M 12.TA 22 - M 8, M12.TA23 - M9, and M12.TA24 - MIO,

(34) (35) (36) (37)

the four gates included are G 34 to G 37.

It should be noted that the tilting circles M 5 and M 6 are not reset by the set state of the tilting circle M12. Such a reset is not necessary because the tilting circle M12 only needs to be effective on the staticizer tipping circles, namely after the one that immediately follows the one in which a change from the "0" state to the "!" State has taken place , and the tilting circles M 5 and M 6 can never fall into this category. It should also be noted that the tilting circuit M 5 has no other reset circuit that

M5.M6.TA 20 - M4 (39)

and M3.M6.TA20 - M4. (40)

Similar control circuits are required to control the transmission of a signal from the trigger circuit M 7 control back to the toggle circle M3 in the "memory for the previous bit", but occurs in In this case, a further condition insofar as the tilting circle M 7 is also set by the State of the tilt circuit M12 can be reset in the reset circuit. Therefore need in addition in addition to the absence of one of the two signals M6 or M 4, both conditions also include the absence of the M12 signal. The two circles

with gates G 41 and G 42 that meet these conditions are:

M 6MlMIl-TAll - M3 (41)

and M4.M7M12.TA2l - M 3. (42)

Two similar control circuits are provided for each of the remaining tilt circuits in the staticizer. These are:

M7.M8.M12.2M22 - M 4, (43)

M 3.M 8.M Ϊ2.ΤA 22 - M 4, (44)

M8.M9.MQTA23 - M 3, (45)

M 4M9. M 12.TA 23 - M3, (46)

M9M 10M12.TA 24 - M 4, (47)

and M3.M 10.M.12.TA 24 - M4, (48)

where the gate circles included are G 43 to G 48. Since the tilting circle M 5 is not reset during the search for rank numbers, this ao output requires, in addition to its characteristic time delay. no other special gate devices, the gate circle for it, G 49, is simply the following:

MB.TA19 - M3. (49) ^as

The reset tilting circuit M12 is reset, if necessary, after checking the rank numbering statisticizer in each word and when the pulse ΤΑ2Ί appears in the circle:

Μ12.ΤΑ2Ί - M12, (50)

where the included gate is G 50.

Finally, it should also be mentioned that the rank number stored in the rank number staticizer is read out at the end of the revolution of the drum, to be precise during a subsequent revolution under the control of the tilting circuit MI1, which is the collective connecting line staticizer. This toggle circle is first set when a collective connection line marking is read from any card track, provided that the toggle circle Ml is in the set state in the connection line discriminator of the same subgroup, which indicates that a free subscriber line with the called group number is being scanned. The reading circuit for a card track is designated with RC 3 , and the control circuit for setting the tilting circle MIl is:

Claims (2)

Claims: RC3.M1.TA18 - MIl, (51) where the gate circuit contained, which is the collective connection line detector, is G 51. The toggle circuit MIl is reset by the general reset signal after the information in the rank number staticizer has been read, in the circle: GRL - MIl. (52) 1.Circuit arrangement for determining the maximum value of several binary numbers which are simultaneously read out from a memory bit by bit, starting with the bit of the highest order, in particular for telephone exchanges, characterized by a control device (SNBGC) for checking the value of each bit read out and by another Control device (DC) for remembering the value of the previous bit, and in that, if a bit has a certain value, the previous bit is checked and, if this has the opposite value, a common memory (PBM) is called, and that if any bit which is read out simultaneously with the previous bit has the certain value, the common memory causes the control device (SNBGQ to exclude the checked binary number, while in all other cases the common memory enables this control device offset to accept the tested binary number take. 2. Circuit arrangement according to claim 1, in which groups of numbers are stored in a memory and the groups are read out one after the other, the numbers of a group being read out simultaneously, characterized in that the number with the highest value in a group is in another memory (SNS) is stored and the numbers of a later group are read out at the same time that a reading device (G 39 to G 49) for the other memory at the same time with the actuation of the two control devices (SNBGC, PBM) is effective in such a way that they each Reads out bits in this other memory and the common memory (PBM) is called again, and that if any bit read out from the other memory (SNS) has the specific value, while the corresponding bit of the highest number checked has the opposite value, this latter number is excluded while if any from the other memory (SNS) has the opposite value, while the corresponding bit of the highest number checked has the specific value, a writing device (G 19 to G 25) under the control of the shared memory (PBM) becomes effective in such a way that it is a Writes bits with the specific value in the other memory (SNS) , and that thereupon reset devices (G 25 to G 29, M12) are effective, which change the value of the following bits in the other memory (SNS) to the opposite value, so a new number can be stored in it. In addition 3 sheets of drawings 409 560/85 4.64 © Bundesdruckerei Berlin