DE10250154B4 - Switch unit for a switching power supply - Google Patents

Abstract

Switch unit for a switching power supply, with:
A primary current / voltage input region (PE), which is designed to receive a primary current and / or a primary voltage,
A primary current / voltage output region (PA), which is designed to output the primary current and / or the primary voltage, and
A first or main switch (SW1) and a second, part-load or standby switch (SW2) which are connected in parallel to one another and for controlled or controllable clocked transmission of the primary current and / or the primary voltage from the primary current / voltage input region (PE) to the primary current / voltage output range (PA) are formed,
Wherein the first or main switch (SW1) is designed as an IGBT,
Wherein the second, part-load or standby switch (SW2) is designed as a MOSFET,
- Wherein the first or main switch (SW1) and the second, partial load or ready switch (SW2) are monolithically integrated in a common module,
- Wherein the first or main switch (SW1) and the second, partial load or ready switch (SW2) are designed as field stop component,
- where the first or main switch (SW1) and ...

Description

The The invention relates to a switch unit for a switched-mode power supply.

at many electronic devices is in addition to a main power supply an auxiliary power supply or an auxiliary power supply necessary "to certain modes the electronic devices, where the main power supply, for example due to power saving requirements, is switched off to remain in operation with electrical components Provide energy.

Become frequent Such main power supplies and auxiliary power supplies in one realized common power supply device, which as switching power supplies are formed. In this case, such a switching power supply both a normal operating mode to supply all components as well a partial power mode, in particular a standby mode or stand-by mode for supplying only certain portions of a to realize the unit to be supplied.

Switching Power Supplies have a switch unit which is actuated in a clocked manner, to realize a transformation process. The switch unit So must be able to do all Performance requirements of both the partial power mode, in particular standby mode or stand-by mode as well as the actual one normal operating mode. this leads to but disadvantageously, that due to these constraints and stability requirements in partial power mode, especially in standby mode or stand-by mode Known switch units so far compared to the applied switching capacity have high power dissipation.

The JP 5-90 933 A relates to a switch assembly having a Parallel connection of an IGBT with a MOSFET, whereby the problem, To avoid or reduce switching losses, addressed and solved by it will that saturation voltage a partial load switch in the sense of a MOSFET designed lower than that of an IGBT serving as a main load switch, namely for the Case of low currents. For the Case, that high currents need to be provided are supplied by the IGBT, with a saturation voltage, which is lower than that of the MOSFET.

The publication DE 101 14 788 C1 relates to a semiconductor device in the form of a MOS switch, in which a vertically formed IGBT is integrated with a laterally formed MOSFET with charge-compensated drift zone. In this case, provision is made in particular for the vertically formed IGBT to have an n ⁺ -doped field stop layer and a p-doped weak injector layer in the case of a n-doped drift path MOSFET.

Of the Invention is based on the object, a switch unit for a switching power supply to create, which in a particularly simple way the functionality of a Switching power supply with the greatest possible avoidance of switching losses in partial power mode, especially in standby mode.

The The object is achieved by a switch unit for a switching power supply according to the invention with the characterizing features of claim 1 solved. Advantageous developments the switch unit according to the invention are each subject of the dependent Dependent claims.

The present invention provides a switch unit for a switched-mode power supply having a primary current / voltage input region, which is designed to receive a primary current and / or a primary voltage, a primary current / voltage output region, which is designed to output the primary current and / or the primary voltage, and a first or main switch and a second, part-load or standby switch connected in parallel with one another and configured for controlled or controllable clocked transmission of the primary current and / or the primary voltage from the primary current / voltage input region to the primary current / voltage output region or main switch is designed as an IGBT, wherein the second, part-load or standby switch is designed as a MOSFET, wherein the first or main switch and the second, part-load or standby switch are monolithically integrated in a common module, wherein the first or main switch and the second, part-load or standby switch are designed as a field stop component, wherein the first or main switch and the second, part-load or standby switch are designed as vertical components and wherein the collector terminal or output of the IGBT of the first or main switch below the gate areas of the IGBT of the first or main switch and the MOSFET of the second, partial load or standby switch is formed laterally into the region of the MOSFET of the second, partial load or standby switch.

It is thus fundamental in a switch unit for a switching power supply a first or main switch and a second or part-load or to provide standby switches which are parallel to each other are switched to a primary current and / or a primary voltage from an appropriate entrance area to a corresponding entrance area Transmit output range, the two switches being monolithic in a common module are formed integrated. By providing the two in parallel to each other switched switch thus results in a simple Way the possibility the two switches independently interpreted such that both a safe normal mode of operation and a special one lossless partial power mode, in particular standby mode or stand-by mode in a switching power supply can be realized. About that It also results from the common monolithic integration within a common module a particularly compact design the switch unit and also a particularly easy handling and flexible usability of the switch unit.

Especially It is advantageous if the second or partial load or ready switch a low power consumption, current carrying capacity, power dissipation and / or parasitic capacity has, in particular lower than that of the first or main switch. This raises in a particularly simple manner in the for the Partial power mode, especially the standby mode or stand-by mode provided second or partial load or standby switch a low power loss.

at another embodiment of the switch unit according to the invention it is envisaged that the first or main switch and the second or part-load or standby each a control input which has over separate control connections are controllable. As a result, depending on the operating mode selection either the first or main switch or alternatively the second or part-load or standby switch for the transfer of the primary current and / or the primary voltage selected become.

alternative For this purpose, it may be advantageous if the two control inputs of the first or main switch and the second or part-load or standby switch via a common control terminal are controlled. Here, for example, over the Selection of the drive level the selection of the first or the second switch be realized when the corresponding switching voltages of Both switches are designed differently.

Corresponding is it according to one particularly preferred embodiment the switch unit according to the invention provided that a common control connection, in particular for the control inputs, provided is and that the first or main switch a switching voltage, threshold voltage or threshold voltage which is greater than the switching voltage, Threshold voltage or threshold voltage of the second or part-load or standby switch. In this way you can choose the switch in the various operating modes via the level selection realize.

It let's go for the normal operating mode or for the partial power mode, in particular the Stand-by or standby mode favorable electrical parameters each active expectant switch in a particularly simple manner choose. It is provided in particular that the MOSFET of the second or standby switch has a body diode, which as Serve freewheeling diode or is connected.

The Freewheeling diode ensures that in particular at the output or collector output of the IGBT not on the negative to the ground or emitter output of the IGBT Potential is drifting. Without using a diode, this can be done, for. B. by Oscillation in the circuit done. That's what IGBTs are all about not designed. About that In addition, a lateral field effect transistor can turn on when the gate connections of the IGBT and / or the MOSFET by more than the threshold voltage with respect to the Collector terminal of the IGBT or the drain terminal of the MOSFET drifts down.

One vertical MOSFET always includes a freewheeling diode in principle, through the parasitic bipolar transistor. When IGBT is from the back added by the p-implantation another diode, which is formed antiparallel to the above diode. That means, that the whole system locks. In a pure IGBT solution would have so an additional Small signal diode can be formed. This is within the scope of this invention not necessary when using a MOSFET.

at another alternative development of the switch unit according to the invention it is envisaged that the first or main switch and the second or part load or standby switch with the primary current / voltage input area connected input terminals or inputs - in particular source terminals or entrances or emitter terminals or entrances - have, which are interconnected or formed as common connections or which are formed as separate connections are.

alternative or additionally it is envisaged that the first or main switch and the second or partial load or standby switch with the primary current / voltage output terminal area connected output terminals or outputs - in particular drains or exits or collector connections outputs - have, which are interconnected or formed as common connections or which are formed as separate connections are.

at a further advantageous embodiment of the switch unit according to the invention it is envisaged that the MOSFET of the second or part-load or Standby switch so from the IGBT of the first or main switch spatial is formed separately and / or electrically insulated that thereby the influence of the MOSFET of the second or partial load or standby switch on the IGBT of the first or main switch and in particular the Snap-back behaviors are reduced, which is detailed below is described.

In Advantageously, it is provided that the spatial Separation and / or electrical isolation of the MOSFET of the second or standby switch of the IGBT of the first or main switch at least one electrically inactive gate pad surface is formed. A gate pad surface becomes referred to as electrically inactive, if the underlying Area comprises or forms no active transistor cells.

at a further embodiment the switch unit according to the invention are the input terminals the first or main switch and the second or standby switch, in particular therefore the source connections or emitter connections, by means of a via or by means of a vias of small extent electrically connected to each other, in particular by a metal and / or in particular on the front side of a semiconductor substrate, in particular, an underlying area is formed inactive.

Prefers is thereby, that through the via or through the Via an ohmic resistance is defined such that in operation, the is called at current flow over the switch unit over this ohmic resistance, a voltage drop is generated over which the electricity flows through the first or main switch and the second or part-load or standby switch are derivable.

at a particularly preferred embodiment the switch unit according to the invention it is envisaged that the first or main switch and the second or partial load or standby switch different switching voltages, Have threshold voltages or threshold voltages and that these different Switching voltages, threshold voltages or threshold voltages via dopant concentrations the channel areas of the IGBT of the first or main switch and the Defined and set MOSFET of the second or standby switch are.

there It is especially provided that the back on a low doped semiconductor substrate of the IGBT of the first main switch a highly doped semiconductor material layer is formed by which is a passing through the low-doped semiconductor substrate electric field can be blocked or shielded.

These and other aspects of the present invention will become apparent from the following remarks closer explains The terms "partial load" and "standby" are used interchangeably.

Switching power supplies for mobile phones, notebook adapters, PC, TV / VCR, monitors, etc. have a stand-by mode. In this mode all unnecessary consumers are switched off. Only microcontrollers or monitoring electronics are powered. The requirements in terms of a minimum power consumption in the partial power mode, in particular in the standby mode of a switching power supply have been greatly increased in recent years by the legislature. These are for example:

So far an attempt is made to meet this requirement by switching off in partial power mode, especially in stand-by not necessary consumers about a Power management functionality of the drive IC and / or by frequency reduction to 20 kHz Reduction of switching losses in the main switch and the control IC Burst Mode to be expected.

In spite of of these measures to minimize performance in stand-by, arise in the main switch but still high switching losses, especially when using in partial power mode, especially in stand-by mode. Leave these in the case of MOSFETs as a power switch and a "quasi-resonant" drive, i. switching on in voltage zero crossing, further reduce. But a reduction over it addition requires additional Activities.

In an embodiment variant the invention, the main switch is a stand-by switch or partial load switch connected in parallel. The main switch is clocked in normal operation. The stand-by switch can be clocked in this mode or stay off. The current flows through the main switch with low Conduction losses.

in the Stand-by mode, the main switch remains off and only the stand-by switch is clocked. Because this switch is smaller and e.g. designed as a MOSFET, it causes with its smaller parasitic capacities less switching losses than the main switch, the u.U. with a IGBT is realized. As a result, the power loss can continue be reduced.

The Switch have in a variant separate gate connections on and can be controlled separately by a drive IC. It plays the Design of the switching thresholds of the gate voltage is irrelevant.

at another embodiment are the gate connections the switch connected. In this case, a special control and interpretation of the turn-on thresholds of the gate voltage necessary.

The Design of the switch-on thresholds is realized so that the switch-on threshold of the main switch higher is as the standby switch.

in the normal operating mode, the gate drive voltage is greater than the threshold voltage of the main switch. This will ensure that the main switch is turned on, the clocked Stand-by switch has no appreciable influence.

in the Stand-by operation, the gate drive voltage is designed to be larger as the switching threshold of the stand-by switch and lower than that of the main switch. Thus, the stand-by switch is clocked while the Main switch remains off.

Both versions can with the help of two discrete components or a multi-chip Solution (module), as well as a monolithic component realized with a "snap-back" characteristic become.

• – MOSFET und MOSFET,
• – IGBT und MOSFET sowie
• – IGBT und IGBT.

Any combinations of bipolar and unipolar components can also be provided:

• MOSFET and MOSFET,
• - IGBT and MOSFET as well
• - IGBT and IGBT.

When combining IGBT as a main switch and MOSFET as a stand-by switch, the parasitic Bodydiode be used by the MOSFET as a freewheeling diode, since the IGBT for negative collector-emitter voltages, which may be caused by parasitic vibrations, is not specified.

The Source or the emitter terminals can be connected or not. If not, there is a possibility to use different current measuring resistors for normal and stand-by operation. This can increase the accuracy of the control during stand-by.

A inventive idea lies in the proposed circuit arrangement in the parallel combination of main switch and stand-by switch and in the control method in the control with two different Voltage levels.

The component described here according to the invention in the sense of a switch unit for a switched-mode power supply is intended to fulfill a cost-effective solution for compliance with the requirements established by the legislature with regard to the consumption power during a standby mode:
An inventive idea for problem solving is to replace the commonly used single switch or transistor with a main switch and a stand-by switch or stand-by switch. These can in principle be arranged on separate chips, and also in separate housings. For cost reasons, however, a monolithic integration of the main switch and the standby switch is provided according to the invention, namely because of lower package costs and a smaller space requirement and installation costs on the customer board.

It is for the standby switch e.g. a MOSFET used because the switching characteristics common IGBT's for use in the hard and fast switching SMPS operation are rather disadvantageous. Furthermore, in contrast to the IGBT, the MOS has one in the application needed (low loaded) reverse diode. However, Infineon is currently developing IGBT technologies, the for SMPS applications are suitable (field stop IGBT, HS-IGBT).

• – Der Hauptschalter soll wegen der Bauteilkapazitäten, insbesondere auch im Stand-By-Fall, eine möglichst kleine Fläche besitzen, um geringe Schaltverluste zu erreichen. Hier ist der IGBT im Vergleich zum MOSFET im Vorteil, weil seine Cross-Kapazität geringer ist.
• – Der Bereitschaftsschalter soll möglichst kleine Verluste aufweisen. Hierbei ist die Diodenschwelle des IGBT nachteilig. Weiterhin besitzt der MOSFET die geforderte Freilauf-Diode.
• – Gate-Anschluss: Je nach Ansteuerverfahren werden entweder getrennte Gateanschlüsse für den Hauptschalter und den Bereitschaftsschalter oder ein gemeinsamer Gateanschluss mit verschiedenen Einsatzspannungen für den Hauptschalter und den Bereitschaftsschalter gefordert. Beides kann technologisch realisiert werden.
• – Source/Emitteranschluss: Kann für beide Schalter getrennt oder gemeinsam benötigt werden, und zwar getrennt für Strom-Sense. Dies erfordert aber einen zusätzlichen Bonddraht oder Package-Pin. Beides kann technologisch realisiert werden.
• – Drain/Kollektoranschluss: Es ist ein gemeinsamer Anschluss oder ein getrennter möglich.

When realizing the replacement of the individual switch by a main switch and a standby switch, all combinations of MOSFET and IGBT are conceivable in principle. From the application point of view, however, the choice of an IGBT as a main switch and a MOSFET as a standby switch is advantageous for the following reasons:

• - The main switch should because of the component capacities, especially in the stand-by case, have the smallest possible area to achieve low switching losses. Here, the IGBT compared to the MOSFET has the advantage because its cross-capacitance is lower.
• - The standby switch should have the smallest possible losses. Here, the diode threshold of the IGBT is disadvantageous. Furthermore, the MOSFET has the required free-wheeling diode.
• - Gate connection: Depending on the control method, either separate main switch and standby gate connections or a common gate connection with different threshold voltages for the main switch and the standby switch are required. Both can be realized technologically.
• - Source / emitter connection: Can be used separately or together for both switches, separately for current sense. But this requires an additional bond wire or package pin. Both can be realized technologically.
• - Drain / collector connection: a common connection or a separate one is possible.

• – Um die Auswirkung des MOS-Transistors auf den IGBT, z.B. das Snap-Back-Verhalten, zu minimieren, sollen beide räumlich möglichst getrennt ausgebildet oder vorgesehen sein, z.B. durch elektrisch inaktive Gatepadflächen.
• – Sollen Emitter/Source miteinander elektrisch verbunden sein, kann dieses z.B. durch einen kleinen Vorderseiten-Metallvia geschehen, wobei das darunter liegende Gebiet inaktiv sein kann, um eine Wechselwirkung zu vermeiden.
• – Der Metallvia kann so angelegt sein, dass bei Stromfluss ein kleiner, aber messbarer Widerstand zwischen Emitter und Source abfällt, der Rückschlüsse auf einen unterschiedlichen Stromfluss durch den Hauptschalter und den Bereitschaftsschalter zulässt.
• – Das Gatepad für den Hauptschalter und den Bereitschaftsschalter kann getrennt oder verbunden ausgebildet sein. Bei verbundenem Gate kann durch geeignete Maßnahmen, z.B. verschiedene Kanaldosen zwei aus Applikationssicht benötigte verschiedene Einsatzspannungen erreicht werden. Die Justagegenauigkeit beider Implantationen zueinander ist wegen der räumlichen Trennung von SW1 und SW2 weitgehend unerheblich. Dieser kann ohne teure zusätzliche Fototechnik durch Auflegen einer Hartmaske in einem geeigneten Implanter durch folgende Prozessfolge erfolgen: Nach standardmäßiger Hartmaske in einem geeigneten Implanter durch Auflagen einer Hartmaske, Justagegenauigkeit mit 300 μm unkritisch, Implantation der Delta-Dosis, Hartmaske abnehmen, weiter mit Standardprozess.
• – Der IGBT kann als "Feldstopp-Bauteil" ausgebildet sein. Hierbei ist rückseitig auf einem im Vergleich zum NPT-IGBT oder MOS vergleichsweise niedrig dotierten Substrat eine hochdotierte Schicht zum Abblocken des durch das Substrat durchgreifenden Felds ausgebildet. Diese Auslegung ist optimal für SMPS-Betrieb, bei dem hohe Schaltfrequenzen, z. B. 80 kHz, und hartes Schalten gefordert sind. Es werden hier durch den verkürzten Tailstrom die Verluste beim Ausschalten vermindert.
• – Im MOS-Bereich ist der RS-Emitter des IGBT unterbrochen, was technisch durch eine Implantation nach einer Rückseiten-Fototechnik realisierbar ist. Um das Snap-Back-Verhalten zu minimieren, wird der IGBT-Kollektor unter den Gatepads bis zum MOS durchgezogen.

The component according to the invention optionally has the following properties:

• In order to minimize the effect of the MOS transistor on the IGBT, for example the snap-back behavior, both should be designed or provided as separate as possible, for example by electrically inactive gate pad surfaces.
• - If the emitter / source are to be electrically connected to each other, this can be done, for example, by a small front-side metal, whereby the underlying area can be inactive, in order to avoid an interaction.
• - The Metallvia can be designed so that when current flows a small, but measurable resistance between emitter and source drops, which allows conclusions about a different current flow through the main switch and the standby switch.
• The gate pad for the main switch and the standby switch can be formed separately or connected. When the gate is connected, two different threshold voltages required from the application point of view can be achieved by means of suitable measures, for example different channel boxes. The alignment accuracy of both implants to each other is largely irrelevant because of the spatial separation of SW1 and SW2. This can be done without expensive additional photo technique by placing a hard mask in a suitable Implanter by following the following process sequence: After standard hard mask in a suitable Implanter by applying a hard mask, alignment accuracy with 300 microns uncritical, implantation of the delta dose, remove hard mask, continue with standard process.
• - The IGBT can be designed as a "field stop component". In this case, a highly doped layer for blocking the field passing through the substrate is formed on the back side of a substrate which is comparatively low in comparison to the NPT-IGBT or MOS. This design is optimal for SMPS operation where high switching frequencies, e.g. B. 80 kHz, and hard switching are required. It will be reduced by the shortened tail current, the losses when switching off.
• - In the MOS region, the RS emitter of the IGBT is interrupted, which is technically feasible by implantation after a backside photo technique. To minimize the snap-back behavior, the IGBT collector under the gatepads is pulled through to the MOS.

One MOS transistor affects an IGBT in the following way: To the To ignite IGBT, At a point X of the IGBT towards the rear, the diode threshold voltage must be of the PN junction (for SI: approx. 0.7 V). A MOS needs this ignition voltage Not. If MOS and IGBT are arranged on a chip, then because of the transverse conductivity in the substrate the back PN junction the IGBT partially short-circuited by the ohmic connected MOS area. Especially In field stop components can by the compared to the high-impedance Substrate high transverse conductivity of the field stop this will have a strong negative impact, since the horizontal resistance Rh is significantly smaller than the vertical resistance Rv and thus Uv is significantly larger as Uh = Us. Only when Uv has risen very high, ignites the IGBT and the characteristic of the IGBT collector current as a function of the collector voltage jumps at the same current a much smaller voltage, because in the IGBT now a charge carrier plasma originated. This jumping back in the IGBT characteristics due to the interaction with the MOSFET is called snapback.

This Behavior is more pronounced with a field stop IGBT than with an NPT IGBT. Rh can by a spatial Separation of IGBT and diode by an electrically inactive zone (Gate pad) can be increased with solid IGBT emitter, reducing the snap-back behavior on. one for the application reduces acceptable levels becomes.

innovative Ideas are the geometric arrangement for a monolithic integration of IGBT and MOS with priority optimization of the IGBT for SMPS applications with stand-by circuit, especially when using a field stop and the process idea for monolithic integrated IGBT and MOS with common gate with two threshold voltages.

following the invention with reference to preferred embodiments with reference closer to schematic drawings explained.

1 . 2 show in schematic form a circuit arrangement for two embodiments of the switch unit according to the invention for a switching power supply.

3A . 3B show in plan view and in a sectional side view of a further embodiment of the switch unit according to the invention.

4 shows in plan view another embodiment of the switch unit according to the invention.

following the same or equivalent components and structures are used the same reference numerals, and it will not in any case a detailed description of their occurrence.

In the embodiments of the 1 and 2 For example, the respective switch unit S has a primary current / voltage input region PE and a primary current / voltage output region PA with corresponding connections. Between the primary current / voltage input region PE and the current / voltage output region PA, a first or main switch SW1 in the form of an IGBT and a second or part-load or standby switch SW2 in the form of a MOSFET are provided. In this case, the emitter terminal E1 or source terminal S1 of the IGBT SW1 is connected to the current / voltage input area PE together with the source terminal S2 of the MOSFET SW2. At the same time, the collector terminal C1 and drain terminal D1 of the IGBT SW1 and the drain terminal D2 of the MOSFET S2 are connected to the primary current / voltage output area PA. The IGBT SW1 has a control terminal or a gate G1. The MOSFET SW2 has a control terminal G2 in the form of a gate G2.

In the embodiment of the 1 The first or main switch SW1 in the form of the IGBT SW1 and the second or part-load or standby switch SW2 in the form of the MOSFET SW2 have separate control terminal regions SA1 and SA2 connected to the control inputs G1 and G2.

In contrast, the embodiment of the 2 in that a common control connection SA is provided as a common control connection SA for both control inputs G1, G2 for the first or main switch SW1 and the second or partial load or standby switch SW2.

3A and 3B show in sectional side view and in plan view, the material embodiment of an embodiment of the switch unit according to the invention in monolithic integration.

The basic element is a low-doped semiconductor substrate 20 with an ohmic resistance which is greater than 40 Ω · cm. The semiconductor substrate 20 has a surface 20a and a lower surface 20b , On the surface 20a become the emitter E1 or the source S1 in a first area 23 the surface 20a educated. On the other hand, in a second area 24 the surface 20a the source S2 of the second or part-load or standby switch SW2, namely the corresponding MOSFET is formed. Between the emitter E1 and the first or main switch SW1 and the source S2 of the second or standby switch SW2 are the regions 25 and 26 for the respective gates G1 for the IGBT of the first or main switch SW1 and for the MOSFET of the second or part-load or standby switch SW2. In the in 1 Shown embodiment of the switch unit according to the invention are the two gate structures G1 and G2 and the corresponding surface areas 25 and 26 the surface 20a and the source regions S1 and S2 for the IGBT and the MOSFET of the main switch SW1 and the standby switch SW2 are not in electrical contact with each other. Furthermore, in the surface area 20a of the semiconductor substrate 20 a final edge 27 educated. On the bottom or bottom surface 20b of the semiconductor substrate 20 is next to the field stop layer 21 at the bottom a common surface area 22 is provided, which forms the collector K1 of the IGBT of the first or main switch SW1 and at the same time the drain D2 of the MOSFET of the second or standby switch SW2. This sub-surface area 22 At the rear covers both the emitter region E1 or source region S1 of the IGBT of the main switch SW1 and the gate regions G1 and G2 and optionally extends into the source region S2 of the MOSFET of the standby switch SW2.

An optionally required metallization for contacting the collector terminal K1 and the drain terminal D2 is in 3A not shown.

In the embodiment of the 4 Comparable conditions are found as in the view of 3B , However, here are the areas 23 and 24 for the emitter E1 or the source S1 of the IGBT of the main switch SW1 and for the source S2 of the MOSFET for the standby switch or part-load switch SW2 through a via 30 or a via 30 connected to each other conductively.

1

switch unit

20

Semiconductor substrate

20a

Surface, surface area

20b

Lower surface, lower surface area

21

Field stop layer

22

Under area for collector / drain Main switch, IGBT

23

surface area for emitter / source Main switch, IGBT

24

surface area for Source Standby switch, MOSFET

25

surface area for gate Main switch, IGBT

26

surface area for gate Standby switch, MOSFET

27

terminal edge

30

via, Via

B2

Body area Body connection standby switch, MOSFET

D1

Drain, Drain main switch, IGBT

D2

Drain, Drain ready switch, MOSFET

E1

emitter terminal Main switch, IGBT

G1

Control input Gate main switch IGBT

G2

Control input Gate ready switch MOSFET

K1

Collector terminal Collector main switch, IGBT

PA

Primary current - / - voltage output range

PE

Primary current - / - voltage input range

S

switch unit

S1

Source terminal Source main switch, IGBT

S2

Source terminal Source ready switch, MOSFET

SA1

control connection Main switch, IGBT

SA2

control connection Standby switch, MOSFET

SL

common control line

SL1

control line Main switch, IGBT

SL2

control line Standby switch, MOSFET

SW1

first or main switch, IGBT

SW2

second or partial load switch or standby switch, MOSFET

Claims (13)

Switch unit for a switching power supply, with: - one Primary current - / - voltage input range (PE), which for receiving a primary current and / or a primary voltage is trained, - one Primary current - / - voltage output range (PA), which is used to output the primary current and / or the primary voltage is trained, and - one first or main switch (SW1) and a second, partial load or Standby switch (SW2), which are connected in parallel and for controlled or controllable clocked transmission of the primary current and / or the primary voltage from the primary current / voltage input area (PE) to the primary current / voltage output range (PA) are formed, - in which the first or main switch (SW1) is designed as an IGBT, - in which the second, part-load or standby switch (SW2) as a MOSFET is trained, - in which the first or main switch (SW1) and the second, part load or Standby switch (SW2) in a common module monolithic are integrated, - where the first or main switch (SW1) and the second, part-load or standby switch (SW2) are designed as field stop component, - where the first or main switch (SW1) and the second, part-load or standby switch (SW2) are designed as vertical components and - in which the collector terminal or output (K1) of the IGBT of the first or Main switch (SW1) below the gate areas of the IGBT of the first or main switch (SW1) and the MOSFET of the second, part load or Standby switch (SW2) lateral to the area of the MOSFET of the second, part-load or standby switch (SW2) is. Switch unit according to Claim 1, characterized - that the second, part-load or standby (SW2) switch low Power consumption, current carrying capacity and / or power loss, and less than that of first or main switch (SW1), and - that the second, part-load or stand-by switch (SW2) has a low parasitic capacitance, less than that in the first or main switch (SW1). Switch unit according to one of the preceding claims, characterized characterized in that the first or main switch (SW1) and the second, part-load or standby (SW2) each one Control input (G1, G2), which via separate control terminals (SA1, SA2) or over a common control terminal (SA) can be controlled. Switch unit according to Claim 3, characterized - the existence common control connection (SA) is provided and - that the first or main switch (SW1) one threshold voltage, switching voltage or threshold voltage which is greater than the switching voltage or threshold voltage of the second, partial load or standby switch (SW2). Switch unit according to one of the preceding claims, characterized in that the MOSFET of the second, part-load or standby switch (SW2) has a body diode (Z2), which serves as a freewheeling diode. Switch unit according to one of the preceding claims, characterized characterized in that the first or main switch (SW1) and the second, partial load or standby (SW2) switch with the primary current / voltage input range (PE) connected input terminals or inputs (E1, S2), namely one Emitter connection or input (E1) or a source connection or input (S2), which interconnected or as common connections are formed or which are formed separately from each other. Switch unit according to one of the preceding claims, characterized characterized in that the first or main switch (SW1) and the second, part-load or standby (SW2) switch with the primary current / voltage output range (PA) connected output terminals or outputs (K1; D2), namely the Collector connection or output (K1) or a drain connection or output (D2), which are interconnected or as common connections are formed or which are formed separately from each other. Switch unit according to one of the preceding claims, characterized in - that the MOSFET of the second, part-load or standby switch (SW2) thus spatially separated from the IGBT of the first or main switch (SW1) and / or is electrically isolated, - that by the influence the MOSFET of the second, part load or Standby switch (SW2) on the IGBT of the first or main switch (SW1) and the snap-back behavior is reduced. Switch unit according to claim 8, characterized in that for spatially separating and / or electrically isolating the MOSFET of the second, partial load or standby switch (SW2) from the IGBT of the first or main switch (SW1) at least one electrically inactive gate pad surface ( 25 . 26 ) is provided. Switch unit according to one of the preceding claims, characterized in that the input terminals or inputs (E1; S2) of the first or main switch (SW1) and the second, partial load or standby switch (SW2) by means of a via ( 30 ) or by means of a vias ( 30 ) are electrically connected to each other, namely of metal on the front side ( 20a ) of a semiconductor substrate region ( 20 ), wherein an underlying area is formed inactive. Switch unit according to claim 10, characterized in that - through the plated-through hole ( 30 ) or through the Via ( 30 ) an ohmic resistance is defined in such a way that during operation or during current flow via the switch unit (S, 1) a voltage drop can be generated via this ohmic resistor, via which the current flows through the first or main switch (SW1) and the second, partial load or standby switch (SW2) are derivable. Switch unit according to one of the preceding claims, characterized in - that the first or main switch (SW1) and the second, part load or Standby switch (SW2) different switching voltages, threshold voltages or have threshold voltages and - that the switching voltages, Tension voltages or threshold voltages via dopant concentrations the channel areas of the IGBT of the first or main switch (SW1) and the MOSFET of the second, partial load or standby switch (SW2) are defined and set. Switch unit according to one of the preceding claims, characterized in that the rear side ( 20b ) on a low-doped semiconductor substrate ( 20 ) of the IGBT of the first or main switch (SW1) a highly doped semiconductor material layer ( 21 ) is formed, through which a through the low-doped semiconductor substrate ( 20 ) extending electric field can be blocked or shielded.