DE10245671A1 - Production of a semiconductor structure comprises preparing a semiconductor substrate, forming a silicon nitride layer on the substrate, forming a silicon dioxide layer on the silicon nitride layer, and etching the silicon dioxide layer - Google Patents

Abstract

Production of semiconductor structure comprises preparing semiconductor substrate (1), forming silicon nitride layer (3) on surface (OF1) of substrate, forming silicon dioxide layer (10) on surface (OF2, OF3) of silicon nitride layer, and selectively isotropically etching silicon dioxide layer on one surface of silicon nitride layer in inductively coupled plasma etch step (E2) using gas mixture containing CF9 and inert gas. Production of a semiconductor structure comprises preparing a semiconductor substrate (1), forming a silicon nitride layer (3) on the surface (OF1) of the substrate, forming a silicon dioxide layer (10) on the surface (OF2, OF3) of the silicon nitride layer, and selectively isotropically etching the silicon dioxide layer on one surface of the silicon nitride layer in a plasma etching step (E2) in an inductively coupled plasma etching chamber with a very low bias applied to the cathode and using a gas mixture containing CF9 and an inert gas, especially Ar.

Description

The present invention relates to a manufacturing process for a semiconductor structure.

Although in principle on any Integrated circuits applicable, the present invention and the underlying problem with regard to semiconductor structures explained in silicon technology.

With many semiconductor structures, it is necessary to etch a silicon dioxide layer very selectively with respect to a silicon nitride layer, ie without noticeable silicon nitride losses. So far, this problem has been solved by etching with polymerizing chemistry in a reactive ion etching step. So far, high selectivities have mostly been achieved using carbon-rich fluorocarbons (CxFy / Ar). CF ₄ / Ar mixtures are not considered to be particularly selective.

Disadvantages of such a polymerizing chemistry are the pollution of the etching chamber caused thereby and the sometimes complicated handling of the special gases used. For example, when using C ₄ F ₈ , which is liquid in the normal state, a hardware modification must be carried out in order to heat the gas line.

The basis of the present invention The problem therefore is an improved manufacturing process for one Semiconductor structure that allows a silicon dioxide layer very selectively in a simpler way to remove an underlying silicon nitride layer.

This problem is solved according to the invention solved the manufacturing method specified in claim 1.

The advantages of the manufacturing method according to the invention are, in particular, that the silicon nitride loss can be set to a very low value or almost zero using the method according to the invention. With the plasma etching step according to the invention, silicon dioxide can be selectively removed to silicon nitride under the set conditions. The selectivity can be controlled to a certain extent via the bias power. CF ₄ and inert gases, such as argon, are standard gases and can be used on all types of chamber without any problems or additional effort. They are available as standard on many etching chambers.

The idea underlying the present invention is that selective etching of the silicon dioxide layer on the at least one surface of the silicon nitride layer in a plasma etching step in an inductively coupled plasma etching chamber with a very low or vanishing bias power applied to the cathode with a gas mixture of CF ₄ and an inert one Gas, especially Ar, is carried out. In other words, according to the invention, a process regime for a CF ₄ / Ar plasma was found in an inductively coupled etching chamber, in which unexpectedly high selectivities of the etching of silicon dioxide to silicon nitride occur.

The observed and is explained unexpected phenomenon with the formation of a thin Passivation layer on the silicon nitride, which has no bias performance, i.e. without sputter attack through an applied bias, a chemical attack more reactive Species from the plasma prevented. Forms on the silicon dioxide this passivation is not out. It should be mentioned that the etching rate of the plasma etching according to the invention at trenches decreases with increasing depth because the etching radicals become depleted occurs. The selectivity ratios change Not. The method according to the invention is therefore particularly suitable for near-surface etching.

There are advantageous ones in the subclaims Developments and improvements to the subject matter of the invention.

According to a preferred further development before providing a silicon dioxide layer, the silicon nitride layer structured into a hard mask and become a with the hard mask or several trenches etched into the semiconductor substrate in a trench etching step.

According to another preferred Further training, the silicon dioxide layer is deposited over the hard mask and the trenches, so that they have an upper surface the silicon nitride layer, lateral surfaces of the silicon nitride layer, faces the trenches and floor areas the trenches be covered.

According to a further preferred development, anisotropic pre-etching of the silicon dioxide layer on the at least one surface of the silicon nitride layer is carried out in a further plasma etching step in the inductively coupled plasma etching chamber with a higher bias power of at least 100 W applied to the cathode with a gas mixture of CF ₄ and an inert gas, in particular Ar, as well as SiF ₄ and oxygen.

According to another preferred Further training is in selective etching in the plasma etching step the silicon dioxide at least in the upper area from the side and horizontal surfaces removed the silicon nitride layer.

According to another preferred Continuing education is when pre-etching an end point detection of the silicon dioxide layer in the plasma etching step carried out by means of optical emission spectroscopy.

According to a further preferred development, the etching of the silicon dioxide layer is carried out carried out in the plasma etching step for a predetermined period of time, which is dimensioned, for example, such that a highly thinned silicon dioxide layer remains on the upper surface of the silicon nitride layer. SiO ₂ does not necessarily have to remain on the surface, it can also be a bare silicon nitride surface. In this case, only the SiO ₂ in the trench is withdrawn during slective etching and the silicon nitride surface remains untouched.

According to another preferred The inert gas argon is a further development.

According to a further preferred development, the inert gas is supplied in a ratio of 1: 1 to the CF ₄ .

An embodiment of the invention is shown in the drawings and in the description below explained in more detail.

1a - 1d show schematic representations of successive process stages of a manufacturing process for a semiconductor structure as an embodiment of the present invention.

The exemplary embodiment mentioned here comes from one Collar etching process for the production of Semiconductor memory cells with trench capacitors.

In 1a denotes reference numerals 1 a semiconductor substrate, on the surface OF1 of which a structured silicon nitride layer 3 has been applied as a hard mask. Reference symbol OF2 denotes the upper surface of the silicon nitride layer 3 and reference symbol OF3, their lateral surfaces, which are exposed during structuring.

Using the structured silicon nitride layer 3 are trenches in a trench etching process E0, for example a reactive ion etching process 5a . 5b into the semiconductor substrate 1 etched. The trenches 5a . 5b have side surfaces SF and base surfaces BF. The thickness of the silicon nitride layer 3 after the trench etching step is denoted by d0.

As in 1b is shown, a TEOS silicon dioxide layer is then placed over the resulting structure 10 deposited. The thickness of the silicon dioxide layer 10 on the horizontal surface OF2 is larger in this process than that on the vertical surfaces OF3, SF and the horizontal surface BF.

In the following, the resulting structure is subjected to a first plasma etching step E1 in an inductively coupled plasma etching chamber. In this first plasma etching step E1, a gas mixture of CF ₄ and an inert gas as well as SiF ₄ and oxygen is passed into the inductively coupled plasma etching chamber. The source power is 2500 W and the pressure is 10 mTorr. The bias power which is applied to the cathode, which here is the chuck for the processed wafer, is typically 200 W, with the result that the etching in this etching step E1 is a strongly anisotropic process. The duration of the etching step E1 is controlled by end point detection (optical emission spectroscopy) or fixed time. The silicon dioxide layer 10 during this step, the OF2 is removed to a thickness of approximately 20 nm. The oxide layer on the surface BF is completely removed.

In the next step, which is below with reference to 1d will be explained, a second selective isotropic plasma etching step E2 is carried out in the inductively coupled plasma etching chamber, the bias power applied to the cathode being set to zero and a gas mixture of CF ₄ and argon in a ratio of 1: 1 being used. Here the source power is 1250W and the pressure is 20 mTorr. This gas mixture and the disappearing bias power allow a very selective etching of the silicon dioxide remaining on the surface to form OF2 10 compared to the silicon nitride layer 3 carry out. With a correspondingly selected duration of this second plasma etching step E2 it can be achieved that the top of the silicon dioxide layer 10 on the side surface OF3 of the silicon nitride layer 3 is withdrawn from its upper surface OF2. This step can be controlled by the decrease in C = O species in the plasma with progressive etching with optical emission spectroscopy with end point detection.

In this connection it should also be mentioned that the silicon dioxide layer 10 on the side faces SF of the trenches 5a . 5b during the plasma etching step E2 is less removed with increasing trench depth, since the etching effect in this plasma etching step decreases with increasing depth due to the radical depletion.

Due to the high selectivity of the second plasma etching step, the thickness d1 of the silicon nitride layer can also be achieved 3 after the second plasma etching step E2 is substantially equal to the original thickness d0. In this example, this is of great importance for the following process steps for the completion of the semiconductor memory cells.

Although the present invention described above with reference to a preferred embodiment it is not limited to this, but in a variety of ways and modifiable.

The selection of the substrate material and the geometry are only examples and can be varied in many ways. In particular, the present invention is not only applicable for the production of trench capacitors for semiconductor memory cells, but in principle whenever thin silicon dioxide layers are to be etched very selectively with respect to silicon nitride, in particular in connection with previous anisos tropical etching processes with similar gas mixtures.

1

Silicon semiconductor substrate

5a, 5b

dig

3

hard mask made of silicon nitride

10

silicon dioxide

OF1, OF2, OF3

surface

SF

faces

BF

floor surfaces

d0, d1

thickness the hard mask made of silicon nitride

E1, E2

etching

Claims (10)

Method for producing a semiconductor structure, comprising the steps: providing a semiconductor substrate ( 1 ); Providing a silicon nitride layer ( 3 ) on a surface (OF1) of the semiconductor substrate ( 1 ); Provide a silicon dioxide layer ( 10 ) on at least one surface (OF2, OF3) of the silicon nitride layer ( 3 ); and selective isotropic etching of the silicon dioxide layer ( 10 ) on the at least one surface (OF2, OF3) of the silicon nitride layer ( 3 ) in a plasma etching step (E2) in an inductively coupled plasma etching chamber with a very low or vanishing bias power applied to the cathode with a gas mixture of CF ₉ and an inert gas, in particular Ar. A method according to claim 1, characterized in that before the provision of a silicon dioxide layer ( 10 ) the silicon nitride layer ( 3 ) is structured into a hard mask and one or more trenches with the hard mask ( 5a . 5b ) in the semiconductor substrate ( 1 ) are etched in a trench etching step (E0). A method according to claim 2, characterized in that the silicon dioxide layer ( 10 ) over the hard mask and the trenches ( 5a . 5b ) is deposited so that it has an upper surface (OF2) of the silicon nitride layer ( 3 ), lateral surfaces (OF3) of the silicon nitride layer ( 3 ), Side faces (SF) of the trenches ( 5a . 5b ) and floor areas (BF) of the trenches ( 5a . 5b ) are covered. Method according to one of the preceding claims, characterized in that an anisotropic pre-etching of the silicon dioxide layer ( 10 ) on the at least one surface (OF2, OF3) of the silicon nitride layer ( 3 ) in a further plasma etching step (E1) in the inductively coupled plasma etching chamber at a higher bias power of at least 100 W applied to the cathode with a gas mixture of CF ₄ and an inert gas as well as SiF ₄ and oxygen, in particular Ar. Method according to Claim 3, characterized in that during the selective etching in the plasma etching step (E2), the silicon dioxide at least in the upper region from the lateral surfaces (OF3) of the silicon nitride layer ( 3 ) Will get removed. A method according to claim 4, characterized in that when the silicon dioxide layer ( 10 ) an end point detection with optical emission spectroscopy is carried out in the plasma etching step (E1). Method according to claim 4 in conjunction with claim 3, characterized in that the pre-etching of the silicon dioxide layer ( 10 ) is carried out in the plasma etching step (E1) for a predetermined period of time, which is dimensioned such that a highly thinned silicon dioxide layer ( 10 ) on the upper surface (OF2) of the silicon nitride layer ( 3 ) remains. Method according to claim 4 in conjunction with claim 3, characterized in that the pre-etching of the silicon dioxide layer ( 10 ) is carried out in the plasma etching step (E1) for a predetermined period of time or with end point detection, which is dimensioned such that the silicon dioxide layer ( 10 ) on the upper surface (OF2) of the silicon nitride layer ( 3 ) is completely removed. Method according to one of the preceding claims, characterized characterized that the inert gas is argon. Method according to one of the preceding claims, characterized in that the inert gas is supplied in a ratio of 1: 1 to CF ₄ .